1f11c7f63SJim Harris /*- 2*718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0 3*718cf2ccSPedro F. Giffuni * 4f11c7f63SJim Harris * This file is provided under a dual BSD/GPLv2 license. When using or 5f11c7f63SJim Harris * redistributing this file, you may do so under either license. 6f11c7f63SJim Harris * 7f11c7f63SJim Harris * GPL LICENSE SUMMARY 8f11c7f63SJim Harris * 9f11c7f63SJim Harris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 10f11c7f63SJim Harris * 11f11c7f63SJim Harris * This program is free software; you can redistribute it and/or modify 12f11c7f63SJim Harris * it under the terms of version 2 of the GNU General Public License as 13f11c7f63SJim Harris * published by the Free Software Foundation. 14f11c7f63SJim Harris * 15f11c7f63SJim Harris * This program is distributed in the hope that it will be useful, but 16f11c7f63SJim Harris * WITHOUT ANY WARRANTY; without even the implied warranty of 17f11c7f63SJim Harris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18f11c7f63SJim Harris * General Public License for more details. 19f11c7f63SJim Harris * 20f11c7f63SJim Harris * You should have received a copy of the GNU General Public License 21f11c7f63SJim Harris * along with this program; if not, write to the Free Software 22f11c7f63SJim Harris * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 23f11c7f63SJim Harris * The full GNU General Public License is included in this distribution 24f11c7f63SJim Harris * in the file called LICENSE.GPL. 25f11c7f63SJim Harris * 26f11c7f63SJim Harris * BSD LICENSE 27f11c7f63SJim Harris * 28f11c7f63SJim Harris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 29f11c7f63SJim Harris * All rights reserved. 30f11c7f63SJim Harris * 31f11c7f63SJim Harris * Redistribution and use in source and binary forms, with or without 32f11c7f63SJim Harris * modification, are permitted provided that the following conditions 33f11c7f63SJim Harris * are met: 34f11c7f63SJim Harris * 35f11c7f63SJim Harris * * Redistributions of source code must retain the above copyright 36f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer. 37f11c7f63SJim Harris * * Redistributions in binary form must reproduce the above copyright 38f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer in 39f11c7f63SJim Harris * the documentation and/or other materials provided with the 40f11c7f63SJim Harris * distribution. 41f11c7f63SJim Harris * 42f11c7f63SJim Harris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 43f11c7f63SJim Harris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 44f11c7f63SJim Harris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 45f11c7f63SJim Harris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 46f11c7f63SJim Harris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 47f11c7f63SJim Harris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 48f11c7f63SJim Harris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 49f11c7f63SJim Harris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 50f11c7f63SJim Harris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 51f11c7f63SJim Harris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52f11c7f63SJim Harris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53f11c7f63SJim Harris */ 54f11c7f63SJim Harris #ifndef _SCU_CONSTANTS_H_ 55f11c7f63SJim Harris #define _SCU_CONSTANTS_H_ 56f11c7f63SJim Harris 57f11c7f63SJim Harris /** 58f11c7f63SJim Harris * @file 59f11c7f63SJim Harris * 60f11c7f63SJim Harris * @brief This file contains the SCU hardware constants. 61f11c7f63SJim Harris */ 62f11c7f63SJim Harris 63f11c7f63SJim Harris #ifdef __cplusplus 64f11c7f63SJim Harris extern "C" { 65f11c7f63SJim Harris #endif // __cplusplus 66f11c7f63SJim Harris 67f11c7f63SJim Harris #include <dev/isci/scil/sci_controller_constants.h> 68f11c7f63SJim Harris 69f11c7f63SJim Harris /** 70f11c7f63SJim Harris * 2 indicates the maximum number of UFs that can occur for a given IO 71f11c7f63SJim Harris * request. The hardware handles reception of additional unsolicited 72f11c7f63SJim Harris * frames while all UFs are in use, by holding off the transmitting 73f11c7f63SJim Harris * device. This number could be theoretically reduced to 1, but 2 74f11c7f63SJim Harris * provides for more reliable operation. During SATA PIO operation, 75f11c7f63SJim Harris * it is possible under some conditions for there to be 3 separate 76f11c7f63SJim Harris * FISes received, back to back to back (PIO Setup, Data, D2H Register). 77f11c7f63SJim Harris * It is unlikely to have all 3 pending all at once without some of 78f11c7f63SJim Harris * them already being processed. 79f11c7f63SJim Harris */ 80f11c7f63SJim Harris #define SCU_MIN_UNSOLICITED_FRAMES (8) 81f11c7f63SJim Harris #define SCU_MIN_CRITICAL_NOTIFICATIONS (19) 82f11c7f63SJim Harris #define SCU_MIN_EVENTS (4) 83f11c7f63SJim Harris #define SCU_MIN_COMPLETION_QUEUE_SCRATCH (0) 84f11c7f63SJim Harris #define SCU_MIN_COMPLETION_QUEUE_ENTRIES ( SCU_MIN_CRITICAL_NOTIFICATIONS \ 85f11c7f63SJim Harris + SCU_MIN_EVENTS \ 86f11c7f63SJim Harris + SCU_MIN_UNSOLICITED_FRAMES \ 87f11c7f63SJim Harris + SCI_MIN_IO_REQUESTS \ 88f11c7f63SJim Harris + SCU_MIN_COMPLETION_QUEUE_SCRATCH ) 89f11c7f63SJim Harris 90f11c7f63SJim Harris #define SCU_MAX_CRITICAL_NOTIFICATIONS (384) 91f11c7f63SJim Harris #define SCU_MAX_EVENTS (128) 92f11c7f63SJim Harris #define SCU_MAX_UNSOLICITED_FRAMES (128) 93f11c7f63SJim Harris #define SCU_MAX_COMPLETION_QUEUE_SCRATCH (128) 94f11c7f63SJim Harris #define SCU_MAX_COMPLETION_QUEUE_ENTRIES ( SCU_MAX_CRITICAL_NOTIFICATIONS \ 95f11c7f63SJim Harris + SCU_MAX_EVENTS \ 96f11c7f63SJim Harris + SCU_MAX_UNSOLICITED_FRAMES \ 97f11c7f63SJim Harris + SCI_MAX_IO_REQUESTS \ 98f11c7f63SJim Harris + SCU_MAX_COMPLETION_QUEUE_SCRATCH ) 99f11c7f63SJim Harris 100f11c7f63SJim Harris #if !defined(ENABLE_MINIMUM_MEMORY_MODE) 101f11c7f63SJim Harris #define SCU_UNSOLICITED_FRAME_COUNT SCU_MAX_UNSOLICITED_FRAMES 102f11c7f63SJim Harris #define SCU_CRITICAL_NOTIFICATION_COUNT SCU_MAX_CRITICAL_NOTIFICATIONS 103f11c7f63SJim Harris #define SCU_EVENT_COUNT SCU_MAX_EVENTS 104f11c7f63SJim Harris #define SCU_COMPLETION_QUEUE_SCRATCH SCU_MAX_COMPLETION_QUEUE_SCRATCH 105f11c7f63SJim Harris #define SCU_IO_REQUEST_COUNT SCI_MAX_IO_REQUESTS 106f11c7f63SJim Harris #define SCU_IO_REQUEST_SGE_COUNT SCI_MAX_SCATTER_GATHER_ELEMENTS 107f11c7f63SJim Harris #define SCU_COMPLETION_QUEUE_COUNT SCU_MAX_COMPLETION_QUEUE_ENTRIES 108f11c7f63SJim Harris #else 109f11c7f63SJim Harris #define SCU_UNSOLICITED_FRAME_COUNT SCU_MIN_UNSOLICITED_FRAMES 110f11c7f63SJim Harris #define SCU_CRITICAL_NOTIFICATION_COUNT SCU_MIN_CRITICAL_NOTIFICATIONS 111f11c7f63SJim Harris #define SCU_EVENT_COUNT SCU_MIN_EVENTS 112f11c7f63SJim Harris #define SCU_COMPLETION_QUEUE_SCRATCH SCU_MIN_COMPLETION_QUEUE_SCRATCH 113f11c7f63SJim Harris #define SCU_IO_REQUEST_COUNT SCI_MIN_IO_REQUESTS 114f11c7f63SJim Harris #define SCU_IO_REQUEST_SGE_COUNT SCI_MIN_SCATTER_GATHER_ELEMENTS 115f11c7f63SJim Harris #define SCU_COMPLETION_QUEUE_COUNT SCU_MIN_COMPLETION_QUEUE_ENTRIES 116f11c7f63SJim Harris #endif // !defined(ENABLE_MINIMUM_MEMORY_OPERATION) 117f11c7f63SJim Harris 118f11c7f63SJim Harris /** 119f11c7f63SJim Harris * The SCU_COMPLETION_QUEUE_COUNT constant indicates the size 120f11c7f63SJim Harris * of the completion queue into which the hardware DMAs 32-bit 121f11c7f63SJim Harris * quantas (completion entries). 122f11c7f63SJim Harris */ 123f11c7f63SJim Harris 124f11c7f63SJim Harris /** 125f11c7f63SJim Harris * This queue must be programmed to a power of 2 size (e.g. 32, 64, 126f11c7f63SJim Harris * 1024, etc.). 127f11c7f63SJim Harris */ 128f11c7f63SJim Harris #if (SCU_COMPLETION_QUEUE_COUNT != 16) && \ 129f11c7f63SJim Harris (SCU_COMPLETION_QUEUE_COUNT != 32) && \ 130f11c7f63SJim Harris (SCU_COMPLETION_QUEUE_COUNT != 64) && \ 131f11c7f63SJim Harris (SCU_COMPLETION_QUEUE_COUNT != 128) && \ 132f11c7f63SJim Harris (SCU_COMPLETION_QUEUE_COUNT != 256) && \ 133f11c7f63SJim Harris (SCU_COMPLETION_QUEUE_COUNT != 512) && \ 134f11c7f63SJim Harris (SCU_COMPLETION_QUEUE_COUNT != 1024) 135f11c7f63SJim Harris #error "SCU_COMPLETION_QUEUE_COUNT must be set to a power of 2." 136f11c7f63SJim Harris #endif 137f11c7f63SJim Harris 138f11c7f63SJim Harris #if SCU_MIN_UNSOLICITED_FRAMES > SCU_MAX_UNSOLICITED_FRAMES 139f11c7f63SJim Harris #error "Invalid configuration of unsolicited frame constants" 140f11c7f63SJim Harris #endif // SCU_MIN_UNSOLICITED_FRAMES > SCU_MAX_UNSOLICITED_FRAMES 141f11c7f63SJim Harris 142f11c7f63SJim Harris #define SCU_MIN_UF_TABLE_ENTRIES (8) 143f11c7f63SJim Harris #define SCU_ABSOLUTE_MAX_UNSOLICITED_FRAMES (4096) 144f11c7f63SJim Harris #define SCU_UNSOLICITED_FRAME_BUFFER_SIZE (1024) 145f11c7f63SJim Harris #define SCU_INVALID_FRAME_INDEX (0xFFFF) 146f11c7f63SJim Harris 147f11c7f63SJim Harris #define SCU_IO_REQUEST_MAX_SGE_SIZE (0x00FFFFFF) 148f11c7f63SJim Harris #define SCU_IO_REQUEST_MAX_TRANSFER_LENGTH (0x00FFFFFF) 149f11c7f63SJim Harris 150f11c7f63SJim Harris #ifdef __cplusplus 151f11c7f63SJim Harris } 152f11c7f63SJim Harris #endif // __cplusplus 153f11c7f63SJim Harris 154f11c7f63SJim Harris #endif // _SCU_CONSTANTS_H_ 155