xref: /freebsd/sys/dev/isci/scil/scic_sds_request.h (revision f11c7f63056671247335df83a3fe80b94c6616ac)
1*f11c7f63SJim Harris /*-
2*f11c7f63SJim Harris  * This file is provided under a dual BSD/GPLv2 license.  When using or
3*f11c7f63SJim Harris  * redistributing this file, you may do so under either license.
4*f11c7f63SJim Harris  *
5*f11c7f63SJim Harris  * GPL LICENSE SUMMARY
6*f11c7f63SJim Harris  *
7*f11c7f63SJim Harris  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8*f11c7f63SJim Harris  *
9*f11c7f63SJim Harris  * This program is free software; you can redistribute it and/or modify
10*f11c7f63SJim Harris  * it under the terms of version 2 of the GNU General Public License as
11*f11c7f63SJim Harris  * published by the Free Software Foundation.
12*f11c7f63SJim Harris  *
13*f11c7f63SJim Harris  * This program is distributed in the hope that it will be useful, but
14*f11c7f63SJim Harris  * WITHOUT ANY WARRANTY; without even the implied warranty of
15*f11c7f63SJim Harris  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16*f11c7f63SJim Harris  * General Public License for more details.
17*f11c7f63SJim Harris  *
18*f11c7f63SJim Harris  * You should have received a copy of the GNU General Public License
19*f11c7f63SJim Harris  * along with this program; if not, write to the Free Software
20*f11c7f63SJim Harris  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21*f11c7f63SJim Harris  * The full GNU General Public License is included in this distribution
22*f11c7f63SJim Harris  * in the file called LICENSE.GPL.
23*f11c7f63SJim Harris  *
24*f11c7f63SJim Harris  * BSD LICENSE
25*f11c7f63SJim Harris  *
26*f11c7f63SJim Harris  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27*f11c7f63SJim Harris  * All rights reserved.
28*f11c7f63SJim Harris  *
29*f11c7f63SJim Harris  * Redistribution and use in source and binary forms, with or without
30*f11c7f63SJim Harris  * modification, are permitted provided that the following conditions
31*f11c7f63SJim Harris  * are met:
32*f11c7f63SJim Harris  *
33*f11c7f63SJim Harris  *   * Redistributions of source code must retain the above copyright
34*f11c7f63SJim Harris  *     notice, this list of conditions and the following disclaimer.
35*f11c7f63SJim Harris  *   * Redistributions in binary form must reproduce the above copyright
36*f11c7f63SJim Harris  *     notice, this list of conditions and the following disclaimer in
37*f11c7f63SJim Harris  *     the documentation and/or other materials provided with the
38*f11c7f63SJim Harris  *     distribution.
39*f11c7f63SJim Harris  *
40*f11c7f63SJim Harris  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
41*f11c7f63SJim Harris  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
42*f11c7f63SJim Harris  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
43*f11c7f63SJim Harris  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
44*f11c7f63SJim Harris  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
45*f11c7f63SJim Harris  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
46*f11c7f63SJim Harris  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
47*f11c7f63SJim Harris  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
48*f11c7f63SJim Harris  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49*f11c7f63SJim Harris  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
50*f11c7f63SJim Harris  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51*f11c7f63SJim Harris  *
52*f11c7f63SJim Harris  * $FreeBSD$
53*f11c7f63SJim Harris  */
54*f11c7f63SJim Harris #ifndef _SCIC_SDS_IO_REQUEST_H_
55*f11c7f63SJim Harris #define _SCIC_SDS_IO_REQUEST_H_
56*f11c7f63SJim Harris 
57*f11c7f63SJim Harris /**
58*f11c7f63SJim Harris  * @file
59*f11c7f63SJim Harris  *
60*f11c7f63SJim Harris  * @brief This file contains the structures, constants and prototypes for the
61*f11c7f63SJim Harris  *        SCIC_SDS_IO_REQUEST object.
62*f11c7f63SJim Harris  */
63*f11c7f63SJim Harris 
64*f11c7f63SJim Harris #ifdef __cplusplus
65*f11c7f63SJim Harris extern "C" {
66*f11c7f63SJim Harris #endif // __cplusplus
67*f11c7f63SJim Harris 
68*f11c7f63SJim Harris #include <dev/isci/scil/scic_io_request.h>
69*f11c7f63SJim Harris 
70*f11c7f63SJim Harris #include <dev/isci/scil/sci_base_request.h>
71*f11c7f63SJim Harris #include <dev/isci/scil/sci_base_state_machine_logger.h>
72*f11c7f63SJim Harris #include <dev/isci/scil/scu_task_context.h>
73*f11c7f63SJim Harris #include <dev/isci/scil/intel_sas.h>
74*f11c7f63SJim Harris 
75*f11c7f63SJim Harris struct SCIC_SDS_CONTROLLER;
76*f11c7f63SJim Harris struct SCIC_SDS_REMOTE_DEVICE;
77*f11c7f63SJim Harris struct SCIC_SDS_IO_REQUEST_STATE_HANDLER;
78*f11c7f63SJim Harris 
79*f11c7f63SJim Harris /**
80*f11c7f63SJim Harris  * @enum _SCIC_SDS_IO_REQUEST_STARTED_TASK_MGMT_SUBSTATES
81*f11c7f63SJim Harris  *
82*f11c7f63SJim Harris  * @brief This enumeration depicts all of the substates for a task
83*f11c7f63SJim Harris  *        management request to be performed in the STARTED super-state.
84*f11c7f63SJim Harris  */
85*f11c7f63SJim Harris typedef enum _SCIC_SDS_RAW_REQUEST_STARTED_TASK_MGMT_SUBSTATES
86*f11c7f63SJim Harris {
87*f11c7f63SJim Harris    /**
88*f11c7f63SJim Harris     * The AWAIT_TC_COMPLETION sub-state indicates that the started raw
89*f11c7f63SJim Harris     * task management request is waiting for the transmission of the
90*f11c7f63SJim Harris     * initial frame (i.e. command, task, etc.).
91*f11c7f63SJim Harris     */
92*f11c7f63SJim Harris    SCIC_SDS_IO_REQUEST_STARTED_TASK_MGMT_SUBSTATE_AWAIT_TC_COMPLETION,
93*f11c7f63SJim Harris 
94*f11c7f63SJim Harris    /**
95*f11c7f63SJim Harris     * This sub-state indicates that the started task management request
96*f11c7f63SJim Harris     * is waiting for the reception of an unsolicited frame
97*f11c7f63SJim Harris     * (i.e. response IU).
98*f11c7f63SJim Harris     */
99*f11c7f63SJim Harris    SCIC_SDS_IO_REQUEST_STARTED_TASK_MGMT_SUBSTATE_AWAIT_TC_RESPONSE,
100*f11c7f63SJim Harris 
101*f11c7f63SJim Harris    SCIC_SDS_IO_REQUEST_STARTED_TASK_MGMT_MAX_SUBSTATES
102*f11c7f63SJim Harris 
103*f11c7f63SJim Harris } SCIC_SDS_RAW_REQUEST_STARTED_TASK_MGMT_SUBSTATES;
104*f11c7f63SJim Harris 
105*f11c7f63SJim Harris 
106*f11c7f63SJim Harris /**
107*f11c7f63SJim Harris  * @enum _SCIC_SDS_SMP_REQUEST_STARTED_SUBSTATES
108*f11c7f63SJim Harris  *
109*f11c7f63SJim Harris  * @brief This enumeration depicts all of the substates for a SMP
110*f11c7f63SJim Harris  *        request to be performed in the STARTED super-state.
111*f11c7f63SJim Harris  */
112*f11c7f63SJim Harris typedef enum _SCIC_SDS_SMP_REQUEST_STARTED_SUBSTATES
113*f11c7f63SJim Harris {
114*f11c7f63SJim Harris    /**
115*f11c7f63SJim Harris     * This sub-state indicates that the started task management request
116*f11c7f63SJim Harris     * is waiting for the reception of an unsolicited frame
117*f11c7f63SJim Harris     * (i.e. response IU).
118*f11c7f63SJim Harris     */
119*f11c7f63SJim Harris    SCIC_SDS_SMP_REQUEST_STARTED_SUBSTATE_AWAIT_RESPONSE,
120*f11c7f63SJim Harris 
121*f11c7f63SJim Harris    /**
122*f11c7f63SJim Harris     * The AWAIT_TC_COMPLETION sub-state indicates that the started SMP request is
123*f11c7f63SJim Harris     * waiting for the transmission of the initial frame (i.e. command, task, etc.).
124*f11c7f63SJim Harris     */
125*f11c7f63SJim Harris    SCIC_SDS_SMP_REQUEST_STARTED_SUBSTATE_AWAIT_TC_COMPLETION,
126*f11c7f63SJim Harris 
127*f11c7f63SJim Harris    SCIC_SDS_SMP_REQUEST_STARTED_MAX_SUBSTATES
128*f11c7f63SJim Harris 
129*f11c7f63SJim Harris } SCIC_SDS_SMP_REQUEST_STARTED_SUBSTATES;
130*f11c7f63SJim Harris 
131*f11c7f63SJim Harris /**
132*f11c7f63SJim Harris  * @struct SCIC_SDS_IO_REQUEST
133*f11c7f63SJim Harris  *
134*f11c7f63SJim Harris  * @brief This structure contains or references all of the data necessary
135*f11c7f63SJim Harris  *        to process a task management or normal IO request.
136*f11c7f63SJim Harris  */
137*f11c7f63SJim Harris typedef struct SCIC_SDS_REQUEST
138*f11c7f63SJim Harris {
139*f11c7f63SJim Harris    /**
140*f11c7f63SJim Harris     * This field indictes the parent object of the request.
141*f11c7f63SJim Harris     */
142*f11c7f63SJim Harris    SCI_BASE_REQUEST_T parent;
143*f11c7f63SJim Harris 
144*f11c7f63SJim Harris    void *user_request;
145*f11c7f63SJim Harris 
146*f11c7f63SJim Harris    /**
147*f11c7f63SJim Harris     * This field simply points to the controller to which this IO request
148*f11c7f63SJim Harris     * is associated.
149*f11c7f63SJim Harris     */
150*f11c7f63SJim Harris    struct SCIC_SDS_CONTROLLER    *owning_controller;
151*f11c7f63SJim Harris 
152*f11c7f63SJim Harris    /**
153*f11c7f63SJim Harris     * This field simply points to the remote device to which this IO request
154*f11c7f63SJim Harris     * is associated.
155*f11c7f63SJim Harris     */
156*f11c7f63SJim Harris    struct SCIC_SDS_REMOTE_DEVICE *target_device;
157*f11c7f63SJim Harris 
158*f11c7f63SJim Harris    /**
159*f11c7f63SJim Harris     * This field is utilized to determine if the SCI user is managing
160*f11c7f63SJim Harris     * the IO tag for this request or if the core is managing it.
161*f11c7f63SJim Harris     */
162*f11c7f63SJim Harris    BOOL was_tag_assigned_by_user;
163*f11c7f63SJim Harris 
164*f11c7f63SJim Harris    /**
165*f11c7f63SJim Harris     * This field indicates the IO tag for this request.  The IO tag is
166*f11c7f63SJim Harris     * comprised of the task_index and a sequence count. The sequence count
167*f11c7f63SJim Harris     * is utilized to help identify tasks from one life to another.
168*f11c7f63SJim Harris     */
169*f11c7f63SJim Harris    U16 io_tag;
170*f11c7f63SJim Harris 
171*f11c7f63SJim Harris    /**
172*f11c7f63SJim Harris    * This field specifies the sat protocol being utilized for this
173*f11c7f63SJim Harris    * IO request, such as SAT_PROTOCOL_PIO_DATA_IN, SAT_PROTOCOL_FPDMA etc.
174*f11c7f63SJim Harris    */
175*f11c7f63SJim Harris    U8 sat_protocol;
176*f11c7f63SJim Harris 
177*f11c7f63SJim Harris    /**
178*f11c7f63SJim Harris     * This field specifies the protocol being utilized for this
179*f11c7f63SJim Harris     * IO request.
180*f11c7f63SJim Harris     */
181*f11c7f63SJim Harris    SCIC_TRANSPORT_PROTOCOL protocol;
182*f11c7f63SJim Harris 
183*f11c7f63SJim Harris    /**
184*f11c7f63SJim Harris     * This field indicates the completion status taken from the SCUs
185*f11c7f63SJim Harris     * completion code.  It indicates the completion result for the SCU hardware.
186*f11c7f63SJim Harris     */
187*f11c7f63SJim Harris    U32 scu_status;
188*f11c7f63SJim Harris 
189*f11c7f63SJim Harris    /**
190*f11c7f63SJim Harris     * This field indicates the completion status returned to the SCI user.  It
191*f11c7f63SJim Harris     * indicates the users view of the io request completion.
192*f11c7f63SJim Harris     */
193*f11c7f63SJim Harris    U32 sci_status;
194*f11c7f63SJim Harris 
195*f11c7f63SJim Harris    /**
196*f11c7f63SJim Harris     * This field contains the value to be utilized when posting (e.g. Post_TC,
197*f11c7f63SJim Harris     * Post_TC_Abort) this request to the silicon.
198*f11c7f63SJim Harris     */
199*f11c7f63SJim Harris    U32 post_context;
200*f11c7f63SJim Harris 
201*f11c7f63SJim Harris    void                   *command_buffer;
202*f11c7f63SJim Harris    void                   *response_buffer;
203*f11c7f63SJim Harris    SCU_TASK_CONTEXT_T     *task_context_buffer;
204*f11c7f63SJim Harris    SCU_SGL_ELEMENT_PAIR_T *sgl_element_pair_buffer;
205*f11c7f63SJim Harris 
206*f11c7f63SJim Harris    /**
207*f11c7f63SJim Harris     * This field indicates if this request is a task management request or
208*f11c7f63SJim Harris     * normal IO request.
209*f11c7f63SJim Harris     */
210*f11c7f63SJim Harris    BOOL is_task_management_request;
211*f11c7f63SJim Harris 
212*f11c7f63SJim Harris    /**
213*f11c7f63SJim Harris     * This field indicates that this request contains an initialized started
214*f11c7f63SJim Harris     * substate machine.
215*f11c7f63SJim Harris     */
216*f11c7f63SJim Harris    BOOL has_started_substate_machine;
217*f11c7f63SJim Harris 
218*f11c7f63SJim Harris    /**
219*f11c7f63SJim Harris     * This field is a pointer to the stored rx frame data.  It is used in STP
220*f11c7f63SJim Harris     * internal requests and SMP response frames.  If this field is non-NULL the
221*f11c7f63SJim Harris     * saved frame must be released on IO request completion.
222*f11c7f63SJim Harris     *
223*f11c7f63SJim Harris     * @todo In the future do we want to keep a list of RX frame buffers?
224*f11c7f63SJim Harris     */
225*f11c7f63SJim Harris    U32 saved_rx_frame_index;
226*f11c7f63SJim Harris 
227*f11c7f63SJim Harris    /**
228*f11c7f63SJim Harris     * This field specifies the data necessary to manage the sub-state
229*f11c7f63SJim Harris     * machine executed while in the SCI_BASE_REQUEST_STATE_STARTED state.
230*f11c7f63SJim Harris     */
231*f11c7f63SJim Harris    SCI_BASE_STATE_MACHINE_T started_substate_machine;
232*f11c7f63SJim Harris 
233*f11c7f63SJim Harris    /**
234*f11c7f63SJim Harris     * This field specifies the current state handlers in place for this
235*f11c7f63SJim Harris     * IO Request object.  This field is updated each time the request
236*f11c7f63SJim Harris     * changes state.
237*f11c7f63SJim Harris     */
238*f11c7f63SJim Harris    struct SCIC_SDS_IO_REQUEST_STATE_HANDLER *state_handlers;
239*f11c7f63SJim Harris 
240*f11c7f63SJim Harris    #ifdef SCI_LOGGING
241*f11c7f63SJim Harris    /**
242*f11c7f63SJim Harris     * This field is the observer of the started subsate machine
243*f11c7f63SJim Harris     */
244*f11c7f63SJim Harris    SCI_BASE_STATE_MACHINE_LOGGER_T started_substate_machine_logger;
245*f11c7f63SJim Harris    #endif
246*f11c7f63SJim Harris 
247*f11c7f63SJim Harris    /**
248*f11c7f63SJim Harris     * This field in the recorded device sequence for the io request.  This is
249*f11c7f63SJim Harris     * recorded during the build operation and is compared in the start
250*f11c7f63SJim Harris     * operation.  If the sequence is different then there was a change of
251*f11c7f63SJim Harris     * devices from the build to start operations.
252*f11c7f63SJim Harris     */
253*f11c7f63SJim Harris    U8  device_sequence;
254*f11c7f63SJim Harris 
255*f11c7f63SJim Harris } SCIC_SDS_REQUEST_T;
256*f11c7f63SJim Harris 
257*f11c7f63SJim Harris 
258*f11c7f63SJim Harris typedef SCI_STATUS (*SCIC_SDS_IO_REQUEST_FRAME_HANDLER_T)(
259*f11c7f63SJim Harris                          SCIC_SDS_REQUEST_T * this_request,
260*f11c7f63SJim Harris                          U32                  frame_index);
261*f11c7f63SJim Harris 
262*f11c7f63SJim Harris typedef SCI_STATUS (*SCIC_SDS_IO_REQUEST_EVENT_HANDLER_T)(
263*f11c7f63SJim Harris                          SCIC_SDS_REQUEST_T * this_request,
264*f11c7f63SJim Harris                          U32                  event_code);
265*f11c7f63SJim Harris 
266*f11c7f63SJim Harris typedef SCI_STATUS (*SCIC_SDS_IO_REQUEST_TASK_COMPLETION_HANDLER_T)(
267*f11c7f63SJim Harris                          SCIC_SDS_REQUEST_T * this_request,
268*f11c7f63SJim Harris                          U32                  completion_code);
269*f11c7f63SJim Harris 
270*f11c7f63SJim Harris /**
271*f11c7f63SJim Harris  * @struct SCIC_SDS_IO_REQUEST_STATE_HANDLER
272*f11c7f63SJim Harris  *
273*f11c7f63SJim Harris  * @brief This is the SDS core definition of the state handlers.
274*f11c7f63SJim Harris  */
275*f11c7f63SJim Harris typedef struct SCIC_SDS_IO_REQUEST_STATE_HANDLER
276*f11c7f63SJim Harris {
277*f11c7f63SJim Harris    SCI_BASE_REQUEST_STATE_HANDLER_T parent;
278*f11c7f63SJim Harris 
279*f11c7f63SJim Harris    SCIC_SDS_IO_REQUEST_TASK_COMPLETION_HANDLER_T  tc_completion_handler;
280*f11c7f63SJim Harris    SCIC_SDS_IO_REQUEST_EVENT_HANDLER_T            event_handler;
281*f11c7f63SJim Harris    SCIC_SDS_IO_REQUEST_FRAME_HANDLER_T            frame_handler;
282*f11c7f63SJim Harris 
283*f11c7f63SJim Harris } SCIC_SDS_IO_REQUEST_STATE_HANDLER_T;
284*f11c7f63SJim Harris 
285*f11c7f63SJim Harris extern SCI_BASE_STATE_T scic_sds_request_state_table[];
286*f11c7f63SJim Harris extern SCIC_SDS_IO_REQUEST_STATE_HANDLER_T
287*f11c7f63SJim Harris        scic_sds_request_state_handler_table[];
288*f11c7f63SJim Harris 
289*f11c7f63SJim Harris extern SCI_BASE_STATE_T scic_sds_io_request_started_task_mgmt_substate_table[];
290*f11c7f63SJim Harris extern SCIC_SDS_IO_REQUEST_STATE_HANDLER_T
291*f11c7f63SJim Harris        scic_sds_ssp_task_request_started_substate_handler_table[];
292*f11c7f63SJim Harris 
293*f11c7f63SJim Harris extern SCI_BASE_STATE_T scic_sds_smp_request_started_substate_table[];
294*f11c7f63SJim Harris extern SCIC_SDS_IO_REQUEST_STATE_HANDLER_T
295*f11c7f63SJim Harris        scic_sds_smp_request_started_substate_handler_table[];
296*f11c7f63SJim Harris 
297*f11c7f63SJim Harris /**
298*f11c7f63SJim Harris  * This macro returns the maximum number of SGL element paris that we will
299*f11c7f63SJim Harris  * support in a single IO request.
300*f11c7f63SJim Harris  */
301*f11c7f63SJim Harris #define SCU_MAX_SGL_ELEMENT_PAIRS ((SCU_IO_REQUEST_SGE_COUNT + 1) / 2)
302*f11c7f63SJim Harris 
303*f11c7f63SJim Harris /**
304*f11c7f63SJim Harris  * This macro will return the controller for this io request object
305*f11c7f63SJim Harris  */
306*f11c7f63SJim Harris #define scic_sds_request_get_controller(this_request) \
307*f11c7f63SJim Harris    ((this_request)->owning_controller)
308*f11c7f63SJim Harris 
309*f11c7f63SJim Harris /**
310*f11c7f63SJim Harris  * This macro will return the device for this io request object
311*f11c7f63SJim Harris  */
312*f11c7f63SJim Harris #define scic_sds_request_get_device(this_request) \
313*f11c7f63SJim Harris    ((this_request)->target_device)
314*f11c7f63SJim Harris 
315*f11c7f63SJim Harris /**
316*f11c7f63SJim Harris  * This macro will return the port for this io request object
317*f11c7f63SJim Harris  */
318*f11c7f63SJim Harris #define scic_sds_request_get_port(this_request) \
319*f11c7f63SJim Harris    scic_sds_remote_device_get_port(scic_sds_request_get_device(this_request))
320*f11c7f63SJim Harris 
321*f11c7f63SJim Harris /**
322*f11c7f63SJim Harris  * This macro returns the constructed post context result for the io
323*f11c7f63SJim Harris  * request.
324*f11c7f63SJim Harris  */
325*f11c7f63SJim Harris #define scic_sds_request_get_post_context(this_request) \
326*f11c7f63SJim Harris    ((this_request)->post_context)
327*f11c7f63SJim Harris 
328*f11c7f63SJim Harris /**
329*f11c7f63SJim Harris  * This is a helper macro to return the os handle for this request object.
330*f11c7f63SJim Harris  */
331*f11c7f63SJim Harris #define scic_sds_request_get_task_context(request) \
332*f11c7f63SJim Harris    ((request)->task_context_buffer)
333*f11c7f63SJim Harris 
334*f11c7f63SJim Harris #define CACHE_LINE_SIZE (64)
335*f11c7f63SJim Harris #define scic_sds_request_align_task_context_buffer(address) \
336*f11c7f63SJim Harris    ((SCU_TASK_CONTEXT_T *)( \
337*f11c7f63SJim Harris        (((POINTER_UINT)(address)) + (CACHE_LINE_SIZE - 1)) \
338*f11c7f63SJim Harris      & ~(CACHE_LINE_SIZE - 1) \
339*f11c7f63SJim Harris    ))
340*f11c7f63SJim Harris 
341*f11c7f63SJim Harris /**
342*f11c7f63SJim Harris  * This macro will align the memory address so that it is correct for the SCU
343*f11c7f63SJim Harris  * hardware to DMA the SGL element pairs.
344*f11c7f63SJim Harris  */
345*f11c7f63SJim Harris #define scic_sds_request_align_sgl_element_buffer(address) \
346*f11c7f63SJim Harris    ((SCU_SGL_ELEMENT_PAIR_T *)( \
347*f11c7f63SJim Harris      ((char *)(address)) \
348*f11c7f63SJim Harris    + ( \
349*f11c7f63SJim Harris          ((~(POINTER_UINT)(address)) + 1) \
350*f11c7f63SJim Harris        & (sizeof(SCU_SGL_ELEMENT_PAIR_T) - 1) \
351*f11c7f63SJim Harris      ) \
352*f11c7f63SJim Harris    ))
353*f11c7f63SJim Harris 
354*f11c7f63SJim Harris /**
355*f11c7f63SJim Harris  * This macro will set the scu hardware status and sci request completion
356*f11c7f63SJim Harris  * status for an io request.
357*f11c7f63SJim Harris  */
358*f11c7f63SJim Harris #define scic_sds_request_set_status(request, scu_status_code, sci_status_code) \
359*f11c7f63SJim Harris { \
360*f11c7f63SJim Harris    (request)->scu_status = (scu_status_code); \
361*f11c7f63SJim Harris    (request)->sci_status = (sci_status_code); \
362*f11c7f63SJim Harris }
363*f11c7f63SJim Harris 
364*f11c7f63SJim Harris #define scic_sds_request_complete(a_request) \
365*f11c7f63SJim Harris    ((a_request)->state_handlers->parent.complete_handler(&(a_request)->parent))
366*f11c7f63SJim Harris 
367*f11c7f63SJim Harris U32 scic_sds_request_get_min_timer_count(void);
368*f11c7f63SJim Harris 
369*f11c7f63SJim Harris U32 scic_sds_request_get_max_timer_count(void);
370*f11c7f63SJim Harris 
371*f11c7f63SJim Harris 
372*f11c7f63SJim Harris /**
373*f11c7f63SJim Harris  * This macro invokes the core state task completion handler for the
374*f11c7f63SJim Harris  * SCIC_SDS_IO_REQUEST_T object.
375*f11c7f63SJim Harris  */
376*f11c7f63SJim Harris #define scic_sds_io_request_tc_completion(this_request, completion_code) \
377*f11c7f63SJim Harris { \
378*f11c7f63SJim Harris    if (this_request->parent.state_machine.current_state_id  \
379*f11c7f63SJim Harris           == SCI_BASE_REQUEST_STATE_STARTED \
380*f11c7f63SJim Harris        && this_request->has_started_substate_machine \
381*f11c7f63SJim Harris           == FALSE) \
382*f11c7f63SJim Harris       scic_sds_request_started_state_tc_completion_handler(this_request, completion_code); \
383*f11c7f63SJim Harris    else \
384*f11c7f63SJim Harris       this_request->state_handlers->tc_completion_handler(this_request, completion_code); \
385*f11c7f63SJim Harris }
386*f11c7f63SJim Harris 
387*f11c7f63SJim Harris /**
388*f11c7f63SJim Harris  * This macro zeros the hardware SGL element data
389*f11c7f63SJim Harris  */
390*f11c7f63SJim Harris #define SCU_SGL_ZERO(scu_sge) \
391*f11c7f63SJim Harris { \
392*f11c7f63SJim Harris    (scu_sge).length = 0; \
393*f11c7f63SJim Harris    (scu_sge).address_lower = 0; \
394*f11c7f63SJim Harris    (scu_sge).address_upper = 0; \
395*f11c7f63SJim Harris    (scu_sge).address_modifier = 0; \
396*f11c7f63SJim Harris }
397*f11c7f63SJim Harris 
398*f11c7f63SJim Harris /**
399*f11c7f63SJim Harris  * This macro copys the SGL Element data from the host os to the hardware SGL
400*f11c7f63SJim Harris  * elment data
401*f11c7f63SJim Harris  */
402*f11c7f63SJim Harris #define SCU_SGL_COPY(os_handle, scu_sge, os_sge) \
403*f11c7f63SJim Harris { \
404*f11c7f63SJim Harris    (scu_sge).length = \
405*f11c7f63SJim Harris       scic_cb_sge_get_length_field(os_handle, os_sge); \
406*f11c7f63SJim Harris    (scu_sge).address_upper = \
407*f11c7f63SJim Harris       sci_cb_physical_address_upper(scic_cb_sge_get_address_field(os_handle, os_sge)); \
408*f11c7f63SJim Harris    (scu_sge).address_lower = \
409*f11c7f63SJim Harris       sci_cb_physical_address_lower(scic_cb_sge_get_address_field(os_handle, os_sge)); \
410*f11c7f63SJim Harris    (scu_sge).address_modifier = 0; \
411*f11c7f63SJim Harris }
412*f11c7f63SJim Harris 
413*f11c7f63SJim Harris //*****************************************************************************
414*f11c7f63SJim Harris //* CORE REQUEST PROTOTYPES
415*f11c7f63SJim Harris //*****************************************************************************
416*f11c7f63SJim Harris 
417*f11c7f63SJim Harris SCU_SGL_ELEMENT_PAIR_T *scic_sds_request_get_sgl_element_pair(
418*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request,
419*f11c7f63SJim Harris    U32                 sgl_pair_index
420*f11c7f63SJim Harris );
421*f11c7f63SJim Harris 
422*f11c7f63SJim Harris void scic_sds_request_build_sgl(
423*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
424*f11c7f63SJim Harris );
425*f11c7f63SJim Harris 
426*f11c7f63SJim Harris void scic_sds_ssp_io_request_assign_buffers(
427*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
428*f11c7f63SJim Harris );
429*f11c7f63SJim Harris 
430*f11c7f63SJim Harris void scic_sds_ssp_task_request_assign_buffers(
431*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
432*f11c7f63SJim Harris );
433*f11c7f63SJim Harris 
434*f11c7f63SJim Harris void scic_sds_stp_request_assign_buffers(
435*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T * this_request
436*f11c7f63SJim Harris );
437*f11c7f63SJim Harris 
438*f11c7f63SJim Harris void scic_sds_smp_request_assign_buffers(
439*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T * this_request
440*f11c7f63SJim Harris );
441*f11c7f63SJim Harris 
442*f11c7f63SJim Harris // ---------------------------------------------------------------------------
443*f11c7f63SJim Harris 
444*f11c7f63SJim Harris SCI_STATUS scic_sds_request_start(
445*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
446*f11c7f63SJim Harris );
447*f11c7f63SJim Harris 
448*f11c7f63SJim Harris SCI_STATUS scic_sds_io_request_terminate(
449*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
450*f11c7f63SJim Harris );
451*f11c7f63SJim Harris 
452*f11c7f63SJim Harris SCI_STATUS scic_sds_io_request_complete(
453*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
454*f11c7f63SJim Harris );
455*f11c7f63SJim Harris 
456*f11c7f63SJim Harris void scic_sds_io_request_copy_response(
457*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
458*f11c7f63SJim Harris );
459*f11c7f63SJim Harris 
460*f11c7f63SJim Harris SCI_STATUS scic_sds_io_request_event_handler(
461*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request,
462*f11c7f63SJim Harris    U32                    event_code
463*f11c7f63SJim Harris );
464*f11c7f63SJim Harris 
465*f11c7f63SJim Harris SCI_STATUS scic_sds_io_request_frame_handler(
466*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request,
467*f11c7f63SJim Harris    U32                    frame_index
468*f11c7f63SJim Harris );
469*f11c7f63SJim Harris 
470*f11c7f63SJim Harris SCI_STATUS scic_sds_task_request_complete(
471*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
472*f11c7f63SJim Harris );
473*f11c7f63SJim Harris 
474*f11c7f63SJim Harris SCI_STATUS scic_sds_task_request_terminate(
475*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
476*f11c7f63SJim Harris );
477*f11c7f63SJim Harris 
478*f11c7f63SJim Harris #ifdef SCI_LOGGING
479*f11c7f63SJim Harris void scic_sds_request_initialize_state_logging(
480*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
481*f11c7f63SJim Harris );
482*f11c7f63SJim Harris 
483*f11c7f63SJim Harris void scic_sds_request_deinitialize_state_logging(
484*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T *this_request
485*f11c7f63SJim Harris );
486*f11c7f63SJim Harris #else // SCI_LOGGING
487*f11c7f63SJim Harris #define scic_sds_request_initialize_state_logging(x)
488*f11c7f63SJim Harris #define scic_sds_request_deinitialize_state_logging(x)
489*f11c7f63SJim Harris #endif // SCI_LOGGING
490*f11c7f63SJim Harris 
491*f11c7f63SJim Harris //*****************************************************************************
492*f11c7f63SJim Harris //* DEFAULT STATE HANDLERS
493*f11c7f63SJim Harris //*****************************************************************************
494*f11c7f63SJim Harris 
495*f11c7f63SJim Harris SCI_STATUS scic_sds_request_default_start_handler(
496*f11c7f63SJim Harris    SCI_BASE_REQUEST_T *this_request
497*f11c7f63SJim Harris );
498*f11c7f63SJim Harris 
499*f11c7f63SJim Harris SCI_STATUS scic_sds_request_default_abort_handler(
500*f11c7f63SJim Harris    SCI_BASE_REQUEST_T *this_request
501*f11c7f63SJim Harris );
502*f11c7f63SJim Harris 
503*f11c7f63SJim Harris SCI_STATUS scic_sds_request_default_complete_handler(
504*f11c7f63SJim Harris    SCI_BASE_REQUEST_T *this_request
505*f11c7f63SJim Harris );
506*f11c7f63SJim Harris 
507*f11c7f63SJim Harris SCI_STATUS scic_sds_request_default_destruct_handler(
508*f11c7f63SJim Harris    SCI_BASE_REQUEST_T *this_request
509*f11c7f63SJim Harris );
510*f11c7f63SJim Harris 
511*f11c7f63SJim Harris SCI_STATUS scic_sds_request_default_tc_completion_handler(
512*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T * this_request,
513*f11c7f63SJim Harris    U32                  completion_code
514*f11c7f63SJim Harris );
515*f11c7f63SJim Harris 
516*f11c7f63SJim Harris SCI_STATUS scic_sds_request_default_event_handler(
517*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T * this_request,
518*f11c7f63SJim Harris    U32                  event_code
519*f11c7f63SJim Harris );
520*f11c7f63SJim Harris 
521*f11c7f63SJim Harris SCI_STATUS scic_sds_request_default_frame_handler(
522*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T * this_request,
523*f11c7f63SJim Harris    U32                  frame_index
524*f11c7f63SJim Harris );
525*f11c7f63SJim Harris 
526*f11c7f63SJim Harris //*****************************************************************************
527*f11c7f63SJim Harris //* STARTED STATE HANDLERS
528*f11c7f63SJim Harris //*****************************************************************************
529*f11c7f63SJim Harris 
530*f11c7f63SJim Harris SCI_STATUS scic_sds_request_started_state_abort_handler(
531*f11c7f63SJim Harris    SCI_BASE_REQUEST_T *this_request
532*f11c7f63SJim Harris );
533*f11c7f63SJim Harris 
534*f11c7f63SJim Harris SCI_STATUS scic_sds_request_started_state_tc_completion_handler(
535*f11c7f63SJim Harris    SCIC_SDS_REQUEST_T * this_request,
536*f11c7f63SJim Harris    U32                  completion_code
537*f11c7f63SJim Harris );
538*f11c7f63SJim Harris 
539*f11c7f63SJim Harris #ifdef __cplusplus
540*f11c7f63SJim Harris }
541*f11c7f63SJim Harris #endif // __cplusplus
542*f11c7f63SJim Harris 
543*f11c7f63SJim Harris #endif // _SCIC_SDS_IO_REQUEST_H_
544