xref: /freebsd/sys/dev/isci/scil/sati_write_and_verify.c (revision e0c4386e7e71d93b0edc0c8fa156263fc4a8b0b6)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
3  *
4  * This file is provided under a dual BSD/GPLv2 license.  When using or
5  * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
23 * The full GNU General Public License is included in this distribution
24 * in the file called LICENSE.GPL.
25 *
26 * BSD LICENSE
27 *
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 *
35 *   * Redistributions of source code must retain the above copyright
36 *     notice, this list of conditions and the following disclaimer.
37 *   * Redistributions in binary form must reproduce the above copyright
38 *     notice, this list of conditions and the following disclaimer in
39 *     the documentation and/or other materials provided with the
40 *     distribution.
41 *
42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53  */
54 
55 #include <sys/cdefs.h>
56 /**
57 * @file
58 * @brief This file contains the method implementations to translate
59 *        SCSI Write and Verify command based of the SAT spec.
60 */
61 
62 #if !defined(DISABLE_SATI_WRITE_AND_VERIFY)
63 
64 #include <dev/isci/scil/sati_write_and_verify.h>
65 #include <dev/isci/scil/sati_write.h>
66 #include <dev/isci/scil/sati_verify.h>
67 #include <dev/isci/scil/sati_callbacks.h>
68 #include <dev/isci/scil/sati_util.h>
69 
70 #include <dev/isci/scil/intel_ata.h>
71 #include <dev/isci/scil/intel_scsi.h>
72 
73 /**
74 * @brief This function translates a SCSI Write and Verify 10 command
75 *        into both ATA write and ATA read verify commands. This
76 *        happens by passing the SCSI IO, ATA IO, and Sequence pointers
77 *        to both the sati_write_10_translate_command and the
78 *        sati_verify_10_translate_command.
79 *
80 * @return Indicate if the command translation succeeded.
81 * @retval SCI_SUCCESS This is returned if the command translation was
82 *         successful.
83 * @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
84 *         a problem with the translation of write long.
85 * @retval SATI_FAILURE is returned if there the sequence is out of
86 *         state for a sati_write_and_verify_10 translation.
87 *
88 */
89 SATI_STATUS sati_write_and_verify_10_translate_command(
90    SATI_TRANSLATOR_SEQUENCE_T * sequence,
91    void                       * scsi_io,
92    void                       * ata_io
93 )
94 {
95    SATI_STATUS status;
96 
97    if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
98    {
99       status = sati_write_10_translate_command(sequence, scsi_io, ata_io);
100       sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
101       sequence->is_translate_response_required = TRUE;
102    }
103    else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
104    {
105       status = sati_verify_10_translate_command(sequence, scsi_io, ata_io);
106       sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
107    }
108    else
109    {
110       //SATI sequence is in the wrong state
111       return SATI_FAILURE;
112    }
113 
114    sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
115    return status;
116 }
117 
118 /**
119 * @brief This function translates a SCSI Write and Verify 12 command
120 *        into both ATA write and ATA read verify commands. This
121 *        happens by passing the SCSI IO, ATA IO, and Sequence pointers
122 *        to both the sati_write_12_translate_command and the
123 *        sati_verify_12_translate_command.
124 *
125 * @return Indicate if the command translation succeeded.
126 * @retval SCI_SUCCESS This is returned if the command translation was
127 *         successful.
128 * @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
129 *         a problem with the translation of write long.
130 * @retval SATI_FAILURE is returned if there the sequence is out of
131 *         state for a sati_write_and_verify_12 translation.
132 *
133 */
134 SATI_STATUS sati_write_and_verify_12_translate_command(
135    SATI_TRANSLATOR_SEQUENCE_T * sequence,
136    void                       * scsi_io,
137    void                       * ata_io
138 )
139 {
140    SATI_STATUS status;
141 
142    if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
143    {
144       status = sati_write_12_translate_command(sequence, scsi_io, ata_io);
145       sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
146       sequence->is_translate_response_required = TRUE;
147    }
148    else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
149    {
150       status = sati_verify_12_translate_command(sequence, scsi_io, ata_io);
151       sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
152    }
153    else
154    {
155       //SATI sequence is in the wrong state
156       return SATI_FAILURE;
157    }
158 
159    sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
160    return status;
161 }
162 
163 /**
164 * @brief This function translates a SCSI Write and Verify 16 command
165 *        into both ATA write and ATA read verify commands. This
166 *        happens by passing the SCSI IO, ATA IO, and Sequence pointers
167 *        to both the sati_write_16_translate_command and the
168 *        sati_verify_16_translate_command.
169 *
170 * @return Indicate if the command translation succeeded.
171 * @retval SCI_SUCCESS This is returned if the command translation was
172 *         successful.
173 * @retval SATI_FAILURE_CHECK_RESPONSE_DATA is returned if there was
174 *         a problem with the translation of write long.
175 * @retval SATI_FAILURE is returned if there the sequence is out of
176 *         state for a sati_write_and_verify_16 translation.
177 *
178 */
179 SATI_STATUS sati_write_and_verify_16_translate_command(
180    SATI_TRANSLATOR_SEQUENCE_T * sequence,
181    void                       * scsi_io,
182    void                       * ata_io
183 )
184 {
185    SATI_STATUS status;
186 
187    if(sequence->state == SATI_SEQUENCE_STATE_INITIAL)
188    {
189       status = sati_write_16_translate_command(sequence, scsi_io, ata_io);
190       sequence->state = SATI_SEQUENCE_STATE_INCOMPLETE;
191       sequence->is_translate_response_required = TRUE;
192    }
193    else if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
194    {
195       status = sati_verify_16_translate_command(sequence, scsi_io, ata_io);
196       sequence->state = SATI_SEQUENCE_STATE_AWAIT_RESPONSE;
197    }
198    else
199    {
200       //SATI sequence is in the wrong state
201       return SATI_FAILURE;
202    }
203 
204    sequence->type = SATI_SEQUENCE_WRITE_AND_VERIFY;
205    return status;
206 }
207 
208 /**
209 * @brief This function is the response to a sati_write_and_verify
210          translation. Since no response translation is required
211          this function will only check the sequence state and return
212          status.
213 *
214 * @return Indicate if the command response translation succeeded.
215 * @retval SCI_COMPLETE This is returned if the command translation
216           is successful and requires no more work.
217 * @retval SATI_SEQUENCE_INCOMPLETE This is returned if the command
218           translation has finished sending the ATA Write command but
219           still needs to complete the Verify portion.
220 * @retval SATI_FAILURE is returned if there the sequence is out of
221 *         state for a sati_write_and_verify translation.
222 *
223 */
224 SATI_STATUS sati_write_and_verify_translate_response(
225    SATI_TRANSLATOR_SEQUENCE_T * sequence,
226    void                       * scsi_io,
227    void                       * ata_io
228 )
229 {
230    if(sequence->state == SATI_SEQUENCE_STATE_INCOMPLETE)
231    {
232       return SATI_SEQUENCE_INCOMPLETE;
233    }
234    else if(sequence->state == SATI_SEQUENCE_STATE_AWAIT_RESPONSE)
235    {
236       sequence->state = SATI_SEQUENCE_STATE_FINAL;
237       return SATI_COMPLETE;
238    }
239 
240    return SATI_FAILURE;
241 }
242 
243 #endif //!defined(DISABLE_SATI_WRITE_AND_VERIFY)
244