1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <dev/isci/isci.h> 35 36 #include <sys/sysctl.h> 37 #include <sys/malloc.h> 38 39 #include <cam/cam_periph.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 44 #include <dev/isci/scil/scic_logger.h> 45 #include <dev/isci/scil/scic_library.h> 46 #include <dev/isci/scil/scic_user_callback.h> 47 48 #include <dev/isci/scil/scif_controller.h> 49 #include <dev/isci/scil/scif_library.h> 50 #include <dev/isci/scil/scif_logger.h> 51 #include <dev/isci/scil/scif_user_callback.h> 52 53 MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 54 55 struct isci_softc *g_isci; 56 uint32_t g_isci_debug_level = 0; 57 58 static int isci_probe(device_t); 59 static int isci_attach(device_t); 60 static int isci_detach(device_t); 61 62 int isci_initialize(struct isci_softc *isci); 63 64 void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 65 int nseg, int error); 66 67 static devclass_t isci_devclass; 68 69 static device_method_t isci_pci_methods[] = { 70 /* Device interface */ 71 DEVMETHOD(device_probe, isci_probe), 72 DEVMETHOD(device_attach, isci_attach), 73 DEVMETHOD(device_detach, isci_detach), 74 { 0, 0 } 75 }; 76 77 static driver_t isci_pci_driver = { 78 "isci", 79 isci_pci_methods, 80 sizeof(struct isci_softc), 81 }; 82 83 DRIVER_MODULE(isci, pci, isci_pci_driver, isci_devclass, 0, 0); 84 85 static struct _pcsid 86 { 87 u_int32_t type; 88 const char *desc; 89 } pci_ids[] = { 90 { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 91 { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 92 { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 93 { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 94 { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 95 { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 96 { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 97 { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 98 { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 99 { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 100 { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 101 { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 102 { 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" }, 103 { 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" }, 104 { 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" }, 105 { 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 106 { 0x00000000, NULL } 107 }; 108 109 static int 110 isci_probe (device_t device) 111 { 112 u_int32_t type = pci_get_devid(device); 113 struct _pcsid *ep = pci_ids; 114 115 while (ep->type && ep->type != type) 116 ++ep; 117 118 if (ep->desc) 119 { 120 device_set_desc(device, ep->desc); 121 return (BUS_PROBE_DEFAULT); 122 } 123 else 124 return (ENXIO); 125 } 126 127 static int 128 isci_allocate_pci_memory(struct isci_softc *isci) 129 { 130 int i; 131 132 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 133 { 134 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 135 136 pci_bar->resource_id = PCIR_BAR(i*2); 137 pci_bar->resource = bus_alloc_resource(isci->device, 138 SYS_RES_MEMORY, &pci_bar->resource_id, 0, ~0, 1, 139 RF_ACTIVE); 140 141 if(pci_bar->resource == NULL) 142 isci_log_message(0, "ISCI", 143 "unable to allocate pci resource\n"); 144 else { 145 pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 146 pci_bar->bus_handle = 147 rman_get_bushandle(pci_bar->resource); 148 } 149 } 150 151 return (0); 152 } 153 154 static int 155 isci_attach(device_t device) 156 { 157 int error; 158 struct isci_softc *isci = DEVICE2SOFTC(device); 159 160 g_isci = isci; 161 isci->device = device; 162 163 isci_allocate_pci_memory(isci); 164 165 error = isci_initialize(isci); 166 167 if (error) 168 { 169 isci_detach(device); 170 return (error); 171 } 172 173 isci_interrupt_setup(isci); 174 isci_sysctl_initialize(isci); 175 176 return (0); 177 } 178 179 static int 180 isci_detach(device_t device) 181 { 182 struct isci_softc *isci = DEVICE2SOFTC(device); 183 int i; 184 185 for (i = 0; i < isci->controller_count; i++) { 186 struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 187 SCI_STATUS status; 188 void *unmap_buffer; 189 190 if (controller->scif_controller_handle != NULL) { 191 scic_controller_disable_interrupts( 192 scif_controller_get_scic_handle(controller->scif_controller_handle)); 193 194 mtx_lock(&controller->lock); 195 status = scif_controller_stop(controller->scif_controller_handle, 0); 196 mtx_unlock(&controller->lock); 197 198 while (controller->is_started == TRUE) { 199 /* Now poll for interrupts until the controller stop complete 200 * callback is received. 201 */ 202 mtx_lock(&controller->lock); 203 isci_interrupt_poll_handler(controller); 204 mtx_unlock(&controller->lock); 205 pause("isci", 1); 206 } 207 208 if(controller->sim != NULL) { 209 mtx_lock(&controller->lock); 210 xpt_free_path(controller->path); 211 xpt_bus_deregister(cam_sim_path(controller->sim)); 212 cam_sim_free(controller->sim, TRUE); 213 mtx_unlock(&controller->lock); 214 } 215 } 216 217 if (controller->timer_memory != NULL) 218 free(controller->timer_memory, M_ISCI); 219 220 if (controller->remote_device_memory != NULL) 221 free(controller->remote_device_memory, M_ISCI); 222 223 while (1) { 224 sci_pool_get(controller->unmap_buffer_pool, unmap_buffer); 225 if (unmap_buffer == NULL) 226 break; 227 contigfree(unmap_buffer, PAGE_SIZE, M_ISCI); 228 } 229 } 230 231 /* The SCIF controllers have been stopped, so we can now 232 * free the SCI library memory. 233 */ 234 if (isci->sci_library_memory != NULL) 235 free(isci->sci_library_memory, M_ISCI); 236 237 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 238 { 239 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 240 241 if (pci_bar->resource != NULL) 242 bus_release_resource(device, SYS_RES_MEMORY, 243 pci_bar->resource_id, pci_bar->resource); 244 } 245 246 for (i = 0; i < isci->num_interrupts; i++) 247 { 248 struct ISCI_INTERRUPT_INFO *interrupt_info; 249 250 interrupt_info = &isci->interrupt_info[i]; 251 252 if(interrupt_info->tag != NULL) 253 bus_teardown_intr(device, interrupt_info->res, 254 interrupt_info->tag); 255 256 if(interrupt_info->res != NULL) 257 bus_release_resource(device, SYS_RES_IRQ, 258 rman_get_rid(interrupt_info->res), 259 interrupt_info->res); 260 261 pci_release_msi(device); 262 } 263 264 return (0); 265 } 266 267 int 268 isci_initialize(struct isci_softc *isci) 269 { 270 int error; 271 uint32_t status = 0; 272 uint32_t library_object_size; 273 uint32_t verbosity_mask; 274 uint32_t scic_log_object_mask; 275 uint32_t scif_log_object_mask; 276 uint8_t *header_buffer; 277 278 library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 279 280 isci->sci_library_memory = 281 malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 282 283 isci->sci_library_handle = scif_library_construct( 284 isci->sci_library_memory, SCI_MAX_CONTROLLERS); 285 286 sci_object_set_association( isci->sci_library_handle, (void *)isci); 287 288 verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 289 (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 290 (1<<SCI_LOG_VERBOSITY_TRACE); 291 292 scic_log_object_mask = 0xFFFFFFFF; 293 scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 294 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 295 scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 296 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 297 scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 298 299 scif_log_object_mask = 0xFFFFFFFF; 300 scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 301 scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 302 303 TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 304 305 sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 306 scif_log_object_mask, verbosity_mask); 307 308 sci_logger_enable(sci_object_get_logger( 309 scif_library_get_scic_handle(isci->sci_library_handle)), 310 scic_log_object_mask, verbosity_mask); 311 312 header_buffer = (uint8_t *)&isci->pci_common_header; 313 for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 314 header_buffer[i] = pci_read_config(isci->device, i, 1); 315 316 scic_library_set_pci_info( 317 scif_library_get_scic_handle(isci->sci_library_handle), 318 &isci->pci_common_header); 319 320 isci->oem_parameters_found = FALSE; 321 322 isci_get_oem_parameters(isci); 323 324 /* trigger interrupt if 32 completions occur before timeout expires */ 325 isci->coalesce_number = 32; 326 327 /* trigger interrupt if 2 microseconds elapse after a completion occurs, 328 * regardless if "coalesce_number" completions have occurred 329 */ 330 isci->coalesce_timeout = 2; 331 332 isci->controller_count = scic_library_get_pci_device_controller_count( 333 scif_library_get_scic_handle(isci->sci_library_handle)); 334 335 for (int index = 0; index < isci->controller_count; index++) { 336 struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 337 SCI_CONTROLLER_HANDLE_T scif_controller_handle; 338 339 controller->index = index; 340 isci_controller_construct(controller, isci); 341 342 scif_controller_handle = controller->scif_controller_handle; 343 344 status = isci_controller_initialize(controller); 345 346 if(status != SCI_SUCCESS) { 347 isci_log_message(0, "ISCI", 348 "isci_controller_initialize FAILED: %x\n", 349 status); 350 return (status); 351 } 352 353 error = isci_controller_allocate_memory(controller); 354 355 if (error != 0) 356 return (error); 357 358 scif_controller_set_interrupt_coalescence( 359 scif_controller_handle, isci->coalesce_number, 360 isci->coalesce_timeout); 361 } 362 363 /* FreeBSD provides us a hook to ensure we get a chance to start 364 * our controllers and complete initial domain discovery before 365 * it searches for the boot device. Once we're done, we'll 366 * disestablish the hook, signaling the kernel that is can proceed 367 * with the boot process. 368 */ 369 isci->config_hook.ich_func = &isci_controller_start; 370 isci->config_hook.ich_arg = &isci->controllers[0]; 371 372 if (config_intrhook_establish(&isci->config_hook) != 0) 373 isci_log_message(0, "ISCI", 374 "config_intrhook_establish failed!\n"); 375 376 return (status); 377 } 378 379 void 380 isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 381 int nseg, int error) 382 { 383 struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 384 385 memory->error = error; 386 387 if (nseg != 1 || error != 0) 388 isci_log_message(0, "ISCI", 389 "Failed to allocate physically contiguous memory!\n"); 390 else 391 memory->physical_address = seg->ds_addr; 392 } 393 394 int 395 isci_allocate_dma_buffer(device_t device, struct ISCI_MEMORY *memory) 396 { 397 uint32_t status; 398 399 status = bus_dma_tag_create(bus_get_dma_tag(device), 400 0x40 /* cacheline alignment */, 0x0, BUS_SPACE_MAXADDR, 401 BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 402 0x1 /* we want physically contiguous */, 403 memory->size, 0, NULL, NULL, &memory->dma_tag); 404 405 if(status == ENOMEM) { 406 isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 407 return (status); 408 } 409 410 status = bus_dmamem_alloc(memory->dma_tag, 411 (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 412 413 if(status == ENOMEM) 414 { 415 isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 416 return (status); 417 } 418 419 status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 420 (void *)memory->virtual_address, memory->size, 421 isci_allocate_dma_buffer_callback, memory, 0); 422 423 if(status == EINVAL) 424 { 425 isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 426 return (status); 427 } 428 429 return (0); 430 } 431 432 /** 433 * @brief This callback method asks the user to associate the supplied 434 * lock with an operating environment specific locking construct. 435 * 436 * @param[in] controller This parameter specifies the controller with 437 * which this lock is to be associated. 438 * @param[in] lock This parameter specifies the lock for which the 439 * user should associate an operating environment specific 440 * locking object. 441 * 442 * @see The SCI_LOCK_LEVEL enumeration for more information. 443 * 444 * @return none. 445 */ 446 void 447 scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 448 SCI_LOCK_HANDLE_T lock) 449 { 450 451 } 452 453 /** 454 * @brief This callback method asks the user to de-associate the supplied 455 * lock with an operating environment specific locking construct. 456 * 457 * @param[in] controller This parameter specifies the controller with 458 * which this lock is to be de-associated. 459 * @param[in] lock This parameter specifies the lock for which the 460 * user should de-associate an operating environment specific 461 * locking object. 462 * 463 * @see The SCI_LOCK_LEVEL enumeration for more information. 464 * 465 * @return none. 466 */ 467 void 468 scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 469 SCI_LOCK_HANDLE_T lock) 470 { 471 472 } 473 474 475 /** 476 * @brief This callback method asks the user to acquire/get the lock. 477 * This method should pend until the lock has been acquired. 478 * 479 * @param[in] controller This parameter specifies the controller with 480 * which this lock is associated. 481 * @param[in] lock This parameter specifies the lock to be acquired. 482 * 483 * @return none 484 */ 485 void 486 scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 487 SCI_LOCK_HANDLE_T lock) 488 { 489 490 } 491 492 /** 493 * @brief This callback method asks the user to release a lock. 494 * 495 * @param[in] controller This parameter specifies the controller with 496 * which this lock is associated. 497 * @param[in] lock This parameter specifies the lock to be released. 498 * 499 * @return none 500 */ 501 void 502 scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 503 SCI_LOCK_HANDLE_T lock) 504 { 505 } 506 507 /** 508 * @brief This callback method creates an OS specific deferred task 509 * for internal usage. The handler to deferred task is stored by OS 510 * driver. 511 * 512 * @param[in] controller This parameter specifies the controller object 513 * with which this callback is associated. 514 * 515 * @return none 516 */ 517 void 518 scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 519 { 520 521 } 522 523 /** 524 * @brief This callback method schedules a OS specific deferred task. 525 * 526 * @param[in] controller This parameter specifies the controller 527 * object with which this callback is associated. 528 * @param[in] start_internal_io_task_routine This parameter specifies the 529 * sci start_internal_io routine. 530 * @param[in] context This parameter specifies a handle to a parameter 531 * that will be passed into the "start_internal_io_task_routine" 532 * when it is invoked. 533 * 534 * @return none 535 */ 536 void 537 scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 538 FUNCPTR start_internal_io_task_routine, void *context) 539 { 540 /** @todo Use FreeBSD tasklet to defer this routine to a later time, 541 * rather than calling the routine inline. 542 */ 543 SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 544 (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 545 546 sci_start_internal_io_routine(context); 547 } 548 549 /** 550 * @brief In this method the user must write to PCI memory via access. 551 * This method is used for access to memory space and IO space. 552 * 553 * @param[in] controller The controller for which to read a DWORD. 554 * @param[in] address This parameter depicts the address into 555 * which to write. 556 * @param[out] write_value This parameter depicts the value being written 557 * into the PCI memory location. 558 * 559 * @todo These PCI memory access calls likely needs to be optimized into macros? 560 */ 561 void 562 scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 563 void *address, uint32_t write_value) 564 { 565 SCI_CONTROLLER_HANDLE_T scif_controller = 566 (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 567 struct ISCI_CONTROLLER *isci_controller = 568 (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 569 struct isci_softc *isci = isci_controller->isci; 570 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 571 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 572 573 bus_space_write_4(isci->pci_bar[bar].bus_tag, 574 isci->pci_bar[bar].bus_handle, offset, write_value); 575 } 576 577 /** 578 * @brief In this method the user must read from PCI memory via access. 579 * This method is used for access to memory space and IO space. 580 * 581 * @param[in] controller The controller for which to read a DWORD. 582 * @param[in] address This parameter depicts the address from 583 * which to read. 584 * 585 * @return The value being returned from the PCI memory location. 586 * 587 * @todo This PCI memory access calls likely need to be optimized into macro? 588 */ 589 uint32_t 590 scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 591 { 592 SCI_CONTROLLER_HANDLE_T scif_controller = 593 (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 594 struct ISCI_CONTROLLER *isci_controller = 595 (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 596 struct isci_softc *isci = isci_controller->isci; 597 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 598 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 599 600 return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 601 isci->pci_bar[bar].bus_handle, offset)); 602 } 603 604 /** 605 * @brief This method is called when the core requires the OS driver 606 * to stall execution. This method is utilized during initialization 607 * or non-performance paths only. 608 * 609 * @param[in] microseconds This parameter specifies the number of 610 * microseconds for which to stall. The operating system driver 611 * is allowed to round this value up where necessary. 612 * 613 * @return none. 614 */ 615 void 616 scic_cb_stall_execution(uint32_t microseconds) 617 { 618 619 DELAY(microseconds); 620 } 621 622 /** 623 * @brief In this method the user must return the base address register (BAR) 624 * value for the supplied base address register number. 625 * 626 * @param[in] controller The controller for which to retrieve the bar number. 627 * @param[in] bar_number This parameter depicts the BAR index/number to be read. 628 * 629 * @return Return a pointer value indicating the contents of the BAR. 630 * @retval NULL indicates an invalid BAR index/number was specified. 631 * @retval All other values indicate a valid VIRTUAL address from the BAR. 632 */ 633 void * 634 scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 635 uint16_t bar_number) 636 { 637 638 return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 639 } 640 641 /** 642 * @brief This method informs the SCI Core user that a phy/link became 643 * ready, but the phy is not allowed in the port. In some 644 * situations the underlying hardware only allows for certain phy 645 * to port mappings. If these mappings are violated, then this 646 * API is invoked. 647 * 648 * @param[in] controller This parameter represents the controller which 649 * contains the port. 650 * @param[in] port This parameter specifies the SCI port object for which 651 * the callback is being invoked. 652 * @param[in] phy This parameter specifies the phy that came ready, but the 653 * phy can't be a valid member of the port. 654 * 655 * @return none 656 */ 657 void 658 scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 659 SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 660 { 661 662 } 663