1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <dev/isci/isci.h> 35 36 #include <sys/sysctl.h> 37 #include <sys/malloc.h> 38 39 #include <cam/cam_periph.h> 40 41 #include <dev/led/led.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 46 #include <dev/isci/scil/scic_logger.h> 47 #include <dev/isci/scil/scic_library.h> 48 #include <dev/isci/scil/scic_sgpio.h> 49 #include <dev/isci/scil/scic_user_callback.h> 50 51 #include <dev/isci/scil/scif_controller.h> 52 #include <dev/isci/scil/scif_library.h> 53 #include <dev/isci/scil/scif_logger.h> 54 #include <dev/isci/scil/scif_user_callback.h> 55 56 MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 57 58 struct isci_softc *g_isci; 59 uint32_t g_isci_debug_level = 0; 60 61 static int isci_probe(device_t); 62 static int isci_attach(device_t); 63 static int isci_detach(device_t); 64 65 int isci_initialize(struct isci_softc *isci); 66 67 void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 68 int nseg, int error); 69 70 static devclass_t isci_devclass; 71 72 static device_method_t isci_pci_methods[] = { 73 /* Device interface */ 74 DEVMETHOD(device_probe, isci_probe), 75 DEVMETHOD(device_attach, isci_attach), 76 DEVMETHOD(device_detach, isci_detach), 77 { 0, 0 } 78 }; 79 80 static driver_t isci_pci_driver = { 81 "isci", 82 isci_pci_methods, 83 sizeof(struct isci_softc), 84 }; 85 86 DRIVER_MODULE(isci, pci, isci_pci_driver, isci_devclass, 0, 0); 87 MODULE_DEPEND(isci, cam, 1, 1, 1); 88 89 static struct _pcsid 90 { 91 u_int32_t type; 92 const char *desc; 93 } pci_ids[] = { 94 { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 95 { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 96 { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 97 { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 98 { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 99 { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 100 { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 101 { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 102 { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 103 { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 104 { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 105 { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 106 { 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" }, 107 { 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" }, 108 { 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" }, 109 { 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 110 { 0x00000000, NULL } 111 }; 112 113 static int 114 isci_probe (device_t device) 115 { 116 u_int32_t type = pci_get_devid(device); 117 struct _pcsid *ep = pci_ids; 118 119 while (ep->type && ep->type != type) 120 ++ep; 121 122 if (ep->desc) 123 { 124 device_set_desc(device, ep->desc); 125 return (BUS_PROBE_DEFAULT); 126 } 127 else 128 return (ENXIO); 129 } 130 131 static int 132 isci_allocate_pci_memory(struct isci_softc *isci) 133 { 134 int i; 135 136 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 137 { 138 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 139 140 pci_bar->resource_id = PCIR_BAR(i*2); 141 pci_bar->resource = bus_alloc_resource(isci->device, 142 SYS_RES_MEMORY, &pci_bar->resource_id, 0, ~0, 1, 143 RF_ACTIVE); 144 145 if(pci_bar->resource == NULL) 146 isci_log_message(0, "ISCI", 147 "unable to allocate pci resource\n"); 148 else { 149 pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 150 pci_bar->bus_handle = 151 rman_get_bushandle(pci_bar->resource); 152 } 153 } 154 155 return (0); 156 } 157 158 static int 159 isci_attach(device_t device) 160 { 161 int error; 162 struct isci_softc *isci = DEVICE2SOFTC(device); 163 164 g_isci = isci; 165 isci->device = device; 166 167 isci_allocate_pci_memory(isci); 168 169 error = isci_initialize(isci); 170 171 if (error) 172 { 173 isci_detach(device); 174 return (error); 175 } 176 177 isci_interrupt_setup(isci); 178 isci_sysctl_initialize(isci); 179 180 return (0); 181 } 182 183 static int 184 isci_detach(device_t device) 185 { 186 struct isci_softc *isci = DEVICE2SOFTC(device); 187 int i, phy; 188 189 for (i = 0; i < isci->controller_count; i++) { 190 struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 191 SCI_STATUS status; 192 void *unmap_buffer; 193 194 if (controller->scif_controller_handle != NULL) { 195 scic_controller_disable_interrupts( 196 scif_controller_get_scic_handle(controller->scif_controller_handle)); 197 198 mtx_lock(&controller->lock); 199 status = scif_controller_stop(controller->scif_controller_handle, 0); 200 mtx_unlock(&controller->lock); 201 202 while (controller->is_started == TRUE) { 203 /* Now poll for interrupts until the controller stop complete 204 * callback is received. 205 */ 206 mtx_lock(&controller->lock); 207 isci_interrupt_poll_handler(controller); 208 mtx_unlock(&controller->lock); 209 pause("isci", 1); 210 } 211 212 if(controller->sim != NULL) { 213 mtx_lock(&controller->lock); 214 xpt_free_path(controller->path); 215 xpt_bus_deregister(cam_sim_path(controller->sim)); 216 cam_sim_free(controller->sim, TRUE); 217 mtx_unlock(&controller->lock); 218 } 219 } 220 221 if (controller->timer_memory != NULL) 222 free(controller->timer_memory, M_ISCI); 223 224 if (controller->remote_device_memory != NULL) 225 free(controller->remote_device_memory, M_ISCI); 226 227 for (phy = 0; phy < SCI_MAX_PHYS; phy++) { 228 if (controller->phys[phy].cdev_fault) 229 led_destroy(controller->phys[phy].cdev_fault); 230 231 if (controller->phys[phy].cdev_locate) 232 led_destroy(controller->phys[phy].cdev_locate); 233 } 234 235 while (1) { 236 sci_pool_get(controller->unmap_buffer_pool, unmap_buffer); 237 if (unmap_buffer == NULL) 238 break; 239 contigfree(unmap_buffer, PAGE_SIZE, M_ISCI); 240 } 241 } 242 243 /* The SCIF controllers have been stopped, so we can now 244 * free the SCI library memory. 245 */ 246 if (isci->sci_library_memory != NULL) 247 free(isci->sci_library_memory, M_ISCI); 248 249 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 250 { 251 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 252 253 if (pci_bar->resource != NULL) 254 bus_release_resource(device, SYS_RES_MEMORY, 255 pci_bar->resource_id, pci_bar->resource); 256 } 257 258 for (i = 0; i < isci->num_interrupts; i++) 259 { 260 struct ISCI_INTERRUPT_INFO *interrupt_info; 261 262 interrupt_info = &isci->interrupt_info[i]; 263 264 if(interrupt_info->tag != NULL) 265 bus_teardown_intr(device, interrupt_info->res, 266 interrupt_info->tag); 267 268 if(interrupt_info->res != NULL) 269 bus_release_resource(device, SYS_RES_IRQ, 270 rman_get_rid(interrupt_info->res), 271 interrupt_info->res); 272 273 pci_release_msi(device); 274 } 275 276 return (0); 277 } 278 279 int 280 isci_initialize(struct isci_softc *isci) 281 { 282 int error; 283 uint32_t status = 0; 284 uint32_t library_object_size; 285 uint32_t verbosity_mask; 286 uint32_t scic_log_object_mask; 287 uint32_t scif_log_object_mask; 288 uint8_t *header_buffer; 289 290 library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 291 292 isci->sci_library_memory = 293 malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 294 295 isci->sci_library_handle = scif_library_construct( 296 isci->sci_library_memory, SCI_MAX_CONTROLLERS); 297 298 sci_object_set_association( isci->sci_library_handle, (void *)isci); 299 300 verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 301 (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 302 (1<<SCI_LOG_VERBOSITY_TRACE); 303 304 scic_log_object_mask = 0xFFFFFFFF; 305 scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 306 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 307 scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 308 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 309 scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 310 311 scif_log_object_mask = 0xFFFFFFFF; 312 scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 313 scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 314 315 TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 316 317 sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 318 scif_log_object_mask, verbosity_mask); 319 320 sci_logger_enable(sci_object_get_logger( 321 scif_library_get_scic_handle(isci->sci_library_handle)), 322 scic_log_object_mask, verbosity_mask); 323 324 header_buffer = (uint8_t *)&isci->pci_common_header; 325 for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 326 header_buffer[i] = pci_read_config(isci->device, i, 1); 327 328 scic_library_set_pci_info( 329 scif_library_get_scic_handle(isci->sci_library_handle), 330 &isci->pci_common_header); 331 332 isci->oem_parameters_found = FALSE; 333 334 isci_get_oem_parameters(isci); 335 336 /* trigger interrupt if 32 completions occur before timeout expires */ 337 isci->coalesce_number = 32; 338 339 /* trigger interrupt if 2 microseconds elapse after a completion occurs, 340 * regardless if "coalesce_number" completions have occurred 341 */ 342 isci->coalesce_timeout = 2; 343 344 isci->controller_count = scic_library_get_pci_device_controller_count( 345 scif_library_get_scic_handle(isci->sci_library_handle)); 346 347 for (int index = 0; index < isci->controller_count; index++) { 348 struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 349 SCI_CONTROLLER_HANDLE_T scif_controller_handle; 350 351 controller->index = index; 352 isci_controller_construct(controller, isci); 353 354 scif_controller_handle = controller->scif_controller_handle; 355 356 status = isci_controller_initialize(controller); 357 358 if(status != SCI_SUCCESS) { 359 isci_log_message(0, "ISCI", 360 "isci_controller_initialize FAILED: %x\n", 361 status); 362 return (status); 363 } 364 365 error = isci_controller_allocate_memory(controller); 366 367 if (error != 0) 368 return (error); 369 370 scif_controller_set_interrupt_coalescence( 371 scif_controller_handle, isci->coalesce_number, 372 isci->coalesce_timeout); 373 } 374 375 /* FreeBSD provides us a hook to ensure we get a chance to start 376 * our controllers and complete initial domain discovery before 377 * it searches for the boot device. Once we're done, we'll 378 * disestablish the hook, signaling the kernel that is can proceed 379 * with the boot process. 380 */ 381 isci->config_hook.ich_func = &isci_controller_start; 382 isci->config_hook.ich_arg = &isci->controllers[0]; 383 384 if (config_intrhook_establish(&isci->config_hook) != 0) 385 isci_log_message(0, "ISCI", 386 "config_intrhook_establish failed!\n"); 387 388 return (status); 389 } 390 391 void 392 isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 393 int nseg, int error) 394 { 395 struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 396 397 memory->error = error; 398 399 if (nseg != 1 || error != 0) 400 isci_log_message(0, "ISCI", 401 "Failed to allocate physically contiguous memory!\n"); 402 else 403 memory->physical_address = seg->ds_addr; 404 } 405 406 int 407 isci_allocate_dma_buffer(device_t device, struct ISCI_MEMORY *memory) 408 { 409 uint32_t status; 410 411 status = bus_dma_tag_create(bus_get_dma_tag(device), 412 0x40 /* cacheline alignment */, 0x0, BUS_SPACE_MAXADDR, 413 BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 414 0x1 /* we want physically contiguous */, 415 memory->size, 0, NULL, NULL, &memory->dma_tag); 416 417 if(status == ENOMEM) { 418 isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 419 return (status); 420 } 421 422 status = bus_dmamem_alloc(memory->dma_tag, 423 (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 424 425 if(status == ENOMEM) 426 { 427 isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 428 return (status); 429 } 430 431 status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 432 (void *)memory->virtual_address, memory->size, 433 isci_allocate_dma_buffer_callback, memory, 0); 434 435 if(status == EINVAL) 436 { 437 isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 438 return (status); 439 } 440 441 return (0); 442 } 443 444 /** 445 * @brief This callback method asks the user to associate the supplied 446 * lock with an operating environment specific locking construct. 447 * 448 * @param[in] controller This parameter specifies the controller with 449 * which this lock is to be associated. 450 * @param[in] lock This parameter specifies the lock for which the 451 * user should associate an operating environment specific 452 * locking object. 453 * 454 * @see The SCI_LOCK_LEVEL enumeration for more information. 455 * 456 * @return none. 457 */ 458 void 459 scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 460 SCI_LOCK_HANDLE_T lock) 461 { 462 463 } 464 465 /** 466 * @brief This callback method asks the user to de-associate the supplied 467 * lock with an operating environment specific locking construct. 468 * 469 * @param[in] controller This parameter specifies the controller with 470 * which this lock is to be de-associated. 471 * @param[in] lock This parameter specifies the lock for which the 472 * user should de-associate an operating environment specific 473 * locking object. 474 * 475 * @see The SCI_LOCK_LEVEL enumeration for more information. 476 * 477 * @return none. 478 */ 479 void 480 scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 481 SCI_LOCK_HANDLE_T lock) 482 { 483 484 } 485 486 487 /** 488 * @brief This callback method asks the user to acquire/get the lock. 489 * This method should pend until the lock has been acquired. 490 * 491 * @param[in] controller This parameter specifies the controller with 492 * which this lock is associated. 493 * @param[in] lock This parameter specifies the lock to be acquired. 494 * 495 * @return none 496 */ 497 void 498 scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 499 SCI_LOCK_HANDLE_T lock) 500 { 501 502 } 503 504 /** 505 * @brief This callback method asks the user to release a lock. 506 * 507 * @param[in] controller This parameter specifies the controller with 508 * which this lock is associated. 509 * @param[in] lock This parameter specifies the lock to be released. 510 * 511 * @return none 512 */ 513 void 514 scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 515 SCI_LOCK_HANDLE_T lock) 516 { 517 } 518 519 /** 520 * @brief This callback method creates an OS specific deferred task 521 * for internal usage. The handler to deferred task is stored by OS 522 * driver. 523 * 524 * @param[in] controller This parameter specifies the controller object 525 * with which this callback is associated. 526 * 527 * @return none 528 */ 529 void 530 scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 531 { 532 533 } 534 535 /** 536 * @brief This callback method schedules a OS specific deferred task. 537 * 538 * @param[in] controller This parameter specifies the controller 539 * object with which this callback is associated. 540 * @param[in] start_internal_io_task_routine This parameter specifies the 541 * sci start_internal_io routine. 542 * @param[in] context This parameter specifies a handle to a parameter 543 * that will be passed into the "start_internal_io_task_routine" 544 * when it is invoked. 545 * 546 * @return none 547 */ 548 void 549 scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 550 FUNCPTR start_internal_io_task_routine, void *context) 551 { 552 /** @todo Use FreeBSD tasklet to defer this routine to a later time, 553 * rather than calling the routine inline. 554 */ 555 SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 556 (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 557 558 sci_start_internal_io_routine(context); 559 } 560 561 /** 562 * @brief In this method the user must write to PCI memory via access. 563 * This method is used for access to memory space and IO space. 564 * 565 * @param[in] controller The controller for which to read a DWORD. 566 * @param[in] address This parameter depicts the address into 567 * which to write. 568 * @param[out] write_value This parameter depicts the value being written 569 * into the PCI memory location. 570 * 571 * @todo These PCI memory access calls likely needs to be optimized into macros? 572 */ 573 void 574 scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 575 void *address, uint32_t write_value) 576 { 577 SCI_CONTROLLER_HANDLE_T scif_controller = 578 (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 579 struct ISCI_CONTROLLER *isci_controller = 580 (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 581 struct isci_softc *isci = isci_controller->isci; 582 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 583 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 584 585 bus_space_write_4(isci->pci_bar[bar].bus_tag, 586 isci->pci_bar[bar].bus_handle, offset, write_value); 587 } 588 589 /** 590 * @brief In this method the user must read from PCI memory via access. 591 * This method is used for access to memory space and IO space. 592 * 593 * @param[in] controller The controller for which to read a DWORD. 594 * @param[in] address This parameter depicts the address from 595 * which to read. 596 * 597 * @return The value being returned from the PCI memory location. 598 * 599 * @todo This PCI memory access calls likely need to be optimized into macro? 600 */ 601 uint32_t 602 scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 603 { 604 SCI_CONTROLLER_HANDLE_T scif_controller = 605 (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 606 struct ISCI_CONTROLLER *isci_controller = 607 (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 608 struct isci_softc *isci = isci_controller->isci; 609 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 610 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 611 612 return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 613 isci->pci_bar[bar].bus_handle, offset)); 614 } 615 616 /** 617 * @brief This method is called when the core requires the OS driver 618 * to stall execution. This method is utilized during initialization 619 * or non-performance paths only. 620 * 621 * @param[in] microseconds This parameter specifies the number of 622 * microseconds for which to stall. The operating system driver 623 * is allowed to round this value up where necessary. 624 * 625 * @return none. 626 */ 627 void 628 scic_cb_stall_execution(uint32_t microseconds) 629 { 630 631 DELAY(microseconds); 632 } 633 634 /** 635 * @brief In this method the user must return the base address register (BAR) 636 * value for the supplied base address register number. 637 * 638 * @param[in] controller The controller for which to retrieve the bar number. 639 * @param[in] bar_number This parameter depicts the BAR index/number to be read. 640 * 641 * @return Return a pointer value indicating the contents of the BAR. 642 * @retval NULL indicates an invalid BAR index/number was specified. 643 * @retval All other values indicate a valid VIRTUAL address from the BAR. 644 */ 645 void * 646 scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 647 uint16_t bar_number) 648 { 649 650 return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 651 } 652 653 /** 654 * @brief This method informs the SCI Core user that a phy/link became 655 * ready, but the phy is not allowed in the port. In some 656 * situations the underlying hardware only allows for certain phy 657 * to port mappings. If these mappings are violated, then this 658 * API is invoked. 659 * 660 * @param[in] controller This parameter represents the controller which 661 * contains the port. 662 * @param[in] port This parameter specifies the SCI port object for which 663 * the callback is being invoked. 664 * @param[in] phy This parameter specifies the phy that came ready, but the 665 * phy can't be a valid member of the port. 666 * 667 * @return none 668 */ 669 void 670 scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 671 SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 672 { 673 674 } 675