1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <dev/isci/isci.h> 35 36 #include <sys/sysctl.h> 37 #include <sys/malloc.h> 38 39 #include <cam/cam_periph.h> 40 41 #include <dev/led/led.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 46 #include <dev/isci/scil/scic_logger.h> 47 #include <dev/isci/scil/scic_library.h> 48 #include <dev/isci/scil/scic_sgpio.h> 49 #include <dev/isci/scil/scic_user_callback.h> 50 51 #include <dev/isci/scil/scif_controller.h> 52 #include <dev/isci/scil/scif_library.h> 53 #include <dev/isci/scil/scif_logger.h> 54 #include <dev/isci/scil/scif_user_callback.h> 55 56 MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 57 58 struct isci_softc *g_isci; 59 uint32_t g_isci_debug_level = 0; 60 61 static int isci_probe(device_t); 62 static int isci_attach(device_t); 63 static int isci_detach(device_t); 64 65 int isci_initialize(struct isci_softc *isci); 66 67 void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 68 int nseg, int error); 69 70 static devclass_t isci_devclass; 71 72 static device_method_t isci_pci_methods[] = { 73 /* Device interface */ 74 DEVMETHOD(device_probe, isci_probe), 75 DEVMETHOD(device_attach, isci_attach), 76 DEVMETHOD(device_detach, isci_detach), 77 { 0, 0 } 78 }; 79 80 static driver_t isci_pci_driver = { 81 "isci", 82 isci_pci_methods, 83 sizeof(struct isci_softc), 84 }; 85 86 DRIVER_MODULE(isci, pci, isci_pci_driver, isci_devclass, 0, 0); 87 MODULE_DEPEND(isci, cam, 1, 1, 1); 88 89 static struct _pcsid 90 { 91 u_int32_t type; 92 const char *desc; 93 } pci_ids[] = { 94 { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 95 { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 96 { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 97 { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 98 { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 99 { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 100 { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 101 { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 102 { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 103 { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 104 { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 105 { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 106 { 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" }, 107 { 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" }, 108 { 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" }, 109 { 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 110 { 0x00000000, NULL } 111 }; 112 113 static int 114 isci_probe (device_t device) 115 { 116 u_int32_t type = pci_get_devid(device); 117 struct _pcsid *ep = pci_ids; 118 119 while (ep->type && ep->type != type) 120 ++ep; 121 122 if (ep->desc) 123 { 124 device_set_desc(device, ep->desc); 125 return (BUS_PROBE_DEFAULT); 126 } 127 else 128 return (ENXIO); 129 } 130 131 static int 132 isci_allocate_pci_memory(struct isci_softc *isci) 133 { 134 int i; 135 136 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 137 { 138 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 139 140 pci_bar->resource_id = PCIR_BAR(i*2); 141 pci_bar->resource = bus_alloc_resource_any(isci->device, 142 SYS_RES_MEMORY, &pci_bar->resource_id, 143 RF_ACTIVE); 144 145 if(pci_bar->resource == NULL) 146 isci_log_message(0, "ISCI", 147 "unable to allocate pci resource\n"); 148 else { 149 pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 150 pci_bar->bus_handle = 151 rman_get_bushandle(pci_bar->resource); 152 } 153 } 154 155 return (0); 156 } 157 158 static int 159 isci_attach(device_t device) 160 { 161 int error; 162 struct isci_softc *isci = DEVICE2SOFTC(device); 163 164 g_isci = isci; 165 isci->device = device; 166 pci_enable_busmaster(device); 167 168 isci_allocate_pci_memory(isci); 169 170 error = isci_initialize(isci); 171 172 if (error) 173 { 174 isci_detach(device); 175 return (error); 176 } 177 178 isci_interrupt_setup(isci); 179 isci_sysctl_initialize(isci); 180 181 return (0); 182 } 183 184 static int 185 isci_detach(device_t device) 186 { 187 struct isci_softc *isci = DEVICE2SOFTC(device); 188 int i, phy; 189 190 for (i = 0; i < isci->controller_count; i++) { 191 struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 192 SCI_STATUS status; 193 void *unmap_buffer; 194 195 if (controller->scif_controller_handle != NULL) { 196 scic_controller_disable_interrupts( 197 scif_controller_get_scic_handle(controller->scif_controller_handle)); 198 199 mtx_lock(&controller->lock); 200 status = scif_controller_stop(controller->scif_controller_handle, 0); 201 mtx_unlock(&controller->lock); 202 203 while (controller->is_started == TRUE) { 204 /* Now poll for interrupts until the controller stop complete 205 * callback is received. 206 */ 207 mtx_lock(&controller->lock); 208 isci_interrupt_poll_handler(controller); 209 mtx_unlock(&controller->lock); 210 pause("isci", 1); 211 } 212 213 if(controller->sim != NULL) { 214 mtx_lock(&controller->lock); 215 xpt_free_path(controller->path); 216 xpt_bus_deregister(cam_sim_path(controller->sim)); 217 cam_sim_free(controller->sim, TRUE); 218 mtx_unlock(&controller->lock); 219 } 220 } 221 222 if (controller->timer_memory != NULL) 223 free(controller->timer_memory, M_ISCI); 224 225 if (controller->remote_device_memory != NULL) 226 free(controller->remote_device_memory, M_ISCI); 227 228 for (phy = 0; phy < SCI_MAX_PHYS; phy++) { 229 if (controller->phys[phy].cdev_fault) 230 led_destroy(controller->phys[phy].cdev_fault); 231 232 if (controller->phys[phy].cdev_locate) 233 led_destroy(controller->phys[phy].cdev_locate); 234 } 235 236 while (1) { 237 sci_pool_get(controller->unmap_buffer_pool, unmap_buffer); 238 if (unmap_buffer == NULL) 239 break; 240 contigfree(unmap_buffer, PAGE_SIZE, M_ISCI); 241 } 242 } 243 244 /* The SCIF controllers have been stopped, so we can now 245 * free the SCI library memory. 246 */ 247 if (isci->sci_library_memory != NULL) 248 free(isci->sci_library_memory, M_ISCI); 249 250 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 251 { 252 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 253 254 if (pci_bar->resource != NULL) 255 bus_release_resource(device, SYS_RES_MEMORY, 256 pci_bar->resource_id, pci_bar->resource); 257 } 258 259 for (i = 0; i < isci->num_interrupts; i++) 260 { 261 struct ISCI_INTERRUPT_INFO *interrupt_info; 262 263 interrupt_info = &isci->interrupt_info[i]; 264 265 if(interrupt_info->tag != NULL) 266 bus_teardown_intr(device, interrupt_info->res, 267 interrupt_info->tag); 268 269 if(interrupt_info->res != NULL) 270 bus_release_resource(device, SYS_RES_IRQ, 271 rman_get_rid(interrupt_info->res), 272 interrupt_info->res); 273 274 pci_release_msi(device); 275 } 276 pci_disable_busmaster(device); 277 278 return (0); 279 } 280 281 int 282 isci_initialize(struct isci_softc *isci) 283 { 284 int error; 285 uint32_t status = 0; 286 uint32_t library_object_size; 287 uint32_t verbosity_mask; 288 uint32_t scic_log_object_mask; 289 uint32_t scif_log_object_mask; 290 uint8_t *header_buffer; 291 292 library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 293 294 isci->sci_library_memory = 295 malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 296 297 isci->sci_library_handle = scif_library_construct( 298 isci->sci_library_memory, SCI_MAX_CONTROLLERS); 299 300 sci_object_set_association( isci->sci_library_handle, (void *)isci); 301 302 verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 303 (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 304 (1<<SCI_LOG_VERBOSITY_TRACE); 305 306 scic_log_object_mask = 0xFFFFFFFF; 307 scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 308 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 309 scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 310 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 311 scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 312 313 scif_log_object_mask = 0xFFFFFFFF; 314 scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 315 scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 316 317 TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 318 319 sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 320 scif_log_object_mask, verbosity_mask); 321 322 sci_logger_enable(sci_object_get_logger( 323 scif_library_get_scic_handle(isci->sci_library_handle)), 324 scic_log_object_mask, verbosity_mask); 325 326 header_buffer = (uint8_t *)&isci->pci_common_header; 327 for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 328 header_buffer[i] = pci_read_config(isci->device, i, 1); 329 330 scic_library_set_pci_info( 331 scif_library_get_scic_handle(isci->sci_library_handle), 332 &isci->pci_common_header); 333 334 isci->oem_parameters_found = FALSE; 335 336 isci_get_oem_parameters(isci); 337 338 /* trigger interrupt if 32 completions occur before timeout expires */ 339 isci->coalesce_number = 32; 340 341 /* trigger interrupt if 2 microseconds elapse after a completion occurs, 342 * regardless if "coalesce_number" completions have occurred 343 */ 344 isci->coalesce_timeout = 2; 345 346 isci->controller_count = scic_library_get_pci_device_controller_count( 347 scif_library_get_scic_handle(isci->sci_library_handle)); 348 349 for (int index = 0; index < isci->controller_count; index++) { 350 struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 351 SCI_CONTROLLER_HANDLE_T scif_controller_handle; 352 353 controller->index = index; 354 isci_controller_construct(controller, isci); 355 356 scif_controller_handle = controller->scif_controller_handle; 357 358 status = isci_controller_initialize(controller); 359 360 if(status != SCI_SUCCESS) { 361 isci_log_message(0, "ISCI", 362 "isci_controller_initialize FAILED: %x\n", 363 status); 364 return (status); 365 } 366 367 error = isci_controller_allocate_memory(controller); 368 369 if (error != 0) 370 return (error); 371 372 scif_controller_set_interrupt_coalescence( 373 scif_controller_handle, isci->coalesce_number, 374 isci->coalesce_timeout); 375 } 376 377 /* FreeBSD provides us a hook to ensure we get a chance to start 378 * our controllers and complete initial domain discovery before 379 * it searches for the boot device. Once we're done, we'll 380 * disestablish the hook, signaling the kernel that is can proceed 381 * with the boot process. 382 */ 383 isci->config_hook.ich_func = &isci_controller_start; 384 isci->config_hook.ich_arg = &isci->controllers[0]; 385 386 if (config_intrhook_establish(&isci->config_hook) != 0) 387 isci_log_message(0, "ISCI", 388 "config_intrhook_establish failed!\n"); 389 390 return (status); 391 } 392 393 void 394 isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 395 int nseg, int error) 396 { 397 struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 398 399 memory->error = error; 400 401 if (nseg != 1 || error != 0) 402 isci_log_message(0, "ISCI", 403 "Failed to allocate physically contiguous memory!\n"); 404 else 405 memory->physical_address = seg->ds_addr; 406 } 407 408 int 409 isci_allocate_dma_buffer(device_t device, struct ISCI_MEMORY *memory) 410 { 411 uint32_t status; 412 413 status = bus_dma_tag_create(bus_get_dma_tag(device), 414 0x40 /* cacheline alignment */, 0x0, BUS_SPACE_MAXADDR, 415 BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 416 0x1 /* we want physically contiguous */, 417 memory->size, 0, NULL, NULL, &memory->dma_tag); 418 419 if(status == ENOMEM) { 420 isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 421 return (status); 422 } 423 424 status = bus_dmamem_alloc(memory->dma_tag, 425 (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 426 427 if(status == ENOMEM) 428 { 429 isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 430 return (status); 431 } 432 433 status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 434 (void *)memory->virtual_address, memory->size, 435 isci_allocate_dma_buffer_callback, memory, 0); 436 437 if(status == EINVAL) 438 { 439 isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 440 return (status); 441 } 442 443 return (0); 444 } 445 446 /** 447 * @brief This callback method asks the user to associate the supplied 448 * lock with an operating environment specific locking construct. 449 * 450 * @param[in] controller This parameter specifies the controller with 451 * which this lock is to be associated. 452 * @param[in] lock This parameter specifies the lock for which the 453 * user should associate an operating environment specific 454 * locking object. 455 * 456 * @see The SCI_LOCK_LEVEL enumeration for more information. 457 * 458 * @return none. 459 */ 460 void 461 scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 462 SCI_LOCK_HANDLE_T lock) 463 { 464 465 } 466 467 /** 468 * @brief This callback method asks the user to de-associate the supplied 469 * lock with an operating environment specific locking construct. 470 * 471 * @param[in] controller This parameter specifies the controller with 472 * which this lock is to be de-associated. 473 * @param[in] lock This parameter specifies the lock for which the 474 * user should de-associate an operating environment specific 475 * locking object. 476 * 477 * @see The SCI_LOCK_LEVEL enumeration for more information. 478 * 479 * @return none. 480 */ 481 void 482 scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 483 SCI_LOCK_HANDLE_T lock) 484 { 485 486 } 487 488 489 /** 490 * @brief This callback method asks the user to acquire/get the lock. 491 * This method should pend until the lock has been acquired. 492 * 493 * @param[in] controller This parameter specifies the controller with 494 * which this lock is associated. 495 * @param[in] lock This parameter specifies the lock to be acquired. 496 * 497 * @return none 498 */ 499 void 500 scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 501 SCI_LOCK_HANDLE_T lock) 502 { 503 504 } 505 506 /** 507 * @brief This callback method asks the user to release a lock. 508 * 509 * @param[in] controller This parameter specifies the controller with 510 * which this lock is associated. 511 * @param[in] lock This parameter specifies the lock to be released. 512 * 513 * @return none 514 */ 515 void 516 scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 517 SCI_LOCK_HANDLE_T lock) 518 { 519 } 520 521 /** 522 * @brief This callback method creates an OS specific deferred task 523 * for internal usage. The handler to deferred task is stored by OS 524 * driver. 525 * 526 * @param[in] controller This parameter specifies the controller object 527 * with which this callback is associated. 528 * 529 * @return none 530 */ 531 void 532 scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 533 { 534 535 } 536 537 /** 538 * @brief This callback method schedules a OS specific deferred task. 539 * 540 * @param[in] controller This parameter specifies the controller 541 * object with which this callback is associated. 542 * @param[in] start_internal_io_task_routine This parameter specifies the 543 * sci start_internal_io routine. 544 * @param[in] context This parameter specifies a handle to a parameter 545 * that will be passed into the "start_internal_io_task_routine" 546 * when it is invoked. 547 * 548 * @return none 549 */ 550 void 551 scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 552 FUNCPTR start_internal_io_task_routine, void *context) 553 { 554 /** @todo Use FreeBSD tasklet to defer this routine to a later time, 555 * rather than calling the routine inline. 556 */ 557 SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 558 (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 559 560 sci_start_internal_io_routine(context); 561 } 562 563 /** 564 * @brief In this method the user must write to PCI memory via access. 565 * This method is used for access to memory space and IO space. 566 * 567 * @param[in] controller The controller for which to read a DWORD. 568 * @param[in] address This parameter depicts the address into 569 * which to write. 570 * @param[out] write_value This parameter depicts the value being written 571 * into the PCI memory location. 572 * 573 * @todo These PCI memory access calls likely needs to be optimized into macros? 574 */ 575 void 576 scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 577 void *address, uint32_t write_value) 578 { 579 SCI_CONTROLLER_HANDLE_T scif_controller = 580 (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 581 struct ISCI_CONTROLLER *isci_controller = 582 (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 583 struct isci_softc *isci = isci_controller->isci; 584 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 585 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 586 587 bus_space_write_4(isci->pci_bar[bar].bus_tag, 588 isci->pci_bar[bar].bus_handle, offset, write_value); 589 } 590 591 /** 592 * @brief In this method the user must read from PCI memory via access. 593 * This method is used for access to memory space and IO space. 594 * 595 * @param[in] controller The controller for which to read a DWORD. 596 * @param[in] address This parameter depicts the address from 597 * which to read. 598 * 599 * @return The value being returned from the PCI memory location. 600 * 601 * @todo This PCI memory access calls likely need to be optimized into macro? 602 */ 603 uint32_t 604 scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 605 { 606 SCI_CONTROLLER_HANDLE_T scif_controller = 607 (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 608 struct ISCI_CONTROLLER *isci_controller = 609 (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 610 struct isci_softc *isci = isci_controller->isci; 611 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 612 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 613 614 return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 615 isci->pci_bar[bar].bus_handle, offset)); 616 } 617 618 /** 619 * @brief This method is called when the core requires the OS driver 620 * to stall execution. This method is utilized during initialization 621 * or non-performance paths only. 622 * 623 * @param[in] microseconds This parameter specifies the number of 624 * microseconds for which to stall. The operating system driver 625 * is allowed to round this value up where necessary. 626 * 627 * @return none. 628 */ 629 void 630 scic_cb_stall_execution(uint32_t microseconds) 631 { 632 633 DELAY(microseconds); 634 } 635 636 /** 637 * @brief In this method the user must return the base address register (BAR) 638 * value for the supplied base address register number. 639 * 640 * @param[in] controller The controller for which to retrieve the bar number. 641 * @param[in] bar_number This parameter depicts the BAR index/number to be read. 642 * 643 * @return Return a pointer value indicating the contents of the BAR. 644 * @retval NULL indicates an invalid BAR index/number was specified. 645 * @retval All other values indicate a valid VIRTUAL address from the BAR. 646 */ 647 void * 648 scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 649 uint16_t bar_number) 650 { 651 652 return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 653 } 654 655 /** 656 * @brief This method informs the SCI Core user that a phy/link became 657 * ready, but the phy is not allowed in the port. In some 658 * situations the underlying hardware only allows for certain phy 659 * to port mappings. If these mappings are violated, then this 660 * API is invoked. 661 * 662 * @param[in] controller This parameter represents the controller which 663 * contains the port. 664 * @param[in] port This parameter specifies the SCI port object for which 665 * the callback is being invoked. 666 * @param[in] phy This parameter specifies the phy that came ready, but the 667 * phy can't be a valid member of the port. 668 * 669 * @return none 670 */ 671 void 672 scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 673 SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 674 { 675 676 } 677