1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * BSD LICENSE 5 * 6 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * * Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * * Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in 17 * the documentation and/or other materials provided with the 18 * distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <dev/isci/isci.h> 37 38 #include <sys/sysctl.h> 39 #include <sys/malloc.h> 40 41 #include <cam/cam_periph.h> 42 43 #include <dev/led/led.h> 44 45 #include <dev/pci/pcireg.h> 46 #include <dev/pci/pcivar.h> 47 48 #include <dev/isci/scil/scic_logger.h> 49 #include <dev/isci/scil/scic_library.h> 50 #include <dev/isci/scil/scic_sgpio.h> 51 #include <dev/isci/scil/scic_user_callback.h> 52 53 #include <dev/isci/scil/scif_controller.h> 54 #include <dev/isci/scil/scif_library.h> 55 #include <dev/isci/scil/scif_logger.h> 56 #include <dev/isci/scil/scif_user_callback.h> 57 58 MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 59 60 struct isci_softc *g_isci; 61 uint32_t g_isci_debug_level = 0; 62 63 static int isci_probe(device_t); 64 static int isci_attach(device_t); 65 static int isci_detach(device_t); 66 67 int isci_initialize(struct isci_softc *isci); 68 69 void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 70 int nseg, int error); 71 72 static devclass_t isci_devclass; 73 74 static device_method_t isci_pci_methods[] = { 75 /* Device interface */ 76 DEVMETHOD(device_probe, isci_probe), 77 DEVMETHOD(device_attach, isci_attach), 78 DEVMETHOD(device_detach, isci_detach), 79 { 0, 0 } 80 }; 81 82 static driver_t isci_pci_driver = { 83 "isci", 84 isci_pci_methods, 85 sizeof(struct isci_softc), 86 }; 87 88 DRIVER_MODULE(isci, pci, isci_pci_driver, isci_devclass, 0, 0); 89 MODULE_DEPEND(isci, cam, 1, 1, 1); 90 91 static struct _pcsid 92 { 93 u_int32_t type; 94 const char *desc; 95 } pci_ids[] = { 96 { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 97 { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 98 { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 99 { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 100 { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 101 { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 102 { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 103 { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 104 { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 105 { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 106 { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 107 { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 108 { 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" }, 109 { 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" }, 110 { 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" }, 111 { 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 112 { 0x00000000, NULL } 113 }; 114 115 static int 116 isci_probe (device_t device) 117 { 118 u_int32_t type = pci_get_devid(device); 119 struct _pcsid *ep = pci_ids; 120 121 while (ep->type && ep->type != type) 122 ++ep; 123 124 if (ep->desc) 125 { 126 device_set_desc(device, ep->desc); 127 return (BUS_PROBE_DEFAULT); 128 } 129 else 130 return (ENXIO); 131 } 132 133 static int 134 isci_allocate_pci_memory(struct isci_softc *isci) 135 { 136 int i; 137 138 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 139 { 140 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 141 142 pci_bar->resource_id = PCIR_BAR(i*2); 143 pci_bar->resource = bus_alloc_resource_any(isci->device, 144 SYS_RES_MEMORY, &pci_bar->resource_id, 145 RF_ACTIVE); 146 147 if(pci_bar->resource == NULL) 148 isci_log_message(0, "ISCI", 149 "unable to allocate pci resource\n"); 150 else { 151 pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 152 pci_bar->bus_handle = 153 rman_get_bushandle(pci_bar->resource); 154 } 155 } 156 157 return (0); 158 } 159 160 static int 161 isci_attach(device_t device) 162 { 163 int error; 164 struct isci_softc *isci = DEVICE2SOFTC(device); 165 166 g_isci = isci; 167 isci->device = device; 168 pci_enable_busmaster(device); 169 170 isci_allocate_pci_memory(isci); 171 172 error = isci_initialize(isci); 173 174 if (error) 175 { 176 isci_detach(device); 177 return (error); 178 } 179 180 isci_interrupt_setup(isci); 181 isci_sysctl_initialize(isci); 182 183 return (0); 184 } 185 186 static int 187 isci_detach(device_t device) 188 { 189 struct isci_softc *isci = DEVICE2SOFTC(device); 190 int i, phy; 191 192 for (i = 0; i < isci->controller_count; i++) { 193 struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 194 SCI_STATUS status; 195 void *unmap_buffer; 196 197 if (controller->scif_controller_handle != NULL) { 198 scic_controller_disable_interrupts( 199 scif_controller_get_scic_handle(controller->scif_controller_handle)); 200 201 mtx_lock(&controller->lock); 202 status = scif_controller_stop(controller->scif_controller_handle, 0); 203 mtx_unlock(&controller->lock); 204 205 while (controller->is_started == TRUE) { 206 /* Now poll for interrupts until the controller stop complete 207 * callback is received. 208 */ 209 mtx_lock(&controller->lock); 210 isci_interrupt_poll_handler(controller); 211 mtx_unlock(&controller->lock); 212 pause("isci", 1); 213 } 214 215 if(controller->sim != NULL) { 216 mtx_lock(&controller->lock); 217 xpt_free_path(controller->path); 218 xpt_bus_deregister(cam_sim_path(controller->sim)); 219 cam_sim_free(controller->sim, TRUE); 220 mtx_unlock(&controller->lock); 221 } 222 } 223 224 if (controller->timer_memory != NULL) 225 free(controller->timer_memory, M_ISCI); 226 227 if (controller->remote_device_memory != NULL) 228 free(controller->remote_device_memory, M_ISCI); 229 230 for (phy = 0; phy < SCI_MAX_PHYS; phy++) { 231 if (controller->phys[phy].cdev_fault) 232 led_destroy(controller->phys[phy].cdev_fault); 233 234 if (controller->phys[phy].cdev_locate) 235 led_destroy(controller->phys[phy].cdev_locate); 236 } 237 238 while (1) { 239 sci_pool_get(controller->unmap_buffer_pool, unmap_buffer); 240 if (unmap_buffer == NULL) 241 break; 242 contigfree(unmap_buffer, PAGE_SIZE, M_ISCI); 243 } 244 } 245 246 /* The SCIF controllers have been stopped, so we can now 247 * free the SCI library memory. 248 */ 249 if (isci->sci_library_memory != NULL) 250 free(isci->sci_library_memory, M_ISCI); 251 252 for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 253 { 254 struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 255 256 if (pci_bar->resource != NULL) 257 bus_release_resource(device, SYS_RES_MEMORY, 258 pci_bar->resource_id, pci_bar->resource); 259 } 260 261 for (i = 0; i < isci->num_interrupts; i++) 262 { 263 struct ISCI_INTERRUPT_INFO *interrupt_info; 264 265 interrupt_info = &isci->interrupt_info[i]; 266 267 if(interrupt_info->tag != NULL) 268 bus_teardown_intr(device, interrupt_info->res, 269 interrupt_info->tag); 270 271 if(interrupt_info->res != NULL) 272 bus_release_resource(device, SYS_RES_IRQ, 273 rman_get_rid(interrupt_info->res), 274 interrupt_info->res); 275 276 pci_release_msi(device); 277 } 278 pci_disable_busmaster(device); 279 280 return (0); 281 } 282 283 int 284 isci_initialize(struct isci_softc *isci) 285 { 286 int error; 287 uint32_t status = 0; 288 uint32_t library_object_size; 289 uint32_t verbosity_mask; 290 uint32_t scic_log_object_mask; 291 uint32_t scif_log_object_mask; 292 uint8_t *header_buffer; 293 294 library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 295 296 isci->sci_library_memory = 297 malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 298 299 isci->sci_library_handle = scif_library_construct( 300 isci->sci_library_memory, SCI_MAX_CONTROLLERS); 301 302 sci_object_set_association( isci->sci_library_handle, (void *)isci); 303 304 verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 305 (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 306 (1<<SCI_LOG_VERBOSITY_TRACE); 307 308 scic_log_object_mask = 0xFFFFFFFF; 309 scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 310 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 311 scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 312 scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 313 scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 314 315 scif_log_object_mask = 0xFFFFFFFF; 316 scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 317 scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 318 319 TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 320 321 sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 322 scif_log_object_mask, verbosity_mask); 323 324 sci_logger_enable(sci_object_get_logger( 325 scif_library_get_scic_handle(isci->sci_library_handle)), 326 scic_log_object_mask, verbosity_mask); 327 328 header_buffer = (uint8_t *)&isci->pci_common_header; 329 for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 330 header_buffer[i] = pci_read_config(isci->device, i, 1); 331 332 scic_library_set_pci_info( 333 scif_library_get_scic_handle(isci->sci_library_handle), 334 &isci->pci_common_header); 335 336 isci->oem_parameters_found = FALSE; 337 338 isci_get_oem_parameters(isci); 339 340 /* trigger interrupt if 32 completions occur before timeout expires */ 341 isci->coalesce_number = 32; 342 343 /* trigger interrupt if 2 microseconds elapse after a completion occurs, 344 * regardless if "coalesce_number" completions have occurred 345 */ 346 isci->coalesce_timeout = 2; 347 348 isci->controller_count = scic_library_get_pci_device_controller_count( 349 scif_library_get_scic_handle(isci->sci_library_handle)); 350 351 for (int index = 0; index < isci->controller_count; index++) { 352 struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 353 SCI_CONTROLLER_HANDLE_T scif_controller_handle; 354 355 controller->index = index; 356 isci_controller_construct(controller, isci); 357 358 scif_controller_handle = controller->scif_controller_handle; 359 360 status = isci_controller_initialize(controller); 361 362 if(status != SCI_SUCCESS) { 363 isci_log_message(0, "ISCI", 364 "isci_controller_initialize FAILED: %x\n", 365 status); 366 return (status); 367 } 368 369 error = isci_controller_allocate_memory(controller); 370 371 if (error != 0) 372 return (error); 373 374 scif_controller_set_interrupt_coalescence( 375 scif_controller_handle, isci->coalesce_number, 376 isci->coalesce_timeout); 377 } 378 379 /* FreeBSD provides us a hook to ensure we get a chance to start 380 * our controllers and complete initial domain discovery before 381 * it searches for the boot device. Once we're done, we'll 382 * disestablish the hook, signaling the kernel that is can proceed 383 * with the boot process. 384 */ 385 isci->config_hook.ich_func = &isci_controller_start; 386 isci->config_hook.ich_arg = &isci->controllers[0]; 387 388 if (config_intrhook_establish(&isci->config_hook) != 0) 389 isci_log_message(0, "ISCI", 390 "config_intrhook_establish failed!\n"); 391 392 return (status); 393 } 394 395 void 396 isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 397 int nseg, int error) 398 { 399 struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 400 401 memory->error = error; 402 403 if (nseg != 1 || error != 0) 404 isci_log_message(0, "ISCI", 405 "Failed to allocate physically contiguous memory!\n"); 406 else 407 memory->physical_address = seg->ds_addr; 408 } 409 410 int 411 isci_allocate_dma_buffer(device_t device, struct ISCI_CONTROLLER *controller, 412 struct ISCI_MEMORY *memory) 413 { 414 uint32_t status; 415 416 status = bus_dma_tag_create(bus_get_dma_tag(device), 417 0x40 /* cacheline alignment */, 0x0, BUS_SPACE_MAXADDR, 418 BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 419 0x1 /* we want physically contiguous */, 420 memory->size, 0, busdma_lock_mutex, &controller->lock, 421 &memory->dma_tag); 422 423 if(status == ENOMEM) { 424 isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 425 return (status); 426 } 427 428 status = bus_dmamem_alloc(memory->dma_tag, 429 (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 430 431 if(status == ENOMEM) 432 { 433 isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 434 return (status); 435 } 436 437 status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 438 (void *)memory->virtual_address, memory->size, 439 isci_allocate_dma_buffer_callback, memory, 0); 440 441 if(status == EINVAL) 442 { 443 isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 444 return (status); 445 } 446 447 return (0); 448 } 449 450 /** 451 * @brief This callback method asks the user to associate the supplied 452 * lock with an operating environment specific locking construct. 453 * 454 * @param[in] controller This parameter specifies the controller with 455 * which this lock is to be associated. 456 * @param[in] lock This parameter specifies the lock for which the 457 * user should associate an operating environment specific 458 * locking object. 459 * 460 * @see The SCI_LOCK_LEVEL enumeration for more information. 461 * 462 * @return none. 463 */ 464 void 465 scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 466 SCI_LOCK_HANDLE_T lock) 467 { 468 469 } 470 471 /** 472 * @brief This callback method asks the user to de-associate the supplied 473 * lock with an operating environment specific locking construct. 474 * 475 * @param[in] controller This parameter specifies the controller with 476 * which this lock is to be de-associated. 477 * @param[in] lock This parameter specifies the lock for which the 478 * user should de-associate an operating environment specific 479 * locking object. 480 * 481 * @see The SCI_LOCK_LEVEL enumeration for more information. 482 * 483 * @return none. 484 */ 485 void 486 scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 487 SCI_LOCK_HANDLE_T lock) 488 { 489 490 } 491 492 493 /** 494 * @brief This callback method asks the user to acquire/get the lock. 495 * This method should pend until the lock has been acquired. 496 * 497 * @param[in] controller This parameter specifies the controller with 498 * which this lock is associated. 499 * @param[in] lock This parameter specifies the lock to be acquired. 500 * 501 * @return none 502 */ 503 void 504 scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 505 SCI_LOCK_HANDLE_T lock) 506 { 507 508 } 509 510 /** 511 * @brief This callback method asks the user to release a lock. 512 * 513 * @param[in] controller This parameter specifies the controller with 514 * which this lock is associated. 515 * @param[in] lock This parameter specifies the lock to be released. 516 * 517 * @return none 518 */ 519 void 520 scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 521 SCI_LOCK_HANDLE_T lock) 522 { 523 } 524 525 /** 526 * @brief This callback method creates an OS specific deferred task 527 * for internal usage. The handler to deferred task is stored by OS 528 * driver. 529 * 530 * @param[in] controller This parameter specifies the controller object 531 * with which this callback is associated. 532 * 533 * @return none 534 */ 535 void 536 scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 537 { 538 539 } 540 541 /** 542 * @brief This callback method schedules a OS specific deferred task. 543 * 544 * @param[in] controller This parameter specifies the controller 545 * object with which this callback is associated. 546 * @param[in] start_internal_io_task_routine This parameter specifies the 547 * sci start_internal_io routine. 548 * @param[in] context This parameter specifies a handle to a parameter 549 * that will be passed into the "start_internal_io_task_routine" 550 * when it is invoked. 551 * 552 * @return none 553 */ 554 void 555 scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 556 FUNCPTR start_internal_io_task_routine, void *context) 557 { 558 /** @todo Use FreeBSD tasklet to defer this routine to a later time, 559 * rather than calling the routine inline. 560 */ 561 SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 562 (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 563 564 sci_start_internal_io_routine(context); 565 } 566 567 /** 568 * @brief In this method the user must write to PCI memory via access. 569 * This method is used for access to memory space and IO space. 570 * 571 * @param[in] controller The controller for which to read a DWORD. 572 * @param[in] address This parameter depicts the address into 573 * which to write. 574 * @param[out] write_value This parameter depicts the value being written 575 * into the PCI memory location. 576 * 577 * @todo These PCI memory access calls likely needs to be optimized into macros? 578 */ 579 void 580 scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 581 void *address, uint32_t write_value) 582 { 583 SCI_CONTROLLER_HANDLE_T scif_controller = 584 (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 585 struct ISCI_CONTROLLER *isci_controller = 586 (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 587 struct isci_softc *isci = isci_controller->isci; 588 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 589 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 590 591 bus_space_write_4(isci->pci_bar[bar].bus_tag, 592 isci->pci_bar[bar].bus_handle, offset, write_value); 593 } 594 595 /** 596 * @brief In this method the user must read from PCI memory via access. 597 * This method is used for access to memory space and IO space. 598 * 599 * @param[in] controller The controller for which to read a DWORD. 600 * @param[in] address This parameter depicts the address from 601 * which to read. 602 * 603 * @return The value being returned from the PCI memory location. 604 * 605 * @todo This PCI memory access calls likely need to be optimized into macro? 606 */ 607 uint32_t 608 scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 609 { 610 SCI_CONTROLLER_HANDLE_T scif_controller = 611 (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 612 struct ISCI_CONTROLLER *isci_controller = 613 (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 614 struct isci_softc *isci = isci_controller->isci; 615 uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 616 bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 617 618 return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 619 isci->pci_bar[bar].bus_handle, offset)); 620 } 621 622 /** 623 * @brief This method is called when the core requires the OS driver 624 * to stall execution. This method is utilized during initialization 625 * or non-performance paths only. 626 * 627 * @param[in] microseconds This parameter specifies the number of 628 * microseconds for which to stall. The operating system driver 629 * is allowed to round this value up where necessary. 630 * 631 * @return none. 632 */ 633 void 634 scic_cb_stall_execution(uint32_t microseconds) 635 { 636 637 DELAY(microseconds); 638 } 639 640 /** 641 * @brief In this method the user must return the base address register (BAR) 642 * value for the supplied base address register number. 643 * 644 * @param[in] controller The controller for which to retrieve the bar number. 645 * @param[in] bar_number This parameter depicts the BAR index/number to be read. 646 * 647 * @return Return a pointer value indicating the contents of the BAR. 648 * @retval NULL indicates an invalid BAR index/number was specified. 649 * @retval All other values indicate a valid VIRTUAL address from the BAR. 650 */ 651 void * 652 scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 653 uint16_t bar_number) 654 { 655 656 return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 657 } 658 659 /** 660 * @brief This method informs the SCI Core user that a phy/link became 661 * ready, but the phy is not allowed in the port. In some 662 * situations the underlying hardware only allows for certain phy 663 * to port mappings. If these mappings are violated, then this 664 * API is invoked. 665 * 666 * @param[in] controller This parameter represents the controller which 667 * contains the port. 668 * @param[in] port This parameter specifies the SCI port object for which 669 * the callback is being invoked. 670 * @param[in] phy This parameter specifies the phy that came ready, but the 671 * phy can't be a valid member of the port. 672 * 673 * @return none 674 */ 675 void 676 scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 677 SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 678 { 679 680 } 681