1*f11c7f63SJim Harris /*- 2*f11c7f63SJim Harris * BSD LICENSE 3*f11c7f63SJim Harris * 4*f11c7f63SJim Harris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 5*f11c7f63SJim Harris * All rights reserved. 6*f11c7f63SJim Harris * 7*f11c7f63SJim Harris * Redistribution and use in source and binary forms, with or without 8*f11c7f63SJim Harris * modification, are permitted provided that the following conditions 9*f11c7f63SJim Harris * are met: 10*f11c7f63SJim Harris * 11*f11c7f63SJim Harris * * Redistributions of source code must retain the above copyright 12*f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer. 13*f11c7f63SJim Harris * * Redistributions in binary form must reproduce the above copyright 14*f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer in 15*f11c7f63SJim Harris * the documentation and/or other materials provided with the 16*f11c7f63SJim Harris * distribution. 17*f11c7f63SJim Harris * 18*f11c7f63SJim Harris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19*f11c7f63SJim Harris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20*f11c7f63SJim Harris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21*f11c7f63SJim Harris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22*f11c7f63SJim Harris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23*f11c7f63SJim Harris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24*f11c7f63SJim Harris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25*f11c7f63SJim Harris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26*f11c7f63SJim Harris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27*f11c7f63SJim Harris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28*f11c7f63SJim Harris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29*f11c7f63SJim Harris */ 30*f11c7f63SJim Harris 31*f11c7f63SJim Harris #include <sys/cdefs.h> 32*f11c7f63SJim Harris __FBSDID("$FreeBSD$"); 33*f11c7f63SJim Harris 34*f11c7f63SJim Harris #include <dev/isci/isci.h> 35*f11c7f63SJim Harris 36*f11c7f63SJim Harris #include <sys/sysctl.h> 37*f11c7f63SJim Harris #include <sys/malloc.h> 38*f11c7f63SJim Harris 39*f11c7f63SJim Harris #include <cam/cam_periph.h> 40*f11c7f63SJim Harris 41*f11c7f63SJim Harris #include <dev/pci/pcireg.h> 42*f11c7f63SJim Harris #include <dev/pci/pcivar.h> 43*f11c7f63SJim Harris 44*f11c7f63SJim Harris #include <dev/isci/scil/scic_logger.h> 45*f11c7f63SJim Harris #include <dev/isci/scil/scic_library.h> 46*f11c7f63SJim Harris #include <dev/isci/scil/scic_user_callback.h> 47*f11c7f63SJim Harris 48*f11c7f63SJim Harris #include <dev/isci/scil/scif_controller.h> 49*f11c7f63SJim Harris #include <dev/isci/scil/scif_library.h> 50*f11c7f63SJim Harris #include <dev/isci/scil/scif_logger.h> 51*f11c7f63SJim Harris #include <dev/isci/scil/scif_user_callback.h> 52*f11c7f63SJim Harris 53*f11c7f63SJim Harris MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 54*f11c7f63SJim Harris 55*f11c7f63SJim Harris struct isci_softc *g_isci; 56*f11c7f63SJim Harris uint32_t g_isci_debug_level = 0; 57*f11c7f63SJim Harris 58*f11c7f63SJim Harris static int isci_probe(device_t); 59*f11c7f63SJim Harris static int isci_attach(device_t); 60*f11c7f63SJim Harris static int isci_detach(device_t); 61*f11c7f63SJim Harris 62*f11c7f63SJim Harris int isci_initialize(struct isci_softc *isci); 63*f11c7f63SJim Harris 64*f11c7f63SJim Harris void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 65*f11c7f63SJim Harris int nseg, int error); 66*f11c7f63SJim Harris 67*f11c7f63SJim Harris static devclass_t isci_devclass; 68*f11c7f63SJim Harris 69*f11c7f63SJim Harris static device_method_t isci_pci_methods[] = { 70*f11c7f63SJim Harris /* Device interface */ 71*f11c7f63SJim Harris DEVMETHOD(device_probe, isci_probe), 72*f11c7f63SJim Harris DEVMETHOD(device_attach, isci_attach), 73*f11c7f63SJim Harris DEVMETHOD(device_detach, isci_detach), 74*f11c7f63SJim Harris { 0, 0 } 75*f11c7f63SJim Harris }; 76*f11c7f63SJim Harris 77*f11c7f63SJim Harris static driver_t isci_pci_driver = { 78*f11c7f63SJim Harris "isci", 79*f11c7f63SJim Harris isci_pci_methods, 80*f11c7f63SJim Harris sizeof(struct isci_softc), 81*f11c7f63SJim Harris }; 82*f11c7f63SJim Harris 83*f11c7f63SJim Harris DRIVER_MODULE(isci, pci, isci_pci_driver, isci_devclass, 0, 0); 84*f11c7f63SJim Harris 85*f11c7f63SJim Harris static struct _pcsid 86*f11c7f63SJim Harris { 87*f11c7f63SJim Harris u_int32_t type; 88*f11c7f63SJim Harris const char *desc; 89*f11c7f63SJim Harris } pci_ids[] = { 90*f11c7f63SJim Harris { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 91*f11c7f63SJim Harris { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 92*f11c7f63SJim Harris { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 93*f11c7f63SJim Harris { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 94*f11c7f63SJim Harris { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 95*f11c7f63SJim Harris { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 96*f11c7f63SJim Harris { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 97*f11c7f63SJim Harris { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 98*f11c7f63SJim Harris { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 99*f11c7f63SJim Harris { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 100*f11c7f63SJim Harris { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 101*f11c7f63SJim Harris { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 102*f11c7f63SJim Harris { 0x00000000, NULL } 103*f11c7f63SJim Harris }; 104*f11c7f63SJim Harris 105*f11c7f63SJim Harris static int 106*f11c7f63SJim Harris isci_probe (device_t device) 107*f11c7f63SJim Harris { 108*f11c7f63SJim Harris u_int32_t type = pci_get_devid(device); 109*f11c7f63SJim Harris struct _pcsid *ep = pci_ids; 110*f11c7f63SJim Harris 111*f11c7f63SJim Harris while (ep->type && ep->type != type) 112*f11c7f63SJim Harris ++ep; 113*f11c7f63SJim Harris 114*f11c7f63SJim Harris if (ep->desc) 115*f11c7f63SJim Harris { 116*f11c7f63SJim Harris device_set_desc(device, ep->desc); 117*f11c7f63SJim Harris return (0); 118*f11c7f63SJim Harris } 119*f11c7f63SJim Harris else 120*f11c7f63SJim Harris return (ENXIO); 121*f11c7f63SJim Harris } 122*f11c7f63SJim Harris 123*f11c7f63SJim Harris static int 124*f11c7f63SJim Harris isci_allocate_pci_memory(struct isci_softc *isci) 125*f11c7f63SJim Harris { 126*f11c7f63SJim Harris int i; 127*f11c7f63SJim Harris 128*f11c7f63SJim Harris for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 129*f11c7f63SJim Harris { 130*f11c7f63SJim Harris struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 131*f11c7f63SJim Harris 132*f11c7f63SJim Harris pci_bar->resource_id = PCIR_BAR(i*2); 133*f11c7f63SJim Harris pci_bar->resource = bus_alloc_resource(isci->device, 134*f11c7f63SJim Harris SYS_RES_MEMORY, &pci_bar->resource_id, 0, ~0, 1, 135*f11c7f63SJim Harris RF_ACTIVE); 136*f11c7f63SJim Harris 137*f11c7f63SJim Harris if(pci_bar->resource == NULL) 138*f11c7f63SJim Harris isci_log_message(0, "ISCI", 139*f11c7f63SJim Harris "unable to allocate pci resource\n"); 140*f11c7f63SJim Harris else { 141*f11c7f63SJim Harris pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 142*f11c7f63SJim Harris pci_bar->bus_handle = 143*f11c7f63SJim Harris rman_get_bushandle(pci_bar->resource); 144*f11c7f63SJim Harris } 145*f11c7f63SJim Harris } 146*f11c7f63SJim Harris 147*f11c7f63SJim Harris return (0); 148*f11c7f63SJim Harris } 149*f11c7f63SJim Harris 150*f11c7f63SJim Harris static int 151*f11c7f63SJim Harris isci_attach(device_t device) 152*f11c7f63SJim Harris { 153*f11c7f63SJim Harris int error; 154*f11c7f63SJim Harris struct isci_softc *isci = DEVICE2SOFTC(device); 155*f11c7f63SJim Harris 156*f11c7f63SJim Harris g_isci = isci; 157*f11c7f63SJim Harris isci->device = device; 158*f11c7f63SJim Harris 159*f11c7f63SJim Harris isci_allocate_pci_memory(isci); 160*f11c7f63SJim Harris 161*f11c7f63SJim Harris error = isci_initialize(isci); 162*f11c7f63SJim Harris 163*f11c7f63SJim Harris if (error) 164*f11c7f63SJim Harris { 165*f11c7f63SJim Harris isci_detach(device); 166*f11c7f63SJim Harris return (error); 167*f11c7f63SJim Harris } 168*f11c7f63SJim Harris 169*f11c7f63SJim Harris isci_interrupt_setup(isci); 170*f11c7f63SJim Harris isci_sysctl_initialize(isci); 171*f11c7f63SJim Harris 172*f11c7f63SJim Harris return (0); 173*f11c7f63SJim Harris } 174*f11c7f63SJim Harris 175*f11c7f63SJim Harris static int 176*f11c7f63SJim Harris isci_detach(device_t device) 177*f11c7f63SJim Harris { 178*f11c7f63SJim Harris struct isci_softc *isci = DEVICE2SOFTC(device); 179*f11c7f63SJim Harris int i; 180*f11c7f63SJim Harris 181*f11c7f63SJim Harris for (i = 0; i < isci->controller_count; i++) { 182*f11c7f63SJim Harris struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 183*f11c7f63SJim Harris SCI_STATUS status; 184*f11c7f63SJim Harris 185*f11c7f63SJim Harris if (controller->scif_controller_handle != NULL) { 186*f11c7f63SJim Harris scic_controller_disable_interrupts( 187*f11c7f63SJim Harris scif_controller_get_scic_handle(controller->scif_controller_handle)); 188*f11c7f63SJim Harris 189*f11c7f63SJim Harris mtx_lock(&controller->lock); 190*f11c7f63SJim Harris status = scif_controller_stop(controller->scif_controller_handle, 0); 191*f11c7f63SJim Harris mtx_unlock(&controller->lock); 192*f11c7f63SJim Harris 193*f11c7f63SJim Harris while (controller->is_started == TRUE) { 194*f11c7f63SJim Harris /* Now poll for interrupts until the controller stop complete 195*f11c7f63SJim Harris * callback is received. 196*f11c7f63SJim Harris */ 197*f11c7f63SJim Harris mtx_lock(&controller->lock); 198*f11c7f63SJim Harris isci_interrupt_poll_handler(controller); 199*f11c7f63SJim Harris mtx_unlock(&controller->lock); 200*f11c7f63SJim Harris pause("isci", 1); 201*f11c7f63SJim Harris } 202*f11c7f63SJim Harris 203*f11c7f63SJim Harris if(controller->sim != NULL) { 204*f11c7f63SJim Harris mtx_lock(&controller->lock); 205*f11c7f63SJim Harris xpt_free_path(controller->path); 206*f11c7f63SJim Harris xpt_bus_deregister(cam_sim_path(controller->sim)); 207*f11c7f63SJim Harris cam_sim_free(controller->sim, TRUE); 208*f11c7f63SJim Harris mtx_unlock(&controller->lock); 209*f11c7f63SJim Harris } 210*f11c7f63SJim Harris } 211*f11c7f63SJim Harris 212*f11c7f63SJim Harris if (controller->timer_memory != NULL) 213*f11c7f63SJim Harris free(controller->timer_memory, M_ISCI); 214*f11c7f63SJim Harris 215*f11c7f63SJim Harris if (controller->remote_device_memory != NULL) 216*f11c7f63SJim Harris free(controller->remote_device_memory, M_ISCI); 217*f11c7f63SJim Harris } 218*f11c7f63SJim Harris 219*f11c7f63SJim Harris /* The SCIF controllers have been stopped, so we can now 220*f11c7f63SJim Harris * free the SCI library memory. 221*f11c7f63SJim Harris */ 222*f11c7f63SJim Harris if (isci->sci_library_memory != NULL) 223*f11c7f63SJim Harris free(isci->sci_library_memory, M_ISCI); 224*f11c7f63SJim Harris 225*f11c7f63SJim Harris for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 226*f11c7f63SJim Harris { 227*f11c7f63SJim Harris struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 228*f11c7f63SJim Harris 229*f11c7f63SJim Harris if (pci_bar->resource != NULL) 230*f11c7f63SJim Harris bus_release_resource(device, SYS_RES_MEMORY, 231*f11c7f63SJim Harris pci_bar->resource_id, pci_bar->resource); 232*f11c7f63SJim Harris } 233*f11c7f63SJim Harris 234*f11c7f63SJim Harris for (i = 0; i < isci->num_interrupts; i++) 235*f11c7f63SJim Harris { 236*f11c7f63SJim Harris struct ISCI_INTERRUPT_INFO *interrupt_info; 237*f11c7f63SJim Harris 238*f11c7f63SJim Harris interrupt_info = &isci->interrupt_info[i]; 239*f11c7f63SJim Harris 240*f11c7f63SJim Harris if(interrupt_info->tag != NULL) 241*f11c7f63SJim Harris bus_teardown_intr(device, interrupt_info->res, 242*f11c7f63SJim Harris interrupt_info->tag); 243*f11c7f63SJim Harris 244*f11c7f63SJim Harris if(interrupt_info->res != NULL) 245*f11c7f63SJim Harris bus_release_resource(device, SYS_RES_IRQ, 246*f11c7f63SJim Harris rman_get_rid(interrupt_info->res), 247*f11c7f63SJim Harris interrupt_info->res); 248*f11c7f63SJim Harris 249*f11c7f63SJim Harris pci_release_msi(device); 250*f11c7f63SJim Harris } 251*f11c7f63SJim Harris 252*f11c7f63SJim Harris return (0); 253*f11c7f63SJim Harris } 254*f11c7f63SJim Harris 255*f11c7f63SJim Harris int 256*f11c7f63SJim Harris isci_initialize(struct isci_softc *isci) 257*f11c7f63SJim Harris { 258*f11c7f63SJim Harris int error; 259*f11c7f63SJim Harris uint32_t status = 0; 260*f11c7f63SJim Harris uint32_t library_object_size; 261*f11c7f63SJim Harris uint32_t verbosity_mask; 262*f11c7f63SJim Harris uint32_t scic_log_object_mask; 263*f11c7f63SJim Harris uint32_t scif_log_object_mask; 264*f11c7f63SJim Harris uint8_t *header_buffer; 265*f11c7f63SJim Harris 266*f11c7f63SJim Harris library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 267*f11c7f63SJim Harris 268*f11c7f63SJim Harris isci->sci_library_memory = 269*f11c7f63SJim Harris malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 270*f11c7f63SJim Harris 271*f11c7f63SJim Harris isci->sci_library_handle = scif_library_construct( 272*f11c7f63SJim Harris isci->sci_library_memory, SCI_MAX_CONTROLLERS); 273*f11c7f63SJim Harris 274*f11c7f63SJim Harris sci_object_set_association( isci->sci_library_handle, (void *)isci); 275*f11c7f63SJim Harris 276*f11c7f63SJim Harris verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 277*f11c7f63SJim Harris (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 278*f11c7f63SJim Harris (1<<SCI_LOG_VERBOSITY_TRACE); 279*f11c7f63SJim Harris 280*f11c7f63SJim Harris scic_log_object_mask = 0xFFFFFFFF; 281*f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 282*f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 283*f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 284*f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 285*f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 286*f11c7f63SJim Harris 287*f11c7f63SJim Harris scif_log_object_mask = 0xFFFFFFFF; 288*f11c7f63SJim Harris scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 289*f11c7f63SJim Harris scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 290*f11c7f63SJim Harris 291*f11c7f63SJim Harris TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 292*f11c7f63SJim Harris 293*f11c7f63SJim Harris sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 294*f11c7f63SJim Harris scif_log_object_mask, verbosity_mask); 295*f11c7f63SJim Harris 296*f11c7f63SJim Harris sci_logger_enable(sci_object_get_logger( 297*f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle)), 298*f11c7f63SJim Harris scic_log_object_mask, verbosity_mask); 299*f11c7f63SJim Harris 300*f11c7f63SJim Harris header_buffer = (uint8_t *)&isci->pci_common_header; 301*f11c7f63SJim Harris for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 302*f11c7f63SJim Harris header_buffer[i] = pci_read_config(isci->device, i, 1); 303*f11c7f63SJim Harris 304*f11c7f63SJim Harris scic_library_set_pci_info( 305*f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle), 306*f11c7f63SJim Harris &isci->pci_common_header); 307*f11c7f63SJim Harris 308*f11c7f63SJim Harris isci->oem_parameters_found = FALSE; 309*f11c7f63SJim Harris 310*f11c7f63SJim Harris isci_get_oem_parameters(isci); 311*f11c7f63SJim Harris 312*f11c7f63SJim Harris /* trigger interrupt if 32 completions occur before timeout expires */ 313*f11c7f63SJim Harris isci->coalesce_number = 32; 314*f11c7f63SJim Harris 315*f11c7f63SJim Harris /* trigger interrupt if 2 microseconds elapse after a completion occurs, 316*f11c7f63SJim Harris * regardless if "coalesce_number" completions have occurred 317*f11c7f63SJim Harris */ 318*f11c7f63SJim Harris isci->coalesce_timeout = 2; 319*f11c7f63SJim Harris 320*f11c7f63SJim Harris isci->controller_count = scic_library_get_pci_device_controller_count( 321*f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle)); 322*f11c7f63SJim Harris 323*f11c7f63SJim Harris for (int index = 0; index < isci->controller_count; index++) { 324*f11c7f63SJim Harris struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 325*f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller_handle; 326*f11c7f63SJim Harris 327*f11c7f63SJim Harris controller->index = index; 328*f11c7f63SJim Harris isci_controller_construct(controller, isci); 329*f11c7f63SJim Harris 330*f11c7f63SJim Harris scif_controller_handle = controller->scif_controller_handle; 331*f11c7f63SJim Harris 332*f11c7f63SJim Harris status = isci_controller_initialize(controller); 333*f11c7f63SJim Harris 334*f11c7f63SJim Harris if(status != SCI_SUCCESS) { 335*f11c7f63SJim Harris isci_log_message(0, "ISCI", 336*f11c7f63SJim Harris "isci_controller_initialize FAILED: %x\n", 337*f11c7f63SJim Harris status); 338*f11c7f63SJim Harris return (status); 339*f11c7f63SJim Harris } 340*f11c7f63SJim Harris 341*f11c7f63SJim Harris error = isci_controller_allocate_memory(controller); 342*f11c7f63SJim Harris 343*f11c7f63SJim Harris if (error != 0) 344*f11c7f63SJim Harris return (error); 345*f11c7f63SJim Harris 346*f11c7f63SJim Harris scif_controller_set_interrupt_coalescence( 347*f11c7f63SJim Harris scif_controller_handle, isci->coalesce_number, 348*f11c7f63SJim Harris isci->coalesce_timeout); 349*f11c7f63SJim Harris } 350*f11c7f63SJim Harris 351*f11c7f63SJim Harris /* FreeBSD provides us a hook to ensure we get a chance to start 352*f11c7f63SJim Harris * our controllers and complete initial domain discovery before 353*f11c7f63SJim Harris * it searches for the boot device. Once we're done, we'll 354*f11c7f63SJim Harris * disestablish the hook, signaling the kernel that is can proceed 355*f11c7f63SJim Harris * with the boot process. 356*f11c7f63SJim Harris */ 357*f11c7f63SJim Harris isci->config_hook.ich_func = &isci_controller_start; 358*f11c7f63SJim Harris isci->config_hook.ich_arg = &isci->controllers[0]; 359*f11c7f63SJim Harris 360*f11c7f63SJim Harris if (config_intrhook_establish(&isci->config_hook) != 0) 361*f11c7f63SJim Harris isci_log_message(0, "ISCI", 362*f11c7f63SJim Harris "config_intrhook_establish failed!\n"); 363*f11c7f63SJim Harris 364*f11c7f63SJim Harris return (status); 365*f11c7f63SJim Harris } 366*f11c7f63SJim Harris 367*f11c7f63SJim Harris void 368*f11c7f63SJim Harris isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 369*f11c7f63SJim Harris int nseg, int error) 370*f11c7f63SJim Harris { 371*f11c7f63SJim Harris struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 372*f11c7f63SJim Harris 373*f11c7f63SJim Harris memory->error = error; 374*f11c7f63SJim Harris 375*f11c7f63SJim Harris if (nseg != 1 || error != 0) 376*f11c7f63SJim Harris isci_log_message(0, "ISCI", 377*f11c7f63SJim Harris "Failed to allocate physically contiguous memory!\n"); 378*f11c7f63SJim Harris else 379*f11c7f63SJim Harris memory->physical_address = seg->ds_addr; 380*f11c7f63SJim Harris } 381*f11c7f63SJim Harris 382*f11c7f63SJim Harris int 383*f11c7f63SJim Harris isci_allocate_dma_buffer(device_t device, struct ISCI_MEMORY *memory) 384*f11c7f63SJim Harris { 385*f11c7f63SJim Harris uint32_t status; 386*f11c7f63SJim Harris 387*f11c7f63SJim Harris status = bus_dma_tag_create(bus_get_dma_tag(device), 388*f11c7f63SJim Harris 0x40 /* cacheline alignment */, 0x0, BUS_SPACE_MAXADDR, 389*f11c7f63SJim Harris BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 390*f11c7f63SJim Harris 0x1 /* we want physically contiguous */, 391*f11c7f63SJim Harris memory->size, 0, NULL, NULL, &memory->dma_tag); 392*f11c7f63SJim Harris 393*f11c7f63SJim Harris if(status == ENOMEM) { 394*f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 395*f11c7f63SJim Harris return (status); 396*f11c7f63SJim Harris } 397*f11c7f63SJim Harris 398*f11c7f63SJim Harris status = bus_dmamem_alloc(memory->dma_tag, 399*f11c7f63SJim Harris (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 400*f11c7f63SJim Harris 401*f11c7f63SJim Harris if(status == ENOMEM) 402*f11c7f63SJim Harris { 403*f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 404*f11c7f63SJim Harris return (status); 405*f11c7f63SJim Harris } 406*f11c7f63SJim Harris 407*f11c7f63SJim Harris status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 408*f11c7f63SJim Harris (void *)memory->virtual_address, memory->size, 409*f11c7f63SJim Harris isci_allocate_dma_buffer_callback, memory, 0); 410*f11c7f63SJim Harris 411*f11c7f63SJim Harris if(status == EINVAL) 412*f11c7f63SJim Harris { 413*f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 414*f11c7f63SJim Harris return (status); 415*f11c7f63SJim Harris } 416*f11c7f63SJim Harris 417*f11c7f63SJim Harris return (0); 418*f11c7f63SJim Harris } 419*f11c7f63SJim Harris 420*f11c7f63SJim Harris /** 421*f11c7f63SJim Harris * @brief This callback method asks the user to associate the supplied 422*f11c7f63SJim Harris * lock with an operating environment specific locking construct. 423*f11c7f63SJim Harris * 424*f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 425*f11c7f63SJim Harris * which this lock is to be associated. 426*f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock for which the 427*f11c7f63SJim Harris * user should associate an operating environment specific 428*f11c7f63SJim Harris * locking object. 429*f11c7f63SJim Harris * 430*f11c7f63SJim Harris * @see The SCI_LOCK_LEVEL enumeration for more information. 431*f11c7f63SJim Harris * 432*f11c7f63SJim Harris * @return none. 433*f11c7f63SJim Harris */ 434*f11c7f63SJim Harris void 435*f11c7f63SJim Harris scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 436*f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 437*f11c7f63SJim Harris { 438*f11c7f63SJim Harris 439*f11c7f63SJim Harris } 440*f11c7f63SJim Harris 441*f11c7f63SJim Harris /** 442*f11c7f63SJim Harris * @brief This callback method asks the user to de-associate the supplied 443*f11c7f63SJim Harris * lock with an operating environment specific locking construct. 444*f11c7f63SJim Harris * 445*f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 446*f11c7f63SJim Harris * which this lock is to be de-associated. 447*f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock for which the 448*f11c7f63SJim Harris * user should de-associate an operating environment specific 449*f11c7f63SJim Harris * locking object. 450*f11c7f63SJim Harris * 451*f11c7f63SJim Harris * @see The SCI_LOCK_LEVEL enumeration for more information. 452*f11c7f63SJim Harris * 453*f11c7f63SJim Harris * @return none. 454*f11c7f63SJim Harris */ 455*f11c7f63SJim Harris void 456*f11c7f63SJim Harris scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 457*f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 458*f11c7f63SJim Harris { 459*f11c7f63SJim Harris 460*f11c7f63SJim Harris } 461*f11c7f63SJim Harris 462*f11c7f63SJim Harris 463*f11c7f63SJim Harris /** 464*f11c7f63SJim Harris * @brief This callback method asks the user to acquire/get the lock. 465*f11c7f63SJim Harris * This method should pend until the lock has been acquired. 466*f11c7f63SJim Harris * 467*f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 468*f11c7f63SJim Harris * which this lock is associated. 469*f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock to be acquired. 470*f11c7f63SJim Harris * 471*f11c7f63SJim Harris * @return none 472*f11c7f63SJim Harris */ 473*f11c7f63SJim Harris void 474*f11c7f63SJim Harris scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 475*f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 476*f11c7f63SJim Harris { 477*f11c7f63SJim Harris 478*f11c7f63SJim Harris } 479*f11c7f63SJim Harris 480*f11c7f63SJim Harris /** 481*f11c7f63SJim Harris * @brief This callback method asks the user to release a lock. 482*f11c7f63SJim Harris * 483*f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 484*f11c7f63SJim Harris * which this lock is associated. 485*f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock to be released. 486*f11c7f63SJim Harris * 487*f11c7f63SJim Harris * @return none 488*f11c7f63SJim Harris */ 489*f11c7f63SJim Harris void 490*f11c7f63SJim Harris scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 491*f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 492*f11c7f63SJim Harris { 493*f11c7f63SJim Harris } 494*f11c7f63SJim Harris 495*f11c7f63SJim Harris /** 496*f11c7f63SJim Harris * @brief This callback method creates an OS specific deferred task 497*f11c7f63SJim Harris * for internal usage. The handler to deferred task is stored by OS 498*f11c7f63SJim Harris * driver. 499*f11c7f63SJim Harris * 500*f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller object 501*f11c7f63SJim Harris * with which this callback is associated. 502*f11c7f63SJim Harris * 503*f11c7f63SJim Harris * @return none 504*f11c7f63SJim Harris */ 505*f11c7f63SJim Harris void 506*f11c7f63SJim Harris scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 507*f11c7f63SJim Harris { 508*f11c7f63SJim Harris 509*f11c7f63SJim Harris } 510*f11c7f63SJim Harris 511*f11c7f63SJim Harris /** 512*f11c7f63SJim Harris * @brief This callback method schedules a OS specific deferred task. 513*f11c7f63SJim Harris * 514*f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller 515*f11c7f63SJim Harris * object with which this callback is associated. 516*f11c7f63SJim Harris * @param[in] start_internal_io_task_routine This parameter specifies the 517*f11c7f63SJim Harris * sci start_internal_io routine. 518*f11c7f63SJim Harris * @param[in] context This parameter specifies a handle to a parameter 519*f11c7f63SJim Harris * that will be passed into the "start_internal_io_task_routine" 520*f11c7f63SJim Harris * when it is invoked. 521*f11c7f63SJim Harris * 522*f11c7f63SJim Harris * @return none 523*f11c7f63SJim Harris */ 524*f11c7f63SJim Harris void 525*f11c7f63SJim Harris scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 526*f11c7f63SJim Harris FUNCPTR start_internal_io_task_routine, void *context) 527*f11c7f63SJim Harris { 528*f11c7f63SJim Harris /** @todo Use FreeBSD tasklet to defer this routine to a later time, 529*f11c7f63SJim Harris * rather than calling the routine inline. 530*f11c7f63SJim Harris */ 531*f11c7f63SJim Harris SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 532*f11c7f63SJim Harris (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 533*f11c7f63SJim Harris 534*f11c7f63SJim Harris sci_start_internal_io_routine(context); 535*f11c7f63SJim Harris } 536*f11c7f63SJim Harris 537*f11c7f63SJim Harris /** 538*f11c7f63SJim Harris * @brief In this method the user must write to PCI memory via access. 539*f11c7f63SJim Harris * This method is used for access to memory space and IO space. 540*f11c7f63SJim Harris * 541*f11c7f63SJim Harris * @param[in] controller The controller for which to read a DWORD. 542*f11c7f63SJim Harris * @param[in] address This parameter depicts the address into 543*f11c7f63SJim Harris * which to write. 544*f11c7f63SJim Harris * @param[out] write_value This parameter depicts the value being written 545*f11c7f63SJim Harris * into the PCI memory location. 546*f11c7f63SJim Harris * 547*f11c7f63SJim Harris * @todo These PCI memory access calls likely needs to be optimized into macros? 548*f11c7f63SJim Harris */ 549*f11c7f63SJim Harris void 550*f11c7f63SJim Harris scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 551*f11c7f63SJim Harris void *address, uint32_t write_value) 552*f11c7f63SJim Harris { 553*f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller = 554*f11c7f63SJim Harris (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 555*f11c7f63SJim Harris struct ISCI_CONTROLLER *isci_controller = 556*f11c7f63SJim Harris (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 557*f11c7f63SJim Harris struct isci_softc *isci = isci_controller->isci; 558*f11c7f63SJim Harris uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 559*f11c7f63SJim Harris bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 560*f11c7f63SJim Harris 561*f11c7f63SJim Harris bus_space_write_4(isci->pci_bar[bar].bus_tag, 562*f11c7f63SJim Harris isci->pci_bar[bar].bus_handle, offset, write_value); 563*f11c7f63SJim Harris } 564*f11c7f63SJim Harris 565*f11c7f63SJim Harris /** 566*f11c7f63SJim Harris * @brief In this method the user must read from PCI memory via access. 567*f11c7f63SJim Harris * This method is used for access to memory space and IO space. 568*f11c7f63SJim Harris * 569*f11c7f63SJim Harris * @param[in] controller The controller for which to read a DWORD. 570*f11c7f63SJim Harris * @param[in] address This parameter depicts the address from 571*f11c7f63SJim Harris * which to read. 572*f11c7f63SJim Harris * 573*f11c7f63SJim Harris * @return The value being returned from the PCI memory location. 574*f11c7f63SJim Harris * 575*f11c7f63SJim Harris * @todo This PCI memory access calls likely need to be optimized into macro? 576*f11c7f63SJim Harris */ 577*f11c7f63SJim Harris uint32_t 578*f11c7f63SJim Harris scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 579*f11c7f63SJim Harris { 580*f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller = 581*f11c7f63SJim Harris (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 582*f11c7f63SJim Harris struct ISCI_CONTROLLER *isci_controller = 583*f11c7f63SJim Harris (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 584*f11c7f63SJim Harris struct isci_softc *isci = isci_controller->isci; 585*f11c7f63SJim Harris uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 586*f11c7f63SJim Harris bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 587*f11c7f63SJim Harris 588*f11c7f63SJim Harris return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 589*f11c7f63SJim Harris isci->pci_bar[bar].bus_handle, offset)); 590*f11c7f63SJim Harris } 591*f11c7f63SJim Harris 592*f11c7f63SJim Harris /** 593*f11c7f63SJim Harris * @brief This method is called when the core requires the OS driver 594*f11c7f63SJim Harris * to stall execution. This method is utilized during initialization 595*f11c7f63SJim Harris * or non-performance paths only. 596*f11c7f63SJim Harris * 597*f11c7f63SJim Harris * @param[in] microseconds This parameter specifies the number of 598*f11c7f63SJim Harris * microseconds for which to stall. The operating system driver 599*f11c7f63SJim Harris * is allowed to round this value up where necessary. 600*f11c7f63SJim Harris * 601*f11c7f63SJim Harris * @return none. 602*f11c7f63SJim Harris */ 603*f11c7f63SJim Harris void 604*f11c7f63SJim Harris scic_cb_stall_execution(uint32_t microseconds) 605*f11c7f63SJim Harris { 606*f11c7f63SJim Harris 607*f11c7f63SJim Harris DELAY(microseconds); 608*f11c7f63SJim Harris } 609*f11c7f63SJim Harris 610*f11c7f63SJim Harris /** 611*f11c7f63SJim Harris * @brief In this method the user must return the base address register (BAR) 612*f11c7f63SJim Harris * value for the supplied base address register number. 613*f11c7f63SJim Harris * 614*f11c7f63SJim Harris * @param[in] controller The controller for which to retrieve the bar number. 615*f11c7f63SJim Harris * @param[in] bar_number This parameter depicts the BAR index/number to be read. 616*f11c7f63SJim Harris * 617*f11c7f63SJim Harris * @return Return a pointer value indicating the contents of the BAR. 618*f11c7f63SJim Harris * @retval NULL indicates an invalid BAR index/number was specified. 619*f11c7f63SJim Harris * @retval All other values indicate a valid VIRTUAL address from the BAR. 620*f11c7f63SJim Harris */ 621*f11c7f63SJim Harris void * 622*f11c7f63SJim Harris scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 623*f11c7f63SJim Harris uint16_t bar_number) 624*f11c7f63SJim Harris { 625*f11c7f63SJim Harris 626*f11c7f63SJim Harris return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 627*f11c7f63SJim Harris } 628*f11c7f63SJim Harris 629*f11c7f63SJim Harris /** 630*f11c7f63SJim Harris * @brief This method informs the SCI Core user that a phy/link became 631*f11c7f63SJim Harris * ready, but the phy is not allowed in the port. In some 632*f11c7f63SJim Harris * situations the underlying hardware only allows for certain phy 633*f11c7f63SJim Harris * to port mappings. If these mappings are violated, then this 634*f11c7f63SJim Harris * API is invoked. 635*f11c7f63SJim Harris * 636*f11c7f63SJim Harris * @param[in] controller This parameter represents the controller which 637*f11c7f63SJim Harris * contains the port. 638*f11c7f63SJim Harris * @param[in] port This parameter specifies the SCI port object for which 639*f11c7f63SJim Harris * the callback is being invoked. 640*f11c7f63SJim Harris * @param[in] phy This parameter specifies the phy that came ready, but the 641*f11c7f63SJim Harris * phy can't be a valid member of the port. 642*f11c7f63SJim Harris * 643*f11c7f63SJim Harris * @return none 644*f11c7f63SJim Harris */ 645*f11c7f63SJim Harris void 646*f11c7f63SJim Harris scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 647*f11c7f63SJim Harris SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 648*f11c7f63SJim Harris { 649*f11c7f63SJim Harris 650*f11c7f63SJim Harris } 651