1f11c7f63SJim Harris /*- 2f11c7f63SJim Harris * BSD LICENSE 3f11c7f63SJim Harris * 4f11c7f63SJim Harris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 5f11c7f63SJim Harris * All rights reserved. 6f11c7f63SJim Harris * 7f11c7f63SJim Harris * Redistribution and use in source and binary forms, with or without 8f11c7f63SJim Harris * modification, are permitted provided that the following conditions 9f11c7f63SJim Harris * are met: 10f11c7f63SJim Harris * 11f11c7f63SJim Harris * * Redistributions of source code must retain the above copyright 12f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer. 13f11c7f63SJim Harris * * Redistributions in binary form must reproduce the above copyright 14f11c7f63SJim Harris * notice, this list of conditions and the following disclaimer in 15f11c7f63SJim Harris * the documentation and/or other materials provided with the 16f11c7f63SJim Harris * distribution. 17f11c7f63SJim Harris * 18f11c7f63SJim Harris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19f11c7f63SJim Harris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20f11c7f63SJim Harris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21f11c7f63SJim Harris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22f11c7f63SJim Harris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23f11c7f63SJim Harris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24f11c7f63SJim Harris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25f11c7f63SJim Harris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26f11c7f63SJim Harris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27f11c7f63SJim Harris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28f11c7f63SJim Harris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29f11c7f63SJim Harris */ 30f11c7f63SJim Harris 31f11c7f63SJim Harris #include <sys/cdefs.h> 32f11c7f63SJim Harris __FBSDID("$FreeBSD$"); 33f11c7f63SJim Harris 34f11c7f63SJim Harris #include <dev/isci/isci.h> 35f11c7f63SJim Harris 36f11c7f63SJim Harris #include <sys/sysctl.h> 37f11c7f63SJim Harris #include <sys/malloc.h> 38f11c7f63SJim Harris 39f11c7f63SJim Harris #include <cam/cam_periph.h> 40f11c7f63SJim Harris 4137274fc0SJim Harris #include <dev/led/led.h> 4237274fc0SJim Harris 43f11c7f63SJim Harris #include <dev/pci/pcireg.h> 44f11c7f63SJim Harris #include <dev/pci/pcivar.h> 45f11c7f63SJim Harris 46f11c7f63SJim Harris #include <dev/isci/scil/scic_logger.h> 47f11c7f63SJim Harris #include <dev/isci/scil/scic_library.h> 4837274fc0SJim Harris #include <dev/isci/scil/scic_sgpio.h> 49f11c7f63SJim Harris #include <dev/isci/scil/scic_user_callback.h> 50f11c7f63SJim Harris 51f11c7f63SJim Harris #include <dev/isci/scil/scif_controller.h> 52f11c7f63SJim Harris #include <dev/isci/scil/scif_library.h> 53f11c7f63SJim Harris #include <dev/isci/scil/scif_logger.h> 54f11c7f63SJim Harris #include <dev/isci/scil/scif_user_callback.h> 55f11c7f63SJim Harris 56f11c7f63SJim Harris MALLOC_DEFINE(M_ISCI, "isci", "isci driver memory allocations"); 57f11c7f63SJim Harris 58f11c7f63SJim Harris struct isci_softc *g_isci; 59f11c7f63SJim Harris uint32_t g_isci_debug_level = 0; 60f11c7f63SJim Harris 61f11c7f63SJim Harris static int isci_probe(device_t); 62f11c7f63SJim Harris static int isci_attach(device_t); 63f11c7f63SJim Harris static int isci_detach(device_t); 64f11c7f63SJim Harris 65f11c7f63SJim Harris int isci_initialize(struct isci_softc *isci); 66f11c7f63SJim Harris 67f11c7f63SJim Harris void isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 68f11c7f63SJim Harris int nseg, int error); 69f11c7f63SJim Harris 70f11c7f63SJim Harris static devclass_t isci_devclass; 71f11c7f63SJim Harris 72f11c7f63SJim Harris static device_method_t isci_pci_methods[] = { 73f11c7f63SJim Harris /* Device interface */ 74f11c7f63SJim Harris DEVMETHOD(device_probe, isci_probe), 75f11c7f63SJim Harris DEVMETHOD(device_attach, isci_attach), 76f11c7f63SJim Harris DEVMETHOD(device_detach, isci_detach), 77f11c7f63SJim Harris { 0, 0 } 78f11c7f63SJim Harris }; 79f11c7f63SJim Harris 80f11c7f63SJim Harris static driver_t isci_pci_driver = { 81f11c7f63SJim Harris "isci", 82f11c7f63SJim Harris isci_pci_methods, 83f11c7f63SJim Harris sizeof(struct isci_softc), 84f11c7f63SJim Harris }; 85f11c7f63SJim Harris 86f11c7f63SJim Harris DRIVER_MODULE(isci, pci, isci_pci_driver, isci_devclass, 0, 0); 87f11c7f63SJim Harris 88f11c7f63SJim Harris static struct _pcsid 89f11c7f63SJim Harris { 90f11c7f63SJim Harris u_int32_t type; 91f11c7f63SJim Harris const char *desc; 92f11c7f63SJim Harris } pci_ids[] = { 93f11c7f63SJim Harris { 0x1d608086, "Intel(R) C600 Series Chipset SAS Controller" }, 94f11c7f63SJim Harris { 0x1d618086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 95f11c7f63SJim Harris { 0x1d628086, "Intel(R) C600 Series Chipset SAS Controller" }, 96f11c7f63SJim Harris { 0x1d638086, "Intel(R) C600 Series Chipset SAS Controller" }, 97f11c7f63SJim Harris { 0x1d648086, "Intel(R) C600 Series Chipset SAS Controller" }, 98f11c7f63SJim Harris { 0x1d658086, "Intel(R) C600 Series Chipset SAS Controller" }, 99f11c7f63SJim Harris { 0x1d668086, "Intel(R) C600 Series Chipset SAS Controller" }, 100f11c7f63SJim Harris { 0x1d678086, "Intel(R) C600 Series Chipset SAS Controller" }, 101f11c7f63SJim Harris { 0x1d688086, "Intel(R) C600 Series Chipset SAS Controller" }, 102f11c7f63SJim Harris { 0x1d698086, "Intel(R) C600 Series Chipset SAS Controller" }, 103f11c7f63SJim Harris { 0x1d6a8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 104f11c7f63SJim Harris { 0x1d6b8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 105b4b494e1SSean Bruno { 0x1d6c8086, "Intel(R) C600 Series Chipset SAS Controller" }, 106b4b494e1SSean Bruno { 0x1d6d8086, "Intel(R) C600 Series Chipset SAS Controller" }, 107b4b494e1SSean Bruno { 0x1d6e8086, "Intel(R) C600 Series Chipset SAS Controller" }, 108b4b494e1SSean Bruno { 0x1d6f8086, "Intel(R) C600 Series Chipset SAS Controller (SATA mode)" }, 109f11c7f63SJim Harris { 0x00000000, NULL } 110f11c7f63SJim Harris }; 111f11c7f63SJim Harris 112f11c7f63SJim Harris static int 113f11c7f63SJim Harris isci_probe (device_t device) 114f11c7f63SJim Harris { 115f11c7f63SJim Harris u_int32_t type = pci_get_devid(device); 116f11c7f63SJim Harris struct _pcsid *ep = pci_ids; 117f11c7f63SJim Harris 118f11c7f63SJim Harris while (ep->type && ep->type != type) 119f11c7f63SJim Harris ++ep; 120f11c7f63SJim Harris 121f11c7f63SJim Harris if (ep->desc) 122f11c7f63SJim Harris { 123f11c7f63SJim Harris device_set_desc(device, ep->desc); 124b4b494e1SSean Bruno return (BUS_PROBE_DEFAULT); 125f11c7f63SJim Harris } 126f11c7f63SJim Harris else 127f11c7f63SJim Harris return (ENXIO); 128f11c7f63SJim Harris } 129f11c7f63SJim Harris 130f11c7f63SJim Harris static int 131f11c7f63SJim Harris isci_allocate_pci_memory(struct isci_softc *isci) 132f11c7f63SJim Harris { 133f11c7f63SJim Harris int i; 134f11c7f63SJim Harris 135f11c7f63SJim Harris for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 136f11c7f63SJim Harris { 137f11c7f63SJim Harris struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 138f11c7f63SJim Harris 139f11c7f63SJim Harris pci_bar->resource_id = PCIR_BAR(i*2); 140f11c7f63SJim Harris pci_bar->resource = bus_alloc_resource(isci->device, 141f11c7f63SJim Harris SYS_RES_MEMORY, &pci_bar->resource_id, 0, ~0, 1, 142f11c7f63SJim Harris RF_ACTIVE); 143f11c7f63SJim Harris 144f11c7f63SJim Harris if(pci_bar->resource == NULL) 145f11c7f63SJim Harris isci_log_message(0, "ISCI", 146f11c7f63SJim Harris "unable to allocate pci resource\n"); 147f11c7f63SJim Harris else { 148f11c7f63SJim Harris pci_bar->bus_tag = rman_get_bustag(pci_bar->resource); 149f11c7f63SJim Harris pci_bar->bus_handle = 150f11c7f63SJim Harris rman_get_bushandle(pci_bar->resource); 151f11c7f63SJim Harris } 152f11c7f63SJim Harris } 153f11c7f63SJim Harris 154f11c7f63SJim Harris return (0); 155f11c7f63SJim Harris } 156f11c7f63SJim Harris 157f11c7f63SJim Harris static int 158f11c7f63SJim Harris isci_attach(device_t device) 159f11c7f63SJim Harris { 160f11c7f63SJim Harris int error; 161f11c7f63SJim Harris struct isci_softc *isci = DEVICE2SOFTC(device); 162f11c7f63SJim Harris 163f11c7f63SJim Harris g_isci = isci; 164f11c7f63SJim Harris isci->device = device; 165f11c7f63SJim Harris 166f11c7f63SJim Harris isci_allocate_pci_memory(isci); 167f11c7f63SJim Harris 168f11c7f63SJim Harris error = isci_initialize(isci); 169f11c7f63SJim Harris 170f11c7f63SJim Harris if (error) 171f11c7f63SJim Harris { 172f11c7f63SJim Harris isci_detach(device); 173f11c7f63SJim Harris return (error); 174f11c7f63SJim Harris } 175f11c7f63SJim Harris 176f11c7f63SJim Harris isci_interrupt_setup(isci); 177f11c7f63SJim Harris isci_sysctl_initialize(isci); 178f11c7f63SJim Harris 179f11c7f63SJim Harris return (0); 180f11c7f63SJim Harris } 181f11c7f63SJim Harris 182f11c7f63SJim Harris static int 183f11c7f63SJim Harris isci_detach(device_t device) 184f11c7f63SJim Harris { 185f11c7f63SJim Harris struct isci_softc *isci = DEVICE2SOFTC(device); 18637274fc0SJim Harris int i, phy; 187f11c7f63SJim Harris 188f11c7f63SJim Harris for (i = 0; i < isci->controller_count; i++) { 189f11c7f63SJim Harris struct ISCI_CONTROLLER *controller = &isci->controllers[i]; 190f11c7f63SJim Harris SCI_STATUS status; 1913e0a9f1fSJim Harris void *unmap_buffer; 192f11c7f63SJim Harris 193f11c7f63SJim Harris if (controller->scif_controller_handle != NULL) { 194f11c7f63SJim Harris scic_controller_disable_interrupts( 195f11c7f63SJim Harris scif_controller_get_scic_handle(controller->scif_controller_handle)); 196f11c7f63SJim Harris 197f11c7f63SJim Harris mtx_lock(&controller->lock); 198f11c7f63SJim Harris status = scif_controller_stop(controller->scif_controller_handle, 0); 199f11c7f63SJim Harris mtx_unlock(&controller->lock); 200f11c7f63SJim Harris 201f11c7f63SJim Harris while (controller->is_started == TRUE) { 202f11c7f63SJim Harris /* Now poll for interrupts until the controller stop complete 203f11c7f63SJim Harris * callback is received. 204f11c7f63SJim Harris */ 205f11c7f63SJim Harris mtx_lock(&controller->lock); 206f11c7f63SJim Harris isci_interrupt_poll_handler(controller); 207f11c7f63SJim Harris mtx_unlock(&controller->lock); 208f11c7f63SJim Harris pause("isci", 1); 209f11c7f63SJim Harris } 210f11c7f63SJim Harris 211f11c7f63SJim Harris if(controller->sim != NULL) { 212f11c7f63SJim Harris mtx_lock(&controller->lock); 213f11c7f63SJim Harris xpt_free_path(controller->path); 214f11c7f63SJim Harris xpt_bus_deregister(cam_sim_path(controller->sim)); 215f11c7f63SJim Harris cam_sim_free(controller->sim, TRUE); 216f11c7f63SJim Harris mtx_unlock(&controller->lock); 217f11c7f63SJim Harris } 218f11c7f63SJim Harris } 219f11c7f63SJim Harris 220f11c7f63SJim Harris if (controller->timer_memory != NULL) 221f11c7f63SJim Harris free(controller->timer_memory, M_ISCI); 222f11c7f63SJim Harris 223f11c7f63SJim Harris if (controller->remote_device_memory != NULL) 224f11c7f63SJim Harris free(controller->remote_device_memory, M_ISCI); 2253e0a9f1fSJim Harris 226*500cbe13SJim Harris for (phy = 0; phy < SCI_MAX_PHYS; phy++) { 227*500cbe13SJim Harris if (controller->phys[phy].cdev_fault) 228*500cbe13SJim Harris led_destroy(controller->phys[phy].cdev_fault); 229*500cbe13SJim Harris 230*500cbe13SJim Harris if (controller->phys[phy].cdev_locate) 231*500cbe13SJim Harris led_destroy(controller->phys[phy].cdev_locate); 232*500cbe13SJim Harris } 23337274fc0SJim Harris 2343e0a9f1fSJim Harris while (1) { 2353e0a9f1fSJim Harris sci_pool_get(controller->unmap_buffer_pool, unmap_buffer); 2363e0a9f1fSJim Harris if (unmap_buffer == NULL) 2373e0a9f1fSJim Harris break; 2383e0a9f1fSJim Harris contigfree(unmap_buffer, PAGE_SIZE, M_ISCI); 2393e0a9f1fSJim Harris } 240f11c7f63SJim Harris } 241f11c7f63SJim Harris 242f11c7f63SJim Harris /* The SCIF controllers have been stopped, so we can now 243f11c7f63SJim Harris * free the SCI library memory. 244f11c7f63SJim Harris */ 245f11c7f63SJim Harris if (isci->sci_library_memory != NULL) 246f11c7f63SJim Harris free(isci->sci_library_memory, M_ISCI); 247f11c7f63SJim Harris 248f11c7f63SJim Harris for (i = 0; i < ISCI_NUM_PCI_BARS; i++) 249f11c7f63SJim Harris { 250f11c7f63SJim Harris struct ISCI_PCI_BAR *pci_bar = &isci->pci_bar[i]; 251f11c7f63SJim Harris 252f11c7f63SJim Harris if (pci_bar->resource != NULL) 253f11c7f63SJim Harris bus_release_resource(device, SYS_RES_MEMORY, 254f11c7f63SJim Harris pci_bar->resource_id, pci_bar->resource); 255f11c7f63SJim Harris } 256f11c7f63SJim Harris 257f11c7f63SJim Harris for (i = 0; i < isci->num_interrupts; i++) 258f11c7f63SJim Harris { 259f11c7f63SJim Harris struct ISCI_INTERRUPT_INFO *interrupt_info; 260f11c7f63SJim Harris 261f11c7f63SJim Harris interrupt_info = &isci->interrupt_info[i]; 262f11c7f63SJim Harris 263f11c7f63SJim Harris if(interrupt_info->tag != NULL) 264f11c7f63SJim Harris bus_teardown_intr(device, interrupt_info->res, 265f11c7f63SJim Harris interrupt_info->tag); 266f11c7f63SJim Harris 267f11c7f63SJim Harris if(interrupt_info->res != NULL) 268f11c7f63SJim Harris bus_release_resource(device, SYS_RES_IRQ, 269f11c7f63SJim Harris rman_get_rid(interrupt_info->res), 270f11c7f63SJim Harris interrupt_info->res); 271f11c7f63SJim Harris 272f11c7f63SJim Harris pci_release_msi(device); 273f11c7f63SJim Harris } 274f11c7f63SJim Harris 275f11c7f63SJim Harris return (0); 276f11c7f63SJim Harris } 277f11c7f63SJim Harris 278f11c7f63SJim Harris int 279f11c7f63SJim Harris isci_initialize(struct isci_softc *isci) 280f11c7f63SJim Harris { 281f11c7f63SJim Harris int error; 282f11c7f63SJim Harris uint32_t status = 0; 283f11c7f63SJim Harris uint32_t library_object_size; 284f11c7f63SJim Harris uint32_t verbosity_mask; 285f11c7f63SJim Harris uint32_t scic_log_object_mask; 286f11c7f63SJim Harris uint32_t scif_log_object_mask; 287f11c7f63SJim Harris uint8_t *header_buffer; 288f11c7f63SJim Harris 289f11c7f63SJim Harris library_object_size = scif_library_get_object_size(SCI_MAX_CONTROLLERS); 290f11c7f63SJim Harris 291f11c7f63SJim Harris isci->sci_library_memory = 292f11c7f63SJim Harris malloc(library_object_size, M_ISCI, M_NOWAIT | M_ZERO ); 293f11c7f63SJim Harris 294f11c7f63SJim Harris isci->sci_library_handle = scif_library_construct( 295f11c7f63SJim Harris isci->sci_library_memory, SCI_MAX_CONTROLLERS); 296f11c7f63SJim Harris 297f11c7f63SJim Harris sci_object_set_association( isci->sci_library_handle, (void *)isci); 298f11c7f63SJim Harris 299f11c7f63SJim Harris verbosity_mask = (1<<SCI_LOG_VERBOSITY_ERROR) | 300f11c7f63SJim Harris (1<<SCI_LOG_VERBOSITY_WARNING) | (1<<SCI_LOG_VERBOSITY_INFO) | 301f11c7f63SJim Harris (1<<SCI_LOG_VERBOSITY_TRACE); 302f11c7f63SJim Harris 303f11c7f63SJim Harris scic_log_object_mask = 0xFFFFFFFF; 304f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_COMPLETION_QUEUE; 305f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_SSP_IO_REQUEST; 306f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_STP_IO_REQUEST; 307f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_SMP_IO_REQUEST; 308f11c7f63SJim Harris scic_log_object_mask &= ~SCIC_LOG_OBJECT_CONTROLLER; 309f11c7f63SJim Harris 310f11c7f63SJim Harris scif_log_object_mask = 0xFFFFFFFF; 311f11c7f63SJim Harris scif_log_object_mask &= ~SCIF_LOG_OBJECT_CONTROLLER; 312f11c7f63SJim Harris scif_log_object_mask &= ~SCIF_LOG_OBJECT_IO_REQUEST; 313f11c7f63SJim Harris 314f11c7f63SJim Harris TUNABLE_INT_FETCH("hw.isci.debug_level", &g_isci_debug_level); 315f11c7f63SJim Harris 316f11c7f63SJim Harris sci_logger_enable(sci_object_get_logger(isci->sci_library_handle), 317f11c7f63SJim Harris scif_log_object_mask, verbosity_mask); 318f11c7f63SJim Harris 319f11c7f63SJim Harris sci_logger_enable(sci_object_get_logger( 320f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle)), 321f11c7f63SJim Harris scic_log_object_mask, verbosity_mask); 322f11c7f63SJim Harris 323f11c7f63SJim Harris header_buffer = (uint8_t *)&isci->pci_common_header; 324f11c7f63SJim Harris for (uint8_t i = 0; i < sizeof(isci->pci_common_header); i++) 325f11c7f63SJim Harris header_buffer[i] = pci_read_config(isci->device, i, 1); 326f11c7f63SJim Harris 327f11c7f63SJim Harris scic_library_set_pci_info( 328f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle), 329f11c7f63SJim Harris &isci->pci_common_header); 330f11c7f63SJim Harris 331f11c7f63SJim Harris isci->oem_parameters_found = FALSE; 332f11c7f63SJim Harris 333f11c7f63SJim Harris isci_get_oem_parameters(isci); 334f11c7f63SJim Harris 335f11c7f63SJim Harris /* trigger interrupt if 32 completions occur before timeout expires */ 336f11c7f63SJim Harris isci->coalesce_number = 32; 337f11c7f63SJim Harris 338f11c7f63SJim Harris /* trigger interrupt if 2 microseconds elapse after a completion occurs, 339f11c7f63SJim Harris * regardless if "coalesce_number" completions have occurred 340f11c7f63SJim Harris */ 341f11c7f63SJim Harris isci->coalesce_timeout = 2; 342f11c7f63SJim Harris 343f11c7f63SJim Harris isci->controller_count = scic_library_get_pci_device_controller_count( 344f11c7f63SJim Harris scif_library_get_scic_handle(isci->sci_library_handle)); 345f11c7f63SJim Harris 346f11c7f63SJim Harris for (int index = 0; index < isci->controller_count; index++) { 347f11c7f63SJim Harris struct ISCI_CONTROLLER *controller = &isci->controllers[index]; 348f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller_handle; 349f11c7f63SJim Harris 350f11c7f63SJim Harris controller->index = index; 351f11c7f63SJim Harris isci_controller_construct(controller, isci); 352f11c7f63SJim Harris 353f11c7f63SJim Harris scif_controller_handle = controller->scif_controller_handle; 354f11c7f63SJim Harris 355f11c7f63SJim Harris status = isci_controller_initialize(controller); 356f11c7f63SJim Harris 357f11c7f63SJim Harris if(status != SCI_SUCCESS) { 358f11c7f63SJim Harris isci_log_message(0, "ISCI", 359f11c7f63SJim Harris "isci_controller_initialize FAILED: %x\n", 360f11c7f63SJim Harris status); 361f11c7f63SJim Harris return (status); 362f11c7f63SJim Harris } 363f11c7f63SJim Harris 364f11c7f63SJim Harris error = isci_controller_allocate_memory(controller); 365f11c7f63SJim Harris 366f11c7f63SJim Harris if (error != 0) 367f11c7f63SJim Harris return (error); 368f11c7f63SJim Harris 369f11c7f63SJim Harris scif_controller_set_interrupt_coalescence( 370f11c7f63SJim Harris scif_controller_handle, isci->coalesce_number, 371f11c7f63SJim Harris isci->coalesce_timeout); 372f11c7f63SJim Harris } 373f11c7f63SJim Harris 374f11c7f63SJim Harris /* FreeBSD provides us a hook to ensure we get a chance to start 375f11c7f63SJim Harris * our controllers and complete initial domain discovery before 376f11c7f63SJim Harris * it searches for the boot device. Once we're done, we'll 377f11c7f63SJim Harris * disestablish the hook, signaling the kernel that is can proceed 378f11c7f63SJim Harris * with the boot process. 379f11c7f63SJim Harris */ 380f11c7f63SJim Harris isci->config_hook.ich_func = &isci_controller_start; 381f11c7f63SJim Harris isci->config_hook.ich_arg = &isci->controllers[0]; 382f11c7f63SJim Harris 383f11c7f63SJim Harris if (config_intrhook_establish(&isci->config_hook) != 0) 384f11c7f63SJim Harris isci_log_message(0, "ISCI", 385f11c7f63SJim Harris "config_intrhook_establish failed!\n"); 386f11c7f63SJim Harris 387f11c7f63SJim Harris return (status); 388f11c7f63SJim Harris } 389f11c7f63SJim Harris 390f11c7f63SJim Harris void 391f11c7f63SJim Harris isci_allocate_dma_buffer_callback(void *arg, bus_dma_segment_t *seg, 392f11c7f63SJim Harris int nseg, int error) 393f11c7f63SJim Harris { 394f11c7f63SJim Harris struct ISCI_MEMORY *memory = (struct ISCI_MEMORY *)arg; 395f11c7f63SJim Harris 396f11c7f63SJim Harris memory->error = error; 397f11c7f63SJim Harris 398f11c7f63SJim Harris if (nseg != 1 || error != 0) 399f11c7f63SJim Harris isci_log_message(0, "ISCI", 400f11c7f63SJim Harris "Failed to allocate physically contiguous memory!\n"); 401f11c7f63SJim Harris else 402f11c7f63SJim Harris memory->physical_address = seg->ds_addr; 403f11c7f63SJim Harris } 404f11c7f63SJim Harris 405f11c7f63SJim Harris int 406f11c7f63SJim Harris isci_allocate_dma_buffer(device_t device, struct ISCI_MEMORY *memory) 407f11c7f63SJim Harris { 408f11c7f63SJim Harris uint32_t status; 409f11c7f63SJim Harris 410f11c7f63SJim Harris status = bus_dma_tag_create(bus_get_dma_tag(device), 411f11c7f63SJim Harris 0x40 /* cacheline alignment */, 0x0, BUS_SPACE_MAXADDR, 412f11c7f63SJim Harris BUS_SPACE_MAXADDR, NULL, NULL, memory->size, 413f11c7f63SJim Harris 0x1 /* we want physically contiguous */, 414f11c7f63SJim Harris memory->size, 0, NULL, NULL, &memory->dma_tag); 415f11c7f63SJim Harris 416f11c7f63SJim Harris if(status == ENOMEM) { 417f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dma_tag_create failed\n"); 418f11c7f63SJim Harris return (status); 419f11c7f63SJim Harris } 420f11c7f63SJim Harris 421f11c7f63SJim Harris status = bus_dmamem_alloc(memory->dma_tag, 422f11c7f63SJim Harris (void **)&memory->virtual_address, BUS_DMA_ZERO, &memory->dma_map); 423f11c7f63SJim Harris 424f11c7f63SJim Harris if(status == ENOMEM) 425f11c7f63SJim Harris { 426f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dmamem_alloc failed\n"); 427f11c7f63SJim Harris return (status); 428f11c7f63SJim Harris } 429f11c7f63SJim Harris 430f11c7f63SJim Harris status = bus_dmamap_load(memory->dma_tag, memory->dma_map, 431f11c7f63SJim Harris (void *)memory->virtual_address, memory->size, 432f11c7f63SJim Harris isci_allocate_dma_buffer_callback, memory, 0); 433f11c7f63SJim Harris 434f11c7f63SJim Harris if(status == EINVAL) 435f11c7f63SJim Harris { 436f11c7f63SJim Harris isci_log_message(0, "ISCI", "bus_dmamap_load failed\n"); 437f11c7f63SJim Harris return (status); 438f11c7f63SJim Harris } 439f11c7f63SJim Harris 440f11c7f63SJim Harris return (0); 441f11c7f63SJim Harris } 442f11c7f63SJim Harris 443f11c7f63SJim Harris /** 444f11c7f63SJim Harris * @brief This callback method asks the user to associate the supplied 445f11c7f63SJim Harris * lock with an operating environment specific locking construct. 446f11c7f63SJim Harris * 447f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 448f11c7f63SJim Harris * which this lock is to be associated. 449f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock for which the 450f11c7f63SJim Harris * user should associate an operating environment specific 451f11c7f63SJim Harris * locking object. 452f11c7f63SJim Harris * 453f11c7f63SJim Harris * @see The SCI_LOCK_LEVEL enumeration for more information. 454f11c7f63SJim Harris * 455f11c7f63SJim Harris * @return none. 456f11c7f63SJim Harris */ 457f11c7f63SJim Harris void 458f11c7f63SJim Harris scif_cb_lock_associate(SCI_CONTROLLER_HANDLE_T controller, 459f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 460f11c7f63SJim Harris { 461f11c7f63SJim Harris 462f11c7f63SJim Harris } 463f11c7f63SJim Harris 464f11c7f63SJim Harris /** 465f11c7f63SJim Harris * @brief This callback method asks the user to de-associate the supplied 466f11c7f63SJim Harris * lock with an operating environment specific locking construct. 467f11c7f63SJim Harris * 468f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 469f11c7f63SJim Harris * which this lock is to be de-associated. 470f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock for which the 471f11c7f63SJim Harris * user should de-associate an operating environment specific 472f11c7f63SJim Harris * locking object. 473f11c7f63SJim Harris * 474f11c7f63SJim Harris * @see The SCI_LOCK_LEVEL enumeration for more information. 475f11c7f63SJim Harris * 476f11c7f63SJim Harris * @return none. 477f11c7f63SJim Harris */ 478f11c7f63SJim Harris void 479f11c7f63SJim Harris scif_cb_lock_disassociate(SCI_CONTROLLER_HANDLE_T controller, 480f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 481f11c7f63SJim Harris { 482f11c7f63SJim Harris 483f11c7f63SJim Harris } 484f11c7f63SJim Harris 485f11c7f63SJim Harris 486f11c7f63SJim Harris /** 487f11c7f63SJim Harris * @brief This callback method asks the user to acquire/get the lock. 488f11c7f63SJim Harris * This method should pend until the lock has been acquired. 489f11c7f63SJim Harris * 490f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 491f11c7f63SJim Harris * which this lock is associated. 492f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock to be acquired. 493f11c7f63SJim Harris * 494f11c7f63SJim Harris * @return none 495f11c7f63SJim Harris */ 496f11c7f63SJim Harris void 497f11c7f63SJim Harris scif_cb_lock_acquire(SCI_CONTROLLER_HANDLE_T controller, 498f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 499f11c7f63SJim Harris { 500f11c7f63SJim Harris 501f11c7f63SJim Harris } 502f11c7f63SJim Harris 503f11c7f63SJim Harris /** 504f11c7f63SJim Harris * @brief This callback method asks the user to release a lock. 505f11c7f63SJim Harris * 506f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller with 507f11c7f63SJim Harris * which this lock is associated. 508f11c7f63SJim Harris * @param[in] lock This parameter specifies the lock to be released. 509f11c7f63SJim Harris * 510f11c7f63SJim Harris * @return none 511f11c7f63SJim Harris */ 512f11c7f63SJim Harris void 513f11c7f63SJim Harris scif_cb_lock_release(SCI_CONTROLLER_HANDLE_T controller, 514f11c7f63SJim Harris SCI_LOCK_HANDLE_T lock) 515f11c7f63SJim Harris { 516f11c7f63SJim Harris } 517f11c7f63SJim Harris 518f11c7f63SJim Harris /** 519f11c7f63SJim Harris * @brief This callback method creates an OS specific deferred task 520f11c7f63SJim Harris * for internal usage. The handler to deferred task is stored by OS 521f11c7f63SJim Harris * driver. 522f11c7f63SJim Harris * 523f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller object 524f11c7f63SJim Harris * with which this callback is associated. 525f11c7f63SJim Harris * 526f11c7f63SJim Harris * @return none 527f11c7f63SJim Harris */ 528f11c7f63SJim Harris void 529f11c7f63SJim Harris scif_cb_start_internal_io_task_create(SCI_CONTROLLER_HANDLE_T controller) 530f11c7f63SJim Harris { 531f11c7f63SJim Harris 532f11c7f63SJim Harris } 533f11c7f63SJim Harris 534f11c7f63SJim Harris /** 535f11c7f63SJim Harris * @brief This callback method schedules a OS specific deferred task. 536f11c7f63SJim Harris * 537f11c7f63SJim Harris * @param[in] controller This parameter specifies the controller 538f11c7f63SJim Harris * object with which this callback is associated. 539f11c7f63SJim Harris * @param[in] start_internal_io_task_routine This parameter specifies the 540f11c7f63SJim Harris * sci start_internal_io routine. 541f11c7f63SJim Harris * @param[in] context This parameter specifies a handle to a parameter 542f11c7f63SJim Harris * that will be passed into the "start_internal_io_task_routine" 543f11c7f63SJim Harris * when it is invoked. 544f11c7f63SJim Harris * 545f11c7f63SJim Harris * @return none 546f11c7f63SJim Harris */ 547f11c7f63SJim Harris void 548f11c7f63SJim Harris scif_cb_start_internal_io_task_schedule(SCI_CONTROLLER_HANDLE_T scif_controller, 549f11c7f63SJim Harris FUNCPTR start_internal_io_task_routine, void *context) 550f11c7f63SJim Harris { 551f11c7f63SJim Harris /** @todo Use FreeBSD tasklet to defer this routine to a later time, 552f11c7f63SJim Harris * rather than calling the routine inline. 553f11c7f63SJim Harris */ 554f11c7f63SJim Harris SCI_START_INTERNAL_IO_ROUTINE sci_start_internal_io_routine = 555f11c7f63SJim Harris (SCI_START_INTERNAL_IO_ROUTINE)start_internal_io_task_routine; 556f11c7f63SJim Harris 557f11c7f63SJim Harris sci_start_internal_io_routine(context); 558f11c7f63SJim Harris } 559f11c7f63SJim Harris 560f11c7f63SJim Harris /** 561f11c7f63SJim Harris * @brief In this method the user must write to PCI memory via access. 562f11c7f63SJim Harris * This method is used for access to memory space and IO space. 563f11c7f63SJim Harris * 564f11c7f63SJim Harris * @param[in] controller The controller for which to read a DWORD. 565f11c7f63SJim Harris * @param[in] address This parameter depicts the address into 566f11c7f63SJim Harris * which to write. 567f11c7f63SJim Harris * @param[out] write_value This parameter depicts the value being written 568f11c7f63SJim Harris * into the PCI memory location. 569f11c7f63SJim Harris * 570f11c7f63SJim Harris * @todo These PCI memory access calls likely needs to be optimized into macros? 571f11c7f63SJim Harris */ 572f11c7f63SJim Harris void 573f11c7f63SJim Harris scic_cb_pci_write_dword(SCI_CONTROLLER_HANDLE_T scic_controller, 574f11c7f63SJim Harris void *address, uint32_t write_value) 575f11c7f63SJim Harris { 576f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller = 577f11c7f63SJim Harris (SCI_CONTROLLER_HANDLE_T) sci_object_get_association(scic_controller); 578f11c7f63SJim Harris struct ISCI_CONTROLLER *isci_controller = 579f11c7f63SJim Harris (struct ISCI_CONTROLLER *) sci_object_get_association(scif_controller); 580f11c7f63SJim Harris struct isci_softc *isci = isci_controller->isci; 581f11c7f63SJim Harris uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 582f11c7f63SJim Harris bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 583f11c7f63SJim Harris 584f11c7f63SJim Harris bus_space_write_4(isci->pci_bar[bar].bus_tag, 585f11c7f63SJim Harris isci->pci_bar[bar].bus_handle, offset, write_value); 586f11c7f63SJim Harris } 587f11c7f63SJim Harris 588f11c7f63SJim Harris /** 589f11c7f63SJim Harris * @brief In this method the user must read from PCI memory via access. 590f11c7f63SJim Harris * This method is used for access to memory space and IO space. 591f11c7f63SJim Harris * 592f11c7f63SJim Harris * @param[in] controller The controller for which to read a DWORD. 593f11c7f63SJim Harris * @param[in] address This parameter depicts the address from 594f11c7f63SJim Harris * which to read. 595f11c7f63SJim Harris * 596f11c7f63SJim Harris * @return The value being returned from the PCI memory location. 597f11c7f63SJim Harris * 598f11c7f63SJim Harris * @todo This PCI memory access calls likely need to be optimized into macro? 599f11c7f63SJim Harris */ 600f11c7f63SJim Harris uint32_t 601f11c7f63SJim Harris scic_cb_pci_read_dword(SCI_CONTROLLER_HANDLE_T scic_controller, void *address) 602f11c7f63SJim Harris { 603f11c7f63SJim Harris SCI_CONTROLLER_HANDLE_T scif_controller = 604f11c7f63SJim Harris (SCI_CONTROLLER_HANDLE_T)sci_object_get_association(scic_controller); 605f11c7f63SJim Harris struct ISCI_CONTROLLER *isci_controller = 606f11c7f63SJim Harris (struct ISCI_CONTROLLER *)sci_object_get_association(scif_controller); 607f11c7f63SJim Harris struct isci_softc *isci = isci_controller->isci; 608f11c7f63SJim Harris uint32_t bar = (uint32_t)(((POINTER_UINT)address & 0xF0000000) >> 28); 609f11c7f63SJim Harris bus_size_t offset = (bus_size_t)((POINTER_UINT)address & 0x0FFFFFFF); 610f11c7f63SJim Harris 611f11c7f63SJim Harris return (bus_space_read_4(isci->pci_bar[bar].bus_tag, 612f11c7f63SJim Harris isci->pci_bar[bar].bus_handle, offset)); 613f11c7f63SJim Harris } 614f11c7f63SJim Harris 615f11c7f63SJim Harris /** 616f11c7f63SJim Harris * @brief This method is called when the core requires the OS driver 617f11c7f63SJim Harris * to stall execution. This method is utilized during initialization 618f11c7f63SJim Harris * or non-performance paths only. 619f11c7f63SJim Harris * 620f11c7f63SJim Harris * @param[in] microseconds This parameter specifies the number of 621f11c7f63SJim Harris * microseconds for which to stall. The operating system driver 622f11c7f63SJim Harris * is allowed to round this value up where necessary. 623f11c7f63SJim Harris * 624f11c7f63SJim Harris * @return none. 625f11c7f63SJim Harris */ 626f11c7f63SJim Harris void 627f11c7f63SJim Harris scic_cb_stall_execution(uint32_t microseconds) 628f11c7f63SJim Harris { 629f11c7f63SJim Harris 630f11c7f63SJim Harris DELAY(microseconds); 631f11c7f63SJim Harris } 632f11c7f63SJim Harris 633f11c7f63SJim Harris /** 634f11c7f63SJim Harris * @brief In this method the user must return the base address register (BAR) 635f11c7f63SJim Harris * value for the supplied base address register number. 636f11c7f63SJim Harris * 637f11c7f63SJim Harris * @param[in] controller The controller for which to retrieve the bar number. 638f11c7f63SJim Harris * @param[in] bar_number This parameter depicts the BAR index/number to be read. 639f11c7f63SJim Harris * 640f11c7f63SJim Harris * @return Return a pointer value indicating the contents of the BAR. 641f11c7f63SJim Harris * @retval NULL indicates an invalid BAR index/number was specified. 642f11c7f63SJim Harris * @retval All other values indicate a valid VIRTUAL address from the BAR. 643f11c7f63SJim Harris */ 644f11c7f63SJim Harris void * 645f11c7f63SJim Harris scic_cb_pci_get_bar(SCI_CONTROLLER_HANDLE_T controller, 646f11c7f63SJim Harris uint16_t bar_number) 647f11c7f63SJim Harris { 648f11c7f63SJim Harris 649f11c7f63SJim Harris return ((void *)(POINTER_UINT)((uint32_t)bar_number << 28)); 650f11c7f63SJim Harris } 651f11c7f63SJim Harris 652f11c7f63SJim Harris /** 653f11c7f63SJim Harris * @brief This method informs the SCI Core user that a phy/link became 654f11c7f63SJim Harris * ready, but the phy is not allowed in the port. In some 655f11c7f63SJim Harris * situations the underlying hardware only allows for certain phy 656f11c7f63SJim Harris * to port mappings. If these mappings are violated, then this 657f11c7f63SJim Harris * API is invoked. 658f11c7f63SJim Harris * 659f11c7f63SJim Harris * @param[in] controller This parameter represents the controller which 660f11c7f63SJim Harris * contains the port. 661f11c7f63SJim Harris * @param[in] port This parameter specifies the SCI port object for which 662f11c7f63SJim Harris * the callback is being invoked. 663f11c7f63SJim Harris * @param[in] phy This parameter specifies the phy that came ready, but the 664f11c7f63SJim Harris * phy can't be a valid member of the port. 665f11c7f63SJim Harris * 666f11c7f63SJim Harris * @return none 667f11c7f63SJim Harris */ 668f11c7f63SJim Harris void 669f11c7f63SJim Harris scic_cb_port_invalid_link_up(SCI_CONTROLLER_HANDLE_T controller, 670f11c7f63SJim Harris SCI_PORT_HANDLE_T port, SCI_PHY_HANDLE_T phy) 671f11c7f63SJim Harris { 672f11c7f63SJim Harris 673f11c7f63SJim Harris } 674