1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2021 - 2023 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef _ICRDMA_OSDEP_H_ 36 #define _ICRDMA_OSDEP_H_ 37 38 #include <linux/dma-mapping.h> 39 #include <linux/etherdevice.h> 40 #include <linux/fs.h> 41 #include <linux/if_ether.h> 42 #include <linux/interrupt.h> 43 #include <linux/io.h> 44 #include <linux/jhash.h> 45 #include <linux/list.h> 46 #include <linux/log2.h> 47 #include <linux/mutex.h> 48 #include <linux/pci.h> 49 #include <linux/random.h> 50 #include <linux/spinlock.h> 51 #include <linux/timer.h> 52 #include <linux/workqueue.h> 53 #include <linux/atomic.h> 54 55 #include <sys/bus.h> 56 #include <machine/bus.h> 57 58 #define IOMEM 59 #define IRDMA_NTOHS(a) ntohs(a) 60 #define MAKEMASK(m, s) ((m) << (s)) 61 #define OS_TIMER timer_list 62 #define DECLARE_HASHTABLE(n, b) struct hlist_head (n)[1 << (b)] 63 #define HASH_MIN(v, b) (sizeof(v) <= 4 ? hash_32(v, b) : hash_long(v, b)) 64 #define HASH_FOR_EACH_RCU(n, b, o, m) for ((b) = 0, o = NULL; o == NULL && (b) < ARRAY_SIZE(n);\ 65 (b)++)\ 66 hlist_for_each_entry_rcu(o, &n[(b)], m) 67 #define HASH_FOR_EACH_POSSIBLE_RCU(n, o, m, k) \ 68 hlist_for_each_entry_rcu(o, &n[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(n)))],\ 69 m) 70 #define HASH_FOR_EACH_POSSIBLE(n, o, m, k) \ 71 hlist_for_each_entry(o, &n[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(n)))],\ 72 m) 73 #define HASH_ADD_RCU(h, n, k) \ 74 hlist_add_head_rcu(n, &h[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(h)))]) 75 #define HASH_DEL_RCU(tbl, node) hlist_del_rcu(node) 76 #define HASH_ADD(h, n, k) \ 77 hlist_add_head(n, &h[jhash(&k, sizeof(k), 0) >> (32 - ilog2(ARRAY_SIZE(h)))]) 78 #define HASH_DEL(tbl, node) hlist_del(node) 79 80 #define WQ_UNBOUND_MAX_ACTIVE max_t(int, 512, num_possible_cpus() * 4) 81 #define if_addr_rlock(x) 82 #define if_addr_runlock(x) 83 84 /* constants */ 85 #define STATS_TIMER_DELAY 60000 86 87 /* a couple of linux size defines */ 88 #define SZ_128 128 89 #define SPEED_1000 1000 90 #define SPEED_10000 10000 91 #define SPEED_20000 20000 92 #define SPEED_25000 25000 93 #define SPEED_40000 40000 94 #define SPEED_100000 100000 95 96 #define irdma_mb() mb() 97 #define irdma_wmb() wmb() 98 #define irdma_get_virt_to_phy vtophys 99 100 #define __aligned_u64 uint64_t __aligned(8) 101 102 #define VLAN_PRIO_SHIFT 13 103 104 /* 105 * debug definition section 106 */ 107 #define irdma_print(S, ...) printf("%s:%d "S, __FUNCTION__, __LINE__, ##__VA_ARGS__) 108 #define irdma_debug_buf(dev, mask, desc, buf, size) \ 109 do { \ 110 u32 i; \ 111 if (!((mask) & (dev)->debug_mask)) { \ 112 break; \ 113 } \ 114 irdma_debug(dev, mask, "%s\n", desc); \ 115 irdma_debug(dev, mask, "starting address virt=%p phy=%lxh\n", buf, irdma_get_virt_to_phy(buf)); \ 116 for (i = 0; i < size ; i += 8) \ 117 irdma_debug(dev, mask, "index %03d val: %016lx\n", i, ((unsigned long *)(buf))[i / 8]); \ 118 } while(0) 119 120 #define irdma_debug(h, m, s, ...) \ 121 do { \ 122 if (!(h)) { \ 123 if ((m) == IRDMA_DEBUG_INIT) \ 124 printf("irdma INIT " s, ##__VA_ARGS__); \ 125 } else if (((m) & (h)->debug_mask)) { \ 126 printf("irdma " s, ##__VA_ARGS__); \ 127 } \ 128 } while (0) 129 #define irdma_dev_err(ibdev, fmt, ...) \ 130 pr_err("%s:%s:%d ERR "fmt, (ibdev)->name, __func__, __LINE__, ##__VA_ARGS__) 131 #define irdma_dev_warn(ibdev, fmt, ...) \ 132 pr_warn("%s:%s:%d WARN "fmt, (ibdev)->name, __func__, __LINE__, ##__VA_ARGS__) 133 #define irdma_dev_info(a, b, ...) printf(b, ##__VA_ARGS__) 134 #define irdma_pr_warn printf 135 136 #define IRDMA_PRINT_IP6(ip6) \ 137 ((u32*)ip6)[0], ((u32*)ip6)[1], ((u32*)ip6)[2], ((u32*)ip6)[3] 138 139 /* 140 * debug definition end 141 */ 142 143 typedef __be16 BE16; 144 typedef __be32 BE32; 145 typedef uintptr_t irdma_uintptr; 146 147 struct irdma_hw; 148 struct irdma_pci_f; 149 struct irdma_sc_dev; 150 struct irdma_sc_qp; 151 struct irdma_sc_vsi; 152 153 struct irdma_task_arg { 154 struct irdma_device *iwdev; 155 struct ice_rdma_peer *peer; 156 atomic_t open_ongoing; 157 atomic_t close_ongoing; 158 }; 159 160 struct irdma_dev_ctx { 161 bus_space_tag_t mem_bus_space_tag; 162 bus_space_handle_t mem_bus_space_handle; 163 bus_size_t mem_bus_space_size; 164 void *dev; 165 struct irdma_task_arg task_arg; 166 atomic_t event_rfcnt; 167 }; 168 169 #define irdma_pr_info(fmt, args ...) printf("%s: WARN "fmt, __func__, ## args) 170 #define irdma_pr_err(fmt, args ...) printf("%s: ERR "fmt, __func__, ## args) 171 #define irdma_memcpy(a, b, c) memcpy((a), (b), (c)) 172 #define irdma_memset(a, b, c) memset((a), (b), (c)) 173 #define irdma_usec_delay(x) DELAY(x) 174 #define mdelay(x) DELAY((x) * 1000) 175 176 #define rt_tos2priority(tos) (tos >> 5) 177 #define ah_attr_to_dmac(attr) ((attr).dmac) 178 #define irdma_del_timer_compat(tt) del_timer((tt)) 179 #define IRDMA_TAILQ_FOREACH CK_STAILQ_FOREACH 180 #define IRDMA_TAILQ_FOREACH_SAFE CK_STAILQ_FOREACH_SAFE 181 #define between(a, b, c) (bool)(c-a >= b-a) 182 183 #define rd32(a, reg) irdma_rd32((a)->dev_context, (reg)) 184 #define wr32(a, reg, value) irdma_wr32((a)->dev_context, (reg), (value)) 185 186 #define rd64(a, reg) irdma_rd64((a)->dev_context, (reg)) 187 #define wr64(a, reg, value) irdma_wr64((a)->dev_context, (reg), (value)) 188 #define db_wr32(value, a) writel((value), (a)) 189 190 void *hw_to_dev(struct irdma_hw *hw); 191 192 struct irdma_dma_mem { 193 void *va; 194 u64 pa; 195 bus_dma_tag_t tag; 196 bus_dmamap_t map; 197 bus_dma_segment_t seg; 198 bus_size_t size; 199 int nseg; 200 int flags; 201 }; 202 203 struct irdma_virt_mem { 204 void *va; 205 u32 size; 206 }; 207 208 struct irdma_dma_info { 209 dma_addr_t *dmaaddrs; 210 }; 211 212 struct list_head; 213 u32 irdma_rd32(struct irdma_dev_ctx *dev_ctx, u32 reg); 214 void irdma_wr32(struct irdma_dev_ctx *dev_ctx, u32 reg, u32 value); 215 u64 irdma_rd64(struct irdma_dev_ctx *dev_ctx, u32 reg); 216 void irdma_wr64(struct irdma_dev_ctx *dev_ctx, u32 reg, u64 value); 217 218 void irdma_term_modify_qp(struct irdma_sc_qp *qp, u8 next_state, u8 term, u8 term_len); 219 void irdma_terminate_done(struct irdma_sc_qp *qp, int timeout_occurred); 220 void irdma_terminate_start_timer(struct irdma_sc_qp *qp); 221 void irdma_terminate_del_timer(struct irdma_sc_qp *qp); 222 223 void irdma_hw_stats_start_timer(struct irdma_sc_vsi *vsi); 224 void irdma_hw_stats_stop_timer(struct irdma_sc_vsi *vsi); 225 void irdma_send_ieq_ack(struct irdma_sc_qp *qp); 226 227 u8* irdma_get_hw_addr(void *par); 228 229 void irdma_unmap_vm_page_list(struct irdma_hw *hw, u64 *pg_arr, u32 pg_cnt); 230 int irdma_map_vm_page_list(struct irdma_hw *hw, void *va, 231 u64 *pg_arr, u32 pg_cnt); 232 233 struct ib_device *to_ibdev(struct irdma_sc_dev *dev); 234 235 #endif /* _ICRDMA_OSDEP_H_ */ 236