1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2022 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #include "irdma_main.h" 36 37 /** 38 * irdma_query_device - get device attributes 39 * @ibdev: device pointer from stack 40 * @props: returning device attributes 41 * @udata: user data 42 */ 43 static int 44 irdma_query_device(struct ib_device *ibdev, 45 struct ib_device_attr *props, 46 struct ib_udata *udata) 47 { 48 struct irdma_device *iwdev = to_iwdev(ibdev); 49 struct irdma_pci_f *rf = iwdev->rf; 50 struct pci_dev *pcidev = iwdev->rf->pcidev; 51 struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs; 52 53 if (udata->inlen || udata->outlen) 54 return -EINVAL; 55 56 memset(props, 0, sizeof(*props)); 57 addrconf_addr_eui48((u8 *)&props->sys_image_guid, 58 if_getlladdr(iwdev->netdev)); 59 props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 | 60 irdma_fw_minor_ver(&rf->sc_dev); 61 props->device_cap_flags = IB_DEVICE_MEM_WINDOW | 62 IB_DEVICE_MEM_MGT_EXTENSIONS; 63 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 64 props->vendor_id = pcidev->vendor; 65 props->vendor_part_id = pcidev->device; 66 props->hw_ver = pcidev->revision; 67 props->page_size_cap = hw_attrs->page_size_cap; 68 props->max_mr_size = hw_attrs->max_mr_size; 69 props->max_qp = rf->max_qp - rf->used_qps; 70 props->max_qp_wr = hw_attrs->max_qp_wr; 71 set_max_sge(props, rf); 72 props->max_cq = rf->max_cq - rf->used_cqs; 73 props->max_cqe = rf->max_cqe - 1; 74 props->max_mr = rf->max_mr - rf->used_mrs; 75 props->max_mw = props->max_mr; 76 props->max_pd = rf->max_pd - rf->used_pds; 77 props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges; 78 props->max_qp_rd_atom = hw_attrs->max_hw_ird; 79 props->max_qp_init_rd_atom = hw_attrs->max_hw_ord; 80 if (rdma_protocol_roce(ibdev, 1)) { 81 props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN; 82 props->max_pkeys = IRDMA_PKEY_TBL_SZ; 83 props->max_ah = rf->max_ah; 84 if (hw_attrs->uk_attrs.hw_rev == IRDMA_GEN_2) { 85 props->max_mcast_grp = rf->max_mcg; 86 props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX; 87 props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX; 88 } 89 } 90 props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR; 91 if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2) 92 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 93 94 return 0; 95 } 96 97 static int 98 irdma_mmap_legacy(struct irdma_ucontext *ucontext, 99 struct vm_area_struct *vma) 100 { 101 u64 pfn; 102 103 if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE) 104 return -EINVAL; 105 106 vma->vm_private_data = ucontext; 107 pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] + 108 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT; 109 110 #if __FreeBSD_version >= 1400026 111 return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE, 112 pgprot_noncached(vma->vm_page_prot), NULL); 113 #else 114 return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE, 115 pgprot_noncached(vma->vm_page_prot)); 116 #endif 117 } 118 119 #if __FreeBSD_version >= 1400026 120 static void 121 irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry) 122 { 123 struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry); 124 125 kfree(entry); 126 } 127 128 struct rdma_user_mmap_entry * 129 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset, 130 enum irdma_mmap_flag mmap_flag, u64 *mmap_offset) 131 { 132 struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL); 133 int ret; 134 135 if (!entry) 136 return NULL; 137 138 entry->bar_offset = bar_offset; 139 entry->mmap_flag = mmap_flag; 140 141 ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext, 142 &entry->rdma_entry, PAGE_SIZE); 143 if (ret) { 144 kfree(entry); 145 return NULL; 146 } 147 *mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry); 148 149 return &entry->rdma_entry; 150 } 151 152 #else 153 static inline bool 154 find_key_in_mmap_tbl(struct irdma_ucontext *ucontext, u64 key) 155 { 156 struct irdma_user_mmap_entry *entry; 157 158 HASH_FOR_EACH_POSSIBLE(ucontext->mmap_hash_tbl, entry, hlist, key) { 159 if (entry->pgoff_key == key) 160 return true; 161 } 162 163 return false; 164 } 165 166 struct irdma_user_mmap_entry * 167 irdma_user_mmap_entry_add_hash(struct irdma_ucontext *ucontext, u64 bar_offset, 168 enum irdma_mmap_flag mmap_flag, u64 *mmap_offset) 169 { 170 struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL); 171 unsigned long flags; 172 int retry_cnt = 0; 173 174 if (!entry) 175 return NULL; 176 177 entry->bar_offset = bar_offset; 178 entry->mmap_flag = mmap_flag; 179 entry->ucontext = ucontext; 180 do { 181 get_random_bytes(&entry->pgoff_key, sizeof(entry->pgoff_key)); 182 183 /* The key is a page offset */ 184 entry->pgoff_key >>= PAGE_SHIFT; 185 186 /* In the event of a collision in the hash table, retry a new key */ 187 spin_lock_irqsave(&ucontext->mmap_tbl_lock, flags); 188 if (!find_key_in_mmap_tbl(ucontext, entry->pgoff_key)) { 189 HASH_ADD(ucontext->mmap_hash_tbl, &entry->hlist, entry->pgoff_key); 190 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 191 goto hash_add_done; 192 } 193 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 194 } while (retry_cnt++ < 10); 195 196 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 197 "mmap table add failed: Cannot find a unique key\n"); 198 kfree(entry); 199 return NULL; 200 201 hash_add_done: 202 /* libc mmap uses a byte offset */ 203 *mmap_offset = entry->pgoff_key << PAGE_SHIFT; 204 205 return entry; 206 } 207 208 static struct irdma_user_mmap_entry * 209 irdma_find_user_mmap_entry(struct irdma_ucontext *ucontext, 210 struct vm_area_struct *vma) 211 { 212 struct irdma_user_mmap_entry *entry; 213 unsigned long flags; 214 215 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 216 return NULL; 217 218 spin_lock_irqsave(&ucontext->mmap_tbl_lock, flags); 219 HASH_FOR_EACH_POSSIBLE(ucontext->mmap_hash_tbl, entry, hlist, vma->vm_pgoff) { 220 if (entry->pgoff_key == vma->vm_pgoff) { 221 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 222 return entry; 223 } 224 } 225 226 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 227 228 return NULL; 229 } 230 231 void 232 irdma_user_mmap_entry_del_hash(struct irdma_user_mmap_entry *entry) 233 { 234 struct irdma_ucontext *ucontext; 235 unsigned long flags; 236 237 if (!entry) 238 return; 239 240 ucontext = entry->ucontext; 241 242 spin_lock_irqsave(&ucontext->mmap_tbl_lock, flags); 243 HASH_DEL(ucontext->mmap_hash_tbl, &entry->hlist); 244 spin_unlock_irqrestore(&ucontext->mmap_tbl_lock, flags); 245 246 kfree(entry); 247 } 248 249 #endif 250 /** 251 * irdma_mmap - user memory map 252 * @context: context created during alloc 253 * @vma: kernel info for user memory map 254 */ 255 static int 256 irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 257 { 258 #if __FreeBSD_version >= 1400026 259 struct rdma_user_mmap_entry *rdma_entry; 260 #endif 261 struct irdma_user_mmap_entry *entry; 262 struct irdma_ucontext *ucontext; 263 u64 pfn; 264 int ret; 265 266 ucontext = to_ucontext(context); 267 268 /* Legacy support for libi40iw with hard-coded mmap key */ 269 if (ucontext->legacy_mode) 270 return irdma_mmap_legacy(ucontext, vma); 271 272 #if __FreeBSD_version >= 1400026 273 rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma); 274 if (!rdma_entry) { 275 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 276 "pgoff[0x%lx] does not have valid entry\n", 277 vma->vm_pgoff); 278 return -EINVAL; 279 } 280 281 entry = to_irdma_mmap_entry(rdma_entry); 282 #else 283 entry = irdma_find_user_mmap_entry(ucontext, vma); 284 if (!entry) { 285 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 286 "pgoff[0x%lx] does not have valid entry\n", 287 vma->vm_pgoff); 288 return -EINVAL; 289 } 290 #endif 291 irdma_debug(&ucontext->iwdev->rf->sc_dev, 292 IRDMA_DEBUG_VERBS, "bar_offset [0x%lx] mmap_flag [%d]\n", 293 entry->bar_offset, entry->mmap_flag); 294 295 pfn = (entry->bar_offset + 296 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT; 297 298 switch (entry->mmap_flag) { 299 case IRDMA_MMAP_IO_NC: 300 #if __FreeBSD_version >= 1400026 301 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 302 pgprot_noncached(vma->vm_page_prot), 303 rdma_entry); 304 #else 305 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 306 pgprot_noncached(vma->vm_page_prot)); 307 #endif 308 break; 309 case IRDMA_MMAP_IO_WC: 310 #if __FreeBSD_version >= 1400026 311 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 312 pgprot_writecombine(vma->vm_page_prot), 313 rdma_entry); 314 #else 315 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE, 316 pgprot_writecombine(vma->vm_page_prot)); 317 #endif 318 break; 319 default: 320 ret = -EINVAL; 321 } 322 323 if (ret) 324 irdma_debug(&ucontext->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 325 "bar_offset [0x%lx] mmap_flag[%d] err[%d]\n", 326 entry->bar_offset, entry->mmap_flag, ret); 327 #if __FreeBSD_version >= 1400026 328 rdma_user_mmap_entry_put(rdma_entry); 329 #endif 330 331 return ret; 332 } 333 334 /** 335 * irdma_alloc_push_page - allocate a push page for qp 336 * @iwqp: qp pointer 337 */ 338 static void 339 irdma_alloc_push_page(struct irdma_qp *iwqp) 340 { 341 struct irdma_cqp_request *cqp_request; 342 struct cqp_cmds_info *cqp_info; 343 struct irdma_device *iwdev = iwqp->iwdev; 344 struct irdma_sc_qp *qp = &iwqp->sc_qp; 345 int status; 346 347 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 348 if (!cqp_request) 349 return; 350 351 cqp_info = &cqp_request->info; 352 cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE; 353 cqp_info->post_sq = 1; 354 cqp_info->in.u.manage_push_page.info.push_idx = 0; 355 cqp_info->in.u.manage_push_page.info.qs_handle = 356 qp->vsi->qos[qp->user_pri].qs_handle; 357 cqp_info->in.u.manage_push_page.info.free_page = 0; 358 cqp_info->in.u.manage_push_page.info.push_page_type = 0; 359 cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp; 360 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request; 361 362 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 363 if (!status && cqp_request->compl_info.op_ret_val < 364 iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) { 365 qp->push_idx = cqp_request->compl_info.op_ret_val; 366 qp->push_offset = 0; 367 } 368 369 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 370 } 371 372 /** 373 * irdma_get_pbl - Retrieve pbl from a list given a virtual 374 * address 375 * @va: user virtual address 376 * @pbl_list: pbl list to search in (QP's or CQ's) 377 */ 378 struct irdma_pbl * 379 irdma_get_pbl(unsigned long va, 380 struct list_head *pbl_list) 381 { 382 struct irdma_pbl *iwpbl; 383 384 list_for_each_entry(iwpbl, pbl_list, list) { 385 if (iwpbl->user_base == va) { 386 list_del(&iwpbl->list); 387 iwpbl->on_list = false; 388 return iwpbl; 389 } 390 } 391 392 return NULL; 393 } 394 395 /** 396 * irdma_clean_cqes - clean cq entries for qp 397 * @iwqp: qp ptr (user or kernel) 398 * @iwcq: cq ptr 399 */ 400 void 401 irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq) 402 { 403 struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk; 404 unsigned long flags; 405 406 spin_lock_irqsave(&iwcq->lock, flags); 407 irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq); 408 spin_unlock_irqrestore(&iwcq->lock, flags); 409 } 410 411 static u64 irdma_compute_push_wqe_offset(struct irdma_device *iwdev, u32 page_idx){ 412 u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET]; 413 414 if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_2) { 415 /* skip over db page */ 416 bar_off += IRDMA_HW_PAGE_SIZE; 417 /* skip over reserved space */ 418 bar_off += IRDMA_PF_BAR_RSVD; 419 } 420 421 /* push wqe page */ 422 bar_off += (u64)page_idx * IRDMA_HW_PAGE_SIZE; 423 424 return bar_off; 425 } 426 427 void 428 irdma_remove_push_mmap_entries(struct irdma_qp *iwqp) 429 { 430 if (iwqp->push_db_mmap_entry) { 431 #if __FreeBSD_version >= 1400026 432 rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry); 433 #else 434 irdma_user_mmap_entry_del_hash(iwqp->push_db_mmap_entry); 435 #endif 436 iwqp->push_db_mmap_entry = NULL; 437 } 438 if (iwqp->push_wqe_mmap_entry) { 439 #if __FreeBSD_version >= 1400026 440 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry); 441 #else 442 irdma_user_mmap_entry_del_hash(iwqp->push_wqe_mmap_entry); 443 #endif 444 iwqp->push_wqe_mmap_entry = NULL; 445 } 446 } 447 448 static int 449 irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext, 450 struct irdma_qp *iwqp, 451 u64 *push_wqe_mmap_key, 452 u64 *push_db_mmap_key) 453 { 454 struct irdma_device *iwdev = ucontext->iwdev; 455 u64 bar_off; 456 457 WARN_ON_ONCE(iwdev->rf->sc_dev.hw_attrs.uk_attrs.hw_rev < IRDMA_GEN_2); 458 459 bar_off = irdma_compute_push_wqe_offset(iwdev, iwqp->sc_qp.push_idx); 460 461 #if __FreeBSD_version >= 1400026 462 iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext, 463 bar_off, IRDMA_MMAP_IO_WC, 464 push_wqe_mmap_key); 465 #else 466 iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_add_hash(ucontext, bar_off, 467 IRDMA_MMAP_IO_WC, 468 push_wqe_mmap_key); 469 #endif 470 if (!iwqp->push_wqe_mmap_entry) 471 return -ENOMEM; 472 473 /* push doorbell page */ 474 bar_off += IRDMA_HW_PAGE_SIZE; 475 #if __FreeBSD_version >= 1400026 476 iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext, 477 bar_off, IRDMA_MMAP_IO_NC, 478 push_db_mmap_key); 479 #else 480 481 iwqp->push_db_mmap_entry = irdma_user_mmap_entry_add_hash(ucontext, bar_off, 482 IRDMA_MMAP_IO_NC, 483 push_db_mmap_key); 484 #endif 485 if (!iwqp->push_db_mmap_entry) { 486 #if __FreeBSD_version >= 1400026 487 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry); 488 #else 489 irdma_user_mmap_entry_del_hash(iwqp->push_wqe_mmap_entry); 490 #endif 491 return -ENOMEM; 492 } 493 494 return 0; 495 } 496 497 /** 498 * irdma_setup_virt_qp - setup for allocation of virtual qp 499 * @iwdev: irdma device 500 * @iwqp: qp ptr 501 * @init_info: initialize info to return 502 */ 503 void 504 irdma_setup_virt_qp(struct irdma_device *iwdev, 505 struct irdma_qp *iwqp, 506 struct irdma_qp_init_info *init_info) 507 { 508 struct irdma_pbl *iwpbl = iwqp->iwpbl; 509 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr; 510 511 iwqp->page = qpmr->sq_page; 512 init_info->shadow_area_pa = qpmr->shadow; 513 if (iwpbl->pbl_allocated) { 514 init_info->virtual_map = true; 515 init_info->sq_pa = qpmr->sq_pbl.idx; 516 init_info->rq_pa = qpmr->rq_pbl.idx; 517 } else { 518 init_info->sq_pa = qpmr->sq_pbl.addr; 519 init_info->rq_pa = qpmr->rq_pbl.addr; 520 } 521 } 522 523 /** 524 * irdma_setup_umode_qp - setup sq and rq size in user mode qp 525 * @udata: user data 526 * @iwdev: iwarp device 527 * @iwqp: qp ptr (user or kernel) 528 * @info: initialize info to return 529 * @init_attr: Initial QP create attributes 530 */ 531 int 532 irdma_setup_umode_qp(struct ib_udata *udata, 533 struct irdma_device *iwdev, 534 struct irdma_qp *iwqp, 535 struct irdma_qp_init_info *info, 536 struct ib_qp_init_attr *init_attr) 537 { 538 #if __FreeBSD_version >= 1400026 539 struct irdma_ucontext *ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 540 #else 541 struct irdma_ucontext *ucontext = to_ucontext(iwqp->iwpd->ibpd.uobject->context); 542 #endif 543 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info; 544 struct irdma_create_qp_req req = {0}; 545 unsigned long flags; 546 int ret; 547 548 ret = ib_copy_from_udata(&req, udata, 549 min(sizeof(req), udata->inlen)); 550 if (ret) { 551 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 552 "ib_copy_from_data fail\n"); 553 return ret; 554 } 555 556 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx; 557 iwqp->user_mode = 1; 558 if (req.user_wqe_bufs) { 559 info->qp_uk_init_info.legacy_mode = ucontext->legacy_mode; 560 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 561 iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs, 562 &ucontext->qp_reg_mem_list); 563 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 564 565 if (!iwqp->iwpbl) { 566 ret = -ENODATA; 567 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 568 "no pbl info\n"); 569 return ret; 570 } 571 } 572 573 if (!ucontext->use_raw_attrs) { 574 /** 575 * Maintain backward compat with older ABI which passes sq and 576 * rq depth in quanta in cap.max_send_wr and cap.max_recv_wr. 577 * There is no way to compute the correct value of 578 * iwqp->max_send_wr/max_recv_wr in the kernel. 579 */ 580 iwqp->max_send_wr = init_attr->cap.max_send_wr; 581 iwqp->max_recv_wr = init_attr->cap.max_recv_wr; 582 ukinfo->sq_size = init_attr->cap.max_send_wr; 583 ukinfo->rq_size = init_attr->cap.max_recv_wr; 584 irdma_uk_calc_shift_wq(ukinfo, &ukinfo->sq_shift, &ukinfo->rq_shift); 585 } else { 586 ret = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth, 587 &ukinfo->sq_shift); 588 if (ret) 589 return ret; 590 591 ret = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth, 592 &ukinfo->rq_shift); 593 if (ret) 594 return ret; 595 596 iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift; 597 iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift; 598 ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift; 599 ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift; 600 } 601 irdma_setup_virt_qp(iwdev, iwqp, info); 602 603 return 0; 604 } 605 606 /** 607 * irdma_setup_kmode_qp - setup initialization for kernel mode qp 608 * @iwdev: iwarp device 609 * @iwqp: qp ptr (user or kernel) 610 * @info: initialize info to return 611 * @init_attr: Initial QP create attributes 612 */ 613 int 614 irdma_setup_kmode_qp(struct irdma_device *iwdev, 615 struct irdma_qp *iwqp, 616 struct irdma_qp_init_info *info, 617 struct ib_qp_init_attr *init_attr) 618 { 619 struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem; 620 u32 size; 621 int status; 622 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info; 623 624 status = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth, 625 &ukinfo->sq_shift); 626 if (status) 627 return status; 628 629 status = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth, 630 &ukinfo->rq_shift); 631 if (status) 632 return status; 633 634 iwqp->kqp.sq_wrid_mem = 635 kcalloc(ukinfo->sq_depth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL); 636 if (!iwqp->kqp.sq_wrid_mem) 637 return -ENOMEM; 638 639 iwqp->kqp.rq_wrid_mem = 640 kcalloc(ukinfo->rq_depth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL); 641 if (!iwqp->kqp.rq_wrid_mem) { 642 kfree(iwqp->kqp.sq_wrid_mem); 643 iwqp->kqp.sq_wrid_mem = NULL; 644 return -ENOMEM; 645 } 646 647 iwqp->kqp.sig_trk_mem = kcalloc(ukinfo->sq_depth, sizeof(u32), GFP_KERNEL); 648 memset(iwqp->kqp.sig_trk_mem, 0, ukinfo->sq_depth * sizeof(u32)); 649 if (!iwqp->kqp.sig_trk_mem) { 650 kfree(iwqp->kqp.sq_wrid_mem); 651 iwqp->kqp.sq_wrid_mem = NULL; 652 kfree(iwqp->kqp.rq_wrid_mem); 653 iwqp->kqp.rq_wrid_mem = NULL; 654 return -ENOMEM; 655 } 656 ukinfo->sq_sigwrtrk_array = (void *)iwqp->kqp.sig_trk_mem; 657 ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem; 658 ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem; 659 660 size = (ukinfo->sq_depth + ukinfo->rq_depth) * IRDMA_QP_WQE_MIN_SIZE; 661 size += (IRDMA_SHADOW_AREA_SIZE << 3); 662 663 mem->size = size; 664 mem->va = irdma_allocate_dma_mem(&iwdev->rf->hw, mem, mem->size, 665 256); 666 if (!mem->va) { 667 kfree(iwqp->kqp.sq_wrid_mem); 668 iwqp->kqp.sq_wrid_mem = NULL; 669 kfree(iwqp->kqp.rq_wrid_mem); 670 iwqp->kqp.rq_wrid_mem = NULL; 671 return -ENOMEM; 672 } 673 674 ukinfo->sq = mem->va; 675 info->sq_pa = mem->pa; 676 ukinfo->rq = &ukinfo->sq[ukinfo->sq_depth]; 677 info->rq_pa = info->sq_pa + (ukinfo->sq_depth * IRDMA_QP_WQE_MIN_SIZE); 678 ukinfo->shadow_area = ukinfo->rq[ukinfo->rq_depth].elem; 679 info->shadow_area_pa = info->rq_pa + (ukinfo->rq_depth * IRDMA_QP_WQE_MIN_SIZE); 680 ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift; 681 ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift; 682 ukinfo->qp_id = iwqp->ibqp.qp_num; 683 684 iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift; 685 iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift; 686 init_attr->cap.max_send_wr = iwqp->max_send_wr; 687 init_attr->cap.max_recv_wr = iwqp->max_recv_wr; 688 689 return 0; 690 } 691 692 int 693 irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp) 694 { 695 struct irdma_pci_f *rf = iwqp->iwdev->rf; 696 struct irdma_cqp_request *cqp_request; 697 struct cqp_cmds_info *cqp_info; 698 struct irdma_create_qp_info *qp_info; 699 int status; 700 701 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true); 702 if (!cqp_request) 703 return -ENOMEM; 704 705 cqp_info = &cqp_request->info; 706 qp_info = &cqp_request->info.in.u.qp_create.info; 707 memset(qp_info, 0, sizeof(*qp_info)); 708 qp_info->mac_valid = true; 709 qp_info->cq_num_valid = true; 710 qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE; 711 712 cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE; 713 cqp_info->post_sq = 1; 714 cqp_info->in.u.qp_create.qp = &iwqp->sc_qp; 715 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request; 716 status = irdma_handle_cqp_op(rf, cqp_request); 717 irdma_put_cqp_request(&rf->cqp, cqp_request); 718 719 return status; 720 } 721 722 void 723 irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp, 724 struct irdma_qp_host_ctx_info *ctx_info) 725 { 726 struct irdma_device *iwdev = iwqp->iwdev; 727 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 728 struct irdma_roce_offload_info *roce_info; 729 struct irdma_udp_offload_info *udp_info; 730 731 udp_info = &iwqp->udp_info; 732 udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu)); 733 udp_info->cwnd = iwdev->roce_cwnd; 734 udp_info->rexmit_thresh = 2; 735 udp_info->rnr_nak_thresh = 2; 736 udp_info->src_port = 0xc000; 737 udp_info->dst_port = ROCE_V2_UDP_DPORT; 738 roce_info = &iwqp->roce_info; 739 ether_addr_copy(roce_info->mac_addr, if_getlladdr(iwdev->netdev)); 740 741 roce_info->rd_en = true; 742 roce_info->wr_rdresp_en = true; 743 roce_info->bind_en = true; 744 roce_info->dcqcn_en = false; 745 roce_info->rtomin = iwdev->roce_rtomin; 746 747 roce_info->ack_credits = iwdev->roce_ackcreds; 748 roce_info->ird_size = dev->hw_attrs.max_hw_ird; 749 roce_info->ord_size = dev->hw_attrs.max_hw_ord; 750 751 if (!iwqp->user_mode) { 752 roce_info->priv_mode_en = true; 753 roce_info->fast_reg_en = true; 754 roce_info->udprivcq_en = true; 755 } 756 roce_info->roce_tver = 0; 757 758 ctx_info->roce_info = &iwqp->roce_info; 759 ctx_info->udp_info = &iwqp->udp_info; 760 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 761 } 762 763 void 764 irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp, 765 struct irdma_qp_host_ctx_info *ctx_info) 766 { 767 struct irdma_device *iwdev = iwqp->iwdev; 768 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 769 struct irdma_iwarp_offload_info *iwarp_info; 770 771 iwarp_info = &iwqp->iwarp_info; 772 ether_addr_copy(iwarp_info->mac_addr, if_getlladdr(iwdev->netdev)); 773 iwarp_info->rd_en = true; 774 iwarp_info->wr_rdresp_en = true; 775 iwarp_info->bind_en = true; 776 iwarp_info->ecn_en = true; 777 iwarp_info->rtomin = 5; 778 779 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 780 iwarp_info->ib_rd_en = true; 781 if (!iwqp->user_mode) { 782 iwarp_info->priv_mode_en = true; 783 iwarp_info->fast_reg_en = true; 784 } 785 iwarp_info->ddp_ver = 1; 786 iwarp_info->rdmap_ver = 1; 787 788 ctx_info->iwarp_info = &iwqp->iwarp_info; 789 ctx_info->iwarp_info_valid = true; 790 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 791 ctx_info->iwarp_info_valid = false; 792 } 793 794 int 795 irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr, 796 struct irdma_device *iwdev) 797 { 798 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 799 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs; 800 801 if (init_attr->create_flags) 802 return -EOPNOTSUPP; 803 804 if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline || 805 init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags || 806 init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags) 807 return -EINVAL; 808 809 if (rdma_protocol_roce(&iwdev->ibdev, 1)) { 810 if (init_attr->qp_type != IB_QPT_RC && 811 init_attr->qp_type != IB_QPT_UD && 812 init_attr->qp_type != IB_QPT_GSI) 813 return -EOPNOTSUPP; 814 } else { 815 if (init_attr->qp_type != IB_QPT_RC) 816 return -EOPNOTSUPP; 817 } 818 819 return 0; 820 } 821 822 void 823 irdma_sched_qp_flush_work(struct irdma_qp *iwqp) 824 { 825 if (iwqp->sc_qp.qp_uk.destroy_pending) 826 return; 827 irdma_qp_add_ref(&iwqp->ibqp); 828 if (mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush, 829 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS))) 830 irdma_qp_rem_ref(&iwqp->ibqp); 831 } 832 833 void 834 irdma_flush_worker(struct work_struct *work) 835 { 836 struct delayed_work *dwork = to_delayed_work(work); 837 struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush); 838 839 irdma_generate_flush_completions(iwqp); 840 /* For the add in irdma_sched_qp_flush_work */ 841 irdma_qp_rem_ref(&iwqp->ibqp); 842 } 843 844 static int 845 irdma_get_ib_acc_flags(struct irdma_qp *iwqp) 846 { 847 int acc_flags = 0; 848 849 if (rdma_protocol_roce(iwqp->ibqp.device, 1)) { 850 if (iwqp->roce_info.wr_rdresp_en) { 851 acc_flags |= IB_ACCESS_LOCAL_WRITE; 852 acc_flags |= IB_ACCESS_REMOTE_WRITE; 853 } 854 if (iwqp->roce_info.rd_en) 855 acc_flags |= IB_ACCESS_REMOTE_READ; 856 if (iwqp->roce_info.bind_en) 857 acc_flags |= IB_ACCESS_MW_BIND; 858 } else { 859 if (iwqp->iwarp_info.wr_rdresp_en) { 860 acc_flags |= IB_ACCESS_LOCAL_WRITE; 861 acc_flags |= IB_ACCESS_REMOTE_WRITE; 862 } 863 if (iwqp->iwarp_info.rd_en) 864 acc_flags |= IB_ACCESS_REMOTE_READ; 865 if (iwqp->iwarp_info.bind_en) 866 acc_flags |= IB_ACCESS_MW_BIND; 867 } 868 return acc_flags; 869 } 870 871 /** 872 * irdma_query_qp - query qp attributes 873 * @ibqp: qp pointer 874 * @attr: attributes pointer 875 * @attr_mask: Not used 876 * @init_attr: qp attributes to return 877 */ 878 static int 879 irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 880 int attr_mask, struct ib_qp_init_attr *init_attr) 881 { 882 struct irdma_qp *iwqp = to_iwqp(ibqp); 883 struct irdma_sc_qp *qp = &iwqp->sc_qp; 884 885 memset(attr, 0, sizeof(*attr)); 886 memset(init_attr, 0, sizeof(*init_attr)); 887 888 attr->qp_state = iwqp->ibqp_state; 889 attr->cur_qp_state = iwqp->ibqp_state; 890 attr->cap.max_send_wr = iwqp->max_send_wr; 891 attr->cap.max_recv_wr = iwqp->max_recv_wr; 892 attr->cap.max_inline_data = qp->qp_uk.max_inline_data; 893 attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt; 894 attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt; 895 attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp); 896 attr->port_num = 1; 897 if (rdma_protocol_roce(ibqp->device, 1)) { 898 attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss); 899 attr->qkey = iwqp->roce_info.qkey; 900 attr->rq_psn = iwqp->udp_info.epsn; 901 attr->sq_psn = iwqp->udp_info.psn_nxt; 902 attr->dest_qp_num = iwqp->roce_info.dest_qp; 903 attr->pkey_index = iwqp->roce_info.p_key; 904 attr->retry_cnt = iwqp->udp_info.rexmit_thresh; 905 attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh; 906 attr->max_rd_atomic = iwqp->roce_info.ord_size; 907 attr->max_dest_rd_atomic = iwqp->roce_info.ird_size; 908 } 909 910 init_attr->event_handler = iwqp->ibqp.event_handler; 911 init_attr->qp_context = iwqp->ibqp.qp_context; 912 init_attr->send_cq = iwqp->ibqp.send_cq; 913 init_attr->recv_cq = iwqp->ibqp.recv_cq; 914 init_attr->cap = attr->cap; 915 916 return 0; 917 } 918 919 /** 920 * irdma_modify_qp_roce - modify qp request 921 * @ibqp: qp's pointer for modify 922 * @attr: access attributes 923 * @attr_mask: state mask 924 * @udata: user data 925 */ 926 int 927 irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, 928 int attr_mask, struct ib_udata *udata) 929 { 930 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush) 931 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid) 932 struct irdma_pd *iwpd = to_iwpd(ibqp->pd); 933 struct irdma_qp *iwqp = to_iwqp(ibqp); 934 struct irdma_device *iwdev = iwqp->iwdev; 935 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 936 struct irdma_qp_host_ctx_info *ctx_info; 937 struct irdma_roce_offload_info *roce_info; 938 struct irdma_udp_offload_info *udp_info; 939 struct irdma_modify_qp_info info = {0}; 940 struct irdma_modify_qp_resp uresp = {}; 941 struct irdma_modify_qp_req ureq; 942 unsigned long flags; 943 u8 issue_modify_qp = 0; 944 int ret = 0; 945 946 ctx_info = &iwqp->ctx_info; 947 roce_info = &iwqp->roce_info; 948 udp_info = &iwqp->udp_info; 949 950 if (udata) { 951 if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) || 952 (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN)) 953 return -EINVAL; 954 } 955 956 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) 957 return -EOPNOTSUPP; 958 959 if (attr_mask & IB_QP_DEST_QPN) 960 roce_info->dest_qp = attr->dest_qp_num; 961 962 if (attr_mask & IB_QP_PKEY_INDEX) { 963 ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index, 964 &roce_info->p_key); 965 if (ret) 966 return ret; 967 } 968 969 if (attr_mask & IB_QP_QKEY) 970 roce_info->qkey = attr->qkey; 971 972 if (attr_mask & IB_QP_PATH_MTU) 973 udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu); 974 975 if (attr_mask & IB_QP_SQ_PSN) { 976 udp_info->psn_nxt = attr->sq_psn; 977 udp_info->lsn = 0xffff; 978 udp_info->psn_una = attr->sq_psn; 979 udp_info->psn_max = attr->sq_psn; 980 } 981 982 if (attr_mask & IB_QP_RQ_PSN) 983 udp_info->epsn = attr->rq_psn; 984 985 if (attr_mask & IB_QP_RNR_RETRY) 986 udp_info->rnr_nak_thresh = attr->rnr_retry; 987 988 if (attr_mask & IB_QP_RETRY_CNT) 989 udp_info->rexmit_thresh = attr->retry_cnt; 990 991 ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id; 992 993 if (attr_mask & IB_QP_AV) { 994 struct irdma_av *av = &iwqp->roce_ah.av; 995 u16 vlan_id = VLAN_N_VID; 996 u32 local_ip[4] = {}; 997 998 memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah)); 999 if (attr->ah_attr.ah_flags & IB_AH_GRH) { 1000 udp_info->ttl = attr->ah_attr.grh.hop_limit; 1001 udp_info->flow_label = attr->ah_attr.grh.flow_label; 1002 udp_info->tos = attr->ah_attr.grh.traffic_class; 1003 1004 udp_info->src_port = kc_rdma_get_udp_sport(udp_info->flow_label, 1005 ibqp->qp_num, 1006 roce_info->dest_qp); 1007 1008 irdma_qp_rem_qos(&iwqp->sc_qp); 1009 dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri); 1010 if (iwqp->sc_qp.vsi->dscp_mode) 1011 ctx_info->user_pri = 1012 iwqp->sc_qp.vsi->dscp_map[irdma_tos2dscp(udp_info->tos)]; 1013 else 1014 ctx_info->user_pri = rt_tos2priority(udp_info->tos); 1015 } 1016 ret = kc_irdma_set_roce_cm_info(iwqp, attr, &vlan_id); 1017 if (ret) 1018 return ret; 1019 if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri)) 1020 return -ENOMEM; 1021 iwqp->sc_qp.user_pri = ctx_info->user_pri; 1022 irdma_qp_add_qos(&iwqp->sc_qp); 1023 1024 if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode) 1025 vlan_id = 0; 1026 if (vlan_id < VLAN_N_VID) { 1027 udp_info->insert_vlan_tag = true; 1028 udp_info->vlan_tag = vlan_id | 1029 ctx_info->user_pri << VLAN_PRIO_SHIFT; 1030 } else { 1031 udp_info->insert_vlan_tag = false; 1032 } 1033 1034 av->attrs = attr->ah_attr; 1035 rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid); 1036 if (av->net_type == RDMA_NETWORK_IPV6) { 1037 __be32 *daddr = 1038 av->dgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32; 1039 __be32 *saddr = 1040 av->sgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32; 1041 1042 irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr); 1043 irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr); 1044 1045 udp_info->ipv4 = false; 1046 irdma_copy_ip_ntohl(local_ip, daddr); 1047 } else if (av->net_type == RDMA_NETWORK_IPV4) { 1048 __be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr; 1049 __be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr; 1050 1051 local_ip[0] = ntohl(daddr); 1052 1053 udp_info->ipv4 = true; 1054 udp_info->dest_ip_addr[0] = 0; 1055 udp_info->dest_ip_addr[1] = 0; 1056 udp_info->dest_ip_addr[2] = 0; 1057 udp_info->dest_ip_addr[3] = local_ip[0]; 1058 1059 udp_info->local_ipaddr[0] = 0; 1060 udp_info->local_ipaddr[1] = 0; 1061 udp_info->local_ipaddr[2] = 0; 1062 udp_info->local_ipaddr[3] = ntohl(saddr); 1063 } else { 1064 return -EINVAL; 1065 } 1066 udp_info->arp_idx = 1067 irdma_add_arp(iwdev->rf, local_ip, 1068 ah_attr_to_dmac(attr->ah_attr)); 1069 } 1070 1071 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 1072 if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) { 1073 irdma_dev_err(&iwdev->ibdev, 1074 "rd_atomic = %d, above max_hw_ord=%d\n", 1075 attr->max_rd_atomic, 1076 dev->hw_attrs.max_hw_ord); 1077 return -EINVAL; 1078 } 1079 if (attr->max_rd_atomic) 1080 roce_info->ord_size = attr->max_rd_atomic; 1081 info.ord_valid = true; 1082 } 1083 1084 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 1085 if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) { 1086 irdma_dev_err(&iwdev->ibdev, 1087 "rd_atomic = %d, above max_hw_ird=%d\n", 1088 attr->max_rd_atomic, 1089 dev->hw_attrs.max_hw_ird); 1090 return -EINVAL; 1091 } 1092 if (attr->max_dest_rd_atomic) 1093 roce_info->ird_size = attr->max_dest_rd_atomic; 1094 } 1095 1096 if (attr_mask & IB_QP_ACCESS_FLAGS) { 1097 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) 1098 roce_info->wr_rdresp_en = true; 1099 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 1100 roce_info->wr_rdresp_en = true; 1101 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 1102 roce_info->rd_en = true; 1103 } 1104 1105 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend)); 1106 1107 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 1108 "caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n", 1109 __builtin_return_address(0), ibqp->qp_num, attr->qp_state, 1110 iwqp->ibqp_state, iwqp->iwarp_state, attr_mask); 1111 1112 spin_lock_irqsave(&iwqp->lock, flags); 1113 if (attr_mask & IB_QP_STATE) { 1114 if (!kc_ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state, 1115 iwqp->ibqp.qp_type, attr_mask, 1116 IB_LINK_LAYER_ETHERNET)) { 1117 irdma_dev_warn(&iwdev->ibdev, 1118 "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n", 1119 iwqp->ibqp.qp_num, iwqp->ibqp_state, 1120 attr->qp_state); 1121 ret = -EINVAL; 1122 goto exit; 1123 } 1124 info.curr_iwarp_state = iwqp->iwarp_state; 1125 1126 switch (attr->qp_state) { 1127 case IB_QPS_INIT: 1128 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1129 ret = -EINVAL; 1130 goto exit; 1131 } 1132 1133 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) { 1134 info.next_iwarp_state = IRDMA_QP_STATE_IDLE; 1135 issue_modify_qp = 1; 1136 } 1137 break; 1138 case IB_QPS_RTR: 1139 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1140 ret = -EINVAL; 1141 goto exit; 1142 } 1143 info.arp_cache_idx_valid = true; 1144 info.cq_num_valid = true; 1145 info.next_iwarp_state = IRDMA_QP_STATE_RTR; 1146 issue_modify_qp = 1; 1147 break; 1148 case IB_QPS_RTS: 1149 if (iwqp->ibqp_state < IB_QPS_RTR || 1150 iwqp->ibqp_state == IB_QPS_ERR) { 1151 ret = -EINVAL; 1152 goto exit; 1153 } 1154 1155 info.arp_cache_idx_valid = true; 1156 info.cq_num_valid = true; 1157 info.ord_valid = true; 1158 info.next_iwarp_state = IRDMA_QP_STATE_RTS; 1159 issue_modify_qp = 1; 1160 if (dev->hw_attrs.uk_attrs.hw_rev == IRDMA_GEN_2) 1161 iwdev->rf->check_fc(&iwdev->vsi, &iwqp->sc_qp); 1162 udp_info->cwnd = iwdev->roce_cwnd; 1163 roce_info->ack_credits = iwdev->roce_ackcreds; 1164 if (iwdev->push_mode && udata && 1165 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX && 1166 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1167 spin_unlock_irqrestore(&iwqp->lock, flags); 1168 irdma_alloc_push_page(iwqp); 1169 spin_lock_irqsave(&iwqp->lock, flags); 1170 } 1171 break; 1172 case IB_QPS_SQD: 1173 if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD) 1174 goto exit; 1175 1176 if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) { 1177 ret = -EINVAL; 1178 goto exit; 1179 } 1180 1181 info.next_iwarp_state = IRDMA_QP_STATE_SQD; 1182 issue_modify_qp = 1; 1183 break; 1184 case IB_QPS_SQE: 1185 case IB_QPS_ERR: 1186 case IB_QPS_RESET: 1187 if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) { 1188 if (dev->hw_attrs.uk_attrs.hw_rev <= IRDMA_GEN_2) 1189 irdma_cqp_qp_suspend_resume(&iwqp->sc_qp, IRDMA_OP_SUSPEND); 1190 spin_unlock_irqrestore(&iwqp->lock, flags); 1191 info.next_iwarp_state = IRDMA_QP_STATE_SQD; 1192 irdma_hw_modify_qp(iwdev, iwqp, &info, true); 1193 spin_lock_irqsave(&iwqp->lock, flags); 1194 } 1195 1196 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) { 1197 spin_unlock_irqrestore(&iwqp->lock, flags); 1198 if (udata && udata->inlen) { 1199 if (ib_copy_from_udata(&ureq, udata, 1200 min(sizeof(ureq), udata->inlen))) 1201 return -EINVAL; 1202 1203 irdma_flush_wqes(iwqp, 1204 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) | 1205 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) | 1206 IRDMA_REFLUSH); 1207 } 1208 return 0; 1209 } 1210 1211 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1212 issue_modify_qp = 1; 1213 break; 1214 default: 1215 ret = -EINVAL; 1216 goto exit; 1217 } 1218 1219 iwqp->ibqp_state = attr->qp_state; 1220 } 1221 1222 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; 1223 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; 1224 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 1225 spin_unlock_irqrestore(&iwqp->lock, flags); 1226 1227 if (attr_mask & IB_QP_STATE) { 1228 if (issue_modify_qp) { 1229 ctx_info->rem_endpoint_idx = udp_info->arp_idx; 1230 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true)) 1231 return -EINVAL; 1232 spin_lock_irqsave(&iwqp->lock, flags); 1233 if (iwqp->iwarp_state == info.curr_iwarp_state) { 1234 iwqp->iwarp_state = info.next_iwarp_state; 1235 iwqp->ibqp_state = attr->qp_state; 1236 } 1237 if (iwqp->ibqp_state > IB_QPS_RTS && 1238 !iwqp->flush_issued) { 1239 spin_unlock_irqrestore(&iwqp->lock, flags); 1240 irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ | 1241 IRDMA_FLUSH_RQ | 1242 IRDMA_FLUSH_WAIT); 1243 iwqp->flush_issued = 1; 1244 1245 } else { 1246 spin_unlock_irqrestore(&iwqp->lock, flags); 1247 } 1248 } else { 1249 iwqp->ibqp_state = attr->qp_state; 1250 } 1251 if (udata && udata->outlen && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1252 struct irdma_ucontext *ucontext; 1253 1254 #if __FreeBSD_version >= 1400026 1255 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 1256 #else 1257 ucontext = to_ucontext(ibqp->uobject->context); 1258 #endif 1259 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX && 1260 !iwqp->push_wqe_mmap_entry && 1261 !irdma_setup_push_mmap_entries(ucontext, iwqp, 1262 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) { 1263 uresp.push_valid = 1; 1264 uresp.push_offset = iwqp->sc_qp.push_offset; 1265 } 1266 uresp.rd_fence_rate = iwdev->rd_fence_rate; 1267 ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), 1268 udata->outlen)); 1269 if (ret) { 1270 irdma_remove_push_mmap_entries(iwqp); 1271 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 1272 "copy_to_udata failed\n"); 1273 return ret; 1274 } 1275 } 1276 } 1277 1278 return 0; 1279 exit: 1280 spin_unlock_irqrestore(&iwqp->lock, flags); 1281 1282 return ret; 1283 } 1284 1285 /** 1286 * irdma_modify_qp - modify qp request 1287 * @ibqp: qp's pointer for modify 1288 * @attr: access attributes 1289 * @attr_mask: state mask 1290 * @udata: user data 1291 */ 1292 int 1293 irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, 1294 struct ib_udata *udata) 1295 { 1296 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush) 1297 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid) 1298 struct irdma_qp *iwqp = to_iwqp(ibqp); 1299 struct irdma_device *iwdev = iwqp->iwdev; 1300 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev; 1301 struct irdma_qp_host_ctx_info *ctx_info; 1302 struct irdma_tcp_offload_info *tcp_info; 1303 struct irdma_iwarp_offload_info *offload_info; 1304 struct irdma_modify_qp_info info = {0}; 1305 struct irdma_modify_qp_resp uresp = {}; 1306 struct irdma_modify_qp_req ureq = {}; 1307 u8 issue_modify_qp = 0; 1308 u8 dont_wait = 0; 1309 int err; 1310 unsigned long flags; 1311 1312 if (udata) { 1313 if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) || 1314 (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN)) 1315 return -EINVAL; 1316 } 1317 1318 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) 1319 return -EOPNOTSUPP; 1320 1321 ctx_info = &iwqp->ctx_info; 1322 offload_info = &iwqp->iwarp_info; 1323 tcp_info = &iwqp->tcp_info; 1324 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend)); 1325 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 1326 "caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n", 1327 __builtin_return_address(0), ibqp->qp_num, attr->qp_state, 1328 iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq, 1329 iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask); 1330 1331 spin_lock_irqsave(&iwqp->lock, flags); 1332 if (attr_mask & IB_QP_STATE) { 1333 info.curr_iwarp_state = iwqp->iwarp_state; 1334 switch (attr->qp_state) { 1335 case IB_QPS_INIT: 1336 case IB_QPS_RTR: 1337 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) { 1338 err = -EINVAL; 1339 goto exit; 1340 } 1341 1342 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) { 1343 info.next_iwarp_state = IRDMA_QP_STATE_IDLE; 1344 issue_modify_qp = 1; 1345 } 1346 if (iwdev->push_mode && udata && 1347 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX && 1348 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1349 spin_unlock_irqrestore(&iwqp->lock, flags); 1350 irdma_alloc_push_page(iwqp); 1351 spin_lock_irqsave(&iwqp->lock, flags); 1352 } 1353 break; 1354 case IB_QPS_RTS: 1355 if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS || 1356 !iwqp->cm_id) { 1357 err = -EINVAL; 1358 goto exit; 1359 } 1360 1361 issue_modify_qp = 1; 1362 iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED; 1363 iwqp->hte_added = 1; 1364 info.next_iwarp_state = IRDMA_QP_STATE_RTS; 1365 info.tcp_ctx_valid = true; 1366 info.ord_valid = true; 1367 info.arp_cache_idx_valid = true; 1368 info.cq_num_valid = true; 1369 break; 1370 case IB_QPS_SQD: 1371 if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) { 1372 err = 0; 1373 goto exit; 1374 } 1375 1376 if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING || 1377 iwqp->iwarp_state < IRDMA_QP_STATE_RTS) { 1378 err = 0; 1379 goto exit; 1380 } 1381 1382 if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) { 1383 err = -EINVAL; 1384 goto exit; 1385 } 1386 1387 info.next_iwarp_state = IRDMA_QP_STATE_CLOSING; 1388 issue_modify_qp = 1; 1389 break; 1390 case IB_QPS_SQE: 1391 if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) { 1392 err = -EINVAL; 1393 goto exit; 1394 } 1395 1396 info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE; 1397 issue_modify_qp = 1; 1398 break; 1399 case IB_QPS_ERR: 1400 case IB_QPS_RESET: 1401 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) { 1402 spin_unlock_irqrestore(&iwqp->lock, flags); 1403 if (udata && udata->inlen) { 1404 if (ib_copy_from_udata(&ureq, udata, 1405 min(sizeof(ureq), udata->inlen))) 1406 return -EINVAL; 1407 1408 irdma_flush_wqes(iwqp, 1409 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) | 1410 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) | 1411 IRDMA_REFLUSH); 1412 } 1413 return 0; 1414 } 1415 1416 if (iwqp->sc_qp.term_flags) { 1417 spin_unlock_irqrestore(&iwqp->lock, flags); 1418 irdma_terminate_del_timer(&iwqp->sc_qp); 1419 spin_lock_irqsave(&iwqp->lock, flags); 1420 } 1421 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1422 if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED && 1423 iwdev->iw_status && 1424 iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT) 1425 info.reset_tcp_conn = true; 1426 else 1427 dont_wait = 1; 1428 1429 issue_modify_qp = 1; 1430 info.next_iwarp_state = IRDMA_QP_STATE_ERROR; 1431 break; 1432 default: 1433 err = -EINVAL; 1434 goto exit; 1435 } 1436 1437 iwqp->ibqp_state = attr->qp_state; 1438 } 1439 if (attr_mask & IB_QP_ACCESS_FLAGS) { 1440 ctx_info->iwarp_info_valid = true; 1441 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) 1442 offload_info->wr_rdresp_en = true; 1443 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 1444 offload_info->wr_rdresp_en = true; 1445 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 1446 offload_info->rd_en = true; 1447 } 1448 1449 if (ctx_info->iwarp_info_valid) { 1450 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id; 1451 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id; 1452 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info); 1453 } 1454 spin_unlock_irqrestore(&iwqp->lock, flags); 1455 1456 if (attr_mask & IB_QP_STATE) { 1457 if (issue_modify_qp) { 1458 ctx_info->rem_endpoint_idx = tcp_info->arp_idx; 1459 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true)) 1460 return -EINVAL; 1461 } 1462 1463 spin_lock_irqsave(&iwqp->lock, flags); 1464 if (iwqp->iwarp_state == info.curr_iwarp_state) { 1465 iwqp->iwarp_state = info.next_iwarp_state; 1466 iwqp->ibqp_state = attr->qp_state; 1467 } 1468 spin_unlock_irqrestore(&iwqp->lock, flags); 1469 } 1470 1471 if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) { 1472 if (dont_wait) { 1473 if (iwqp->hw_tcp_state) { 1474 spin_lock_irqsave(&iwqp->lock, flags); 1475 iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED; 1476 iwqp->last_aeq = IRDMA_AE_RESET_SENT; 1477 spin_unlock_irqrestore(&iwqp->lock, flags); 1478 } 1479 irdma_cm_disconn(iwqp); 1480 } else { 1481 int close_timer_started; 1482 1483 spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags); 1484 1485 if (iwqp->cm_node) { 1486 atomic_inc(&iwqp->cm_node->refcnt); 1487 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags); 1488 close_timer_started = atomic_inc_return(&iwqp->close_timer_started); 1489 if (iwqp->cm_id && close_timer_started == 1) 1490 irdma_schedule_cm_timer(iwqp->cm_node, 1491 (struct irdma_puda_buf *)iwqp, 1492 IRDMA_TIMER_TYPE_CLOSE, 1, 0); 1493 1494 irdma_rem_ref_cm_node(iwqp->cm_node); 1495 } else { 1496 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags); 1497 } 1498 } 1499 } 1500 if (attr_mask & IB_QP_STATE && udata && udata->outlen && 1501 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) { 1502 struct irdma_ucontext *ucontext; 1503 1504 #if __FreeBSD_version >= 1400026 1505 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 1506 #else 1507 ucontext = to_ucontext(ibqp->uobject->context); 1508 #endif 1509 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX && 1510 !iwqp->push_wqe_mmap_entry && 1511 !irdma_setup_push_mmap_entries(ucontext, iwqp, 1512 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) { 1513 uresp.push_valid = 1; 1514 uresp.push_offset = iwqp->sc_qp.push_offset; 1515 } 1516 uresp.rd_fence_rate = iwdev->rd_fence_rate; 1517 1518 err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), 1519 udata->outlen)); 1520 if (err) { 1521 irdma_remove_push_mmap_entries(iwqp); 1522 irdma_debug(&iwdev->rf->sc_dev, 1523 IRDMA_DEBUG_VERBS, "copy_to_udata failed\n"); 1524 return err; 1525 } 1526 } 1527 1528 return 0; 1529 exit: 1530 spin_unlock_irqrestore(&iwqp->lock, flags); 1531 1532 return err; 1533 } 1534 1535 /** 1536 * irdma_cq_free_rsrc - free up resources for cq 1537 * @rf: RDMA PCI function 1538 * @iwcq: cq ptr 1539 */ 1540 void 1541 irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq) 1542 { 1543 struct irdma_sc_cq *cq = &iwcq->sc_cq; 1544 1545 if (!iwcq->user_mode) { 1546 irdma_free_dma_mem(rf->sc_dev.hw, &iwcq->kmem); 1547 irdma_free_dma_mem(rf->sc_dev.hw, &iwcq->kmem_shadow); 1548 } 1549 1550 irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id); 1551 } 1552 1553 /** 1554 * irdma_free_cqbuf - worker to free a cq buffer 1555 * @work: provides access to the cq buffer to free 1556 */ 1557 static void 1558 irdma_free_cqbuf(struct work_struct *work) 1559 { 1560 struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work); 1561 1562 irdma_free_dma_mem(cq_buf->hw, &cq_buf->kmem_buf); 1563 kfree(cq_buf); 1564 } 1565 1566 /** 1567 * irdma_process_resize_list - remove resized cq buffers from the resize_list 1568 * @iwcq: cq which owns the resize_list 1569 * @iwdev: irdma device 1570 * @lcqe_buf: the buffer where the last cqe is received 1571 */ 1572 int 1573 irdma_process_resize_list(struct irdma_cq *iwcq, 1574 struct irdma_device *iwdev, 1575 struct irdma_cq_buf *lcqe_buf) 1576 { 1577 struct list_head *tmp_node, *list_node; 1578 struct irdma_cq_buf *cq_buf; 1579 int cnt = 0; 1580 1581 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) { 1582 cq_buf = list_entry(list_node, struct irdma_cq_buf, list); 1583 if (cq_buf == lcqe_buf) 1584 return cnt; 1585 1586 list_del(&cq_buf->list); 1587 queue_work(iwdev->cleanup_wq, &cq_buf->work); 1588 cnt++; 1589 } 1590 1591 return cnt; 1592 } 1593 1594 /** 1595 * irdma_resize_cq - resize cq 1596 * @ibcq: cq to be resized 1597 * @entries: desired cq size 1598 * @udata: user data 1599 */ 1600 static int 1601 irdma_resize_cq(struct ib_cq *ibcq, int entries, 1602 struct ib_udata *udata) 1603 { 1604 #define IRDMA_RESIZE_CQ_MIN_REQ_LEN offsetofend(struct irdma_resize_cq_req, user_cq_buffer) 1605 struct irdma_cq *iwcq = to_iwcq(ibcq); 1606 struct irdma_sc_dev *dev = iwcq->sc_cq.dev; 1607 struct irdma_cqp_request *cqp_request; 1608 struct cqp_cmds_info *cqp_info; 1609 struct irdma_modify_cq_info *m_info; 1610 struct irdma_modify_cq_info info = {0}; 1611 struct irdma_dma_mem kmem_buf; 1612 struct irdma_cq_mr *cqmr_buf; 1613 struct irdma_pbl *iwpbl_buf; 1614 struct irdma_device *iwdev; 1615 struct irdma_pci_f *rf; 1616 struct irdma_cq_buf *cq_buf = NULL; 1617 unsigned long flags; 1618 int ret; 1619 1620 iwdev = to_iwdev(ibcq->device); 1621 rf = iwdev->rf; 1622 1623 if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags & 1624 IRDMA_FEATURE_CQ_RESIZE)) 1625 return -EOPNOTSUPP; 1626 1627 if (udata && udata->inlen < IRDMA_RESIZE_CQ_MIN_REQ_LEN) 1628 return -EINVAL; 1629 1630 if (entries > rf->max_cqe) 1631 return -EINVAL; 1632 1633 if (!iwcq->user_mode) { 1634 entries++; 1635 if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) 1636 entries *= 2; 1637 } 1638 1639 info.cq_size = max(entries, 4); 1640 1641 if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1) 1642 return 0; 1643 1644 if (udata) { 1645 struct irdma_resize_cq_req req = {}; 1646 struct irdma_ucontext *ucontext = 1647 #if __FreeBSD_version >= 1400026 1648 rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 1649 #else 1650 to_ucontext(ibcq->uobject->context); 1651 #endif 1652 1653 /* CQ resize not supported with legacy GEN_1 libi40iw */ 1654 if (ucontext->legacy_mode) 1655 return -EOPNOTSUPP; 1656 1657 if (ib_copy_from_udata(&req, udata, 1658 min(sizeof(req), udata->inlen))) 1659 return -EINVAL; 1660 1661 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 1662 iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer, 1663 &ucontext->cq_reg_mem_list); 1664 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 1665 1666 if (!iwpbl_buf) 1667 return -ENOMEM; 1668 1669 cqmr_buf = &iwpbl_buf->cq_mr; 1670 if (iwpbl_buf->pbl_allocated) { 1671 info.virtual_map = true; 1672 info.pbl_chunk_size = 1; 1673 info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx; 1674 } else { 1675 info.cq_pa = cqmr_buf->cq_pbl.addr; 1676 } 1677 } else { 1678 /* Kmode CQ resize */ 1679 int rsize; 1680 1681 rsize = info.cq_size * sizeof(struct irdma_cqe); 1682 kmem_buf.size = round_up(rsize, 256); 1683 kmem_buf.va = irdma_allocate_dma_mem(dev->hw, &kmem_buf, 1684 kmem_buf.size, 256); 1685 if (!kmem_buf.va) 1686 return -ENOMEM; 1687 1688 info.cq_base = kmem_buf.va; 1689 info.cq_pa = kmem_buf.pa; 1690 cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL); 1691 if (!cq_buf) { 1692 ret = -ENOMEM; 1693 goto error; 1694 } 1695 } 1696 1697 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true); 1698 if (!cqp_request) { 1699 ret = -ENOMEM; 1700 goto error; 1701 } 1702 1703 info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold; 1704 info.cq_resize = true; 1705 1706 cqp_info = &cqp_request->info; 1707 m_info = &cqp_info->in.u.cq_modify.info; 1708 memcpy(m_info, &info, sizeof(*m_info)); 1709 1710 cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY; 1711 cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq; 1712 cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request; 1713 cqp_info->post_sq = 1; 1714 ret = irdma_handle_cqp_op(rf, cqp_request); 1715 irdma_put_cqp_request(&rf->cqp, cqp_request); 1716 if (ret) 1717 goto error; 1718 1719 spin_lock_irqsave(&iwcq->lock, flags); 1720 if (cq_buf) { 1721 cq_buf->kmem_buf = iwcq->kmem; 1722 cq_buf->hw = dev->hw; 1723 memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk)); 1724 INIT_WORK(&cq_buf->work, irdma_free_cqbuf); 1725 list_add_tail(&cq_buf->list, &iwcq->resize_list); 1726 iwcq->kmem = kmem_buf; 1727 } 1728 1729 irdma_sc_cq_resize(&iwcq->sc_cq, &info); 1730 ibcq->cqe = info.cq_size - 1; 1731 spin_unlock_irqrestore(&iwcq->lock, flags); 1732 1733 return 0; 1734 error: 1735 if (!udata) 1736 irdma_free_dma_mem(dev->hw, &kmem_buf); 1737 kfree(cq_buf); 1738 1739 return ret; 1740 } 1741 1742 /** 1743 * irdma_get_mr_access - get hw MR access permissions from IB access flags 1744 * @access: IB access flags 1745 */ 1746 static inline u16 irdma_get_mr_access(int access){ 1747 u16 hw_access = 0; 1748 1749 hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ? 1750 IRDMA_ACCESS_FLAGS_LOCALWRITE : 0; 1751 hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ? 1752 IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0; 1753 hw_access |= (access & IB_ACCESS_REMOTE_READ) ? 1754 IRDMA_ACCESS_FLAGS_REMOTEREAD : 0; 1755 hw_access |= (access & IB_ACCESS_MW_BIND) ? 1756 IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0; 1757 hw_access |= (access & IB_ZERO_BASED) ? 1758 IRDMA_ACCESS_FLAGS_ZERO_BASED : 0; 1759 hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD; 1760 1761 return hw_access; 1762 } 1763 1764 /** 1765 * irdma_free_stag - free stag resource 1766 * @iwdev: irdma device 1767 * @stag: stag to free 1768 */ 1769 void 1770 irdma_free_stag(struct irdma_device *iwdev, u32 stag) 1771 { 1772 u32 stag_idx; 1773 1774 stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S; 1775 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx); 1776 } 1777 1778 /** 1779 * irdma_create_stag - create random stag 1780 * @iwdev: irdma device 1781 */ 1782 u32 1783 irdma_create_stag(struct irdma_device *iwdev) 1784 { 1785 u32 stag; 1786 u32 stag_index = 0; 1787 u32 next_stag_index; 1788 u32 driver_key; 1789 u32 random; 1790 u8 consumer_key; 1791 int ret; 1792 1793 get_random_bytes(&random, sizeof(random)); 1794 consumer_key = (u8)random; 1795 1796 driver_key = random & ~iwdev->rf->mr_stagmask; 1797 next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8; 1798 next_stag_index %= iwdev->rf->max_mr; 1799 1800 ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, 1801 iwdev->rf->max_mr, &stag_index, 1802 &next_stag_index); 1803 if (ret) 1804 return 0; 1805 stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S; 1806 stag |= driver_key; 1807 stag += (u32)consumer_key; 1808 1809 return stag; 1810 } 1811 1812 /** 1813 * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous 1814 * @arr: lvl1 pbl array 1815 * @npages: page count 1816 * @pg_size: page size 1817 * 1818 */ 1819 static bool 1820 irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size) 1821 { 1822 u32 pg_idx; 1823 1824 for (pg_idx = 0; pg_idx < npages; pg_idx++) { 1825 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx]) 1826 return false; 1827 } 1828 1829 return true; 1830 } 1831 1832 /** 1833 * irdma_check_mr_contiguous - check if MR is physically contiguous 1834 * @palloc: pbl allocation struct 1835 * @pg_size: page size 1836 */ 1837 static bool 1838 irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc, 1839 u32 pg_size) 1840 { 1841 struct irdma_pble_level2 *lvl2 = &palloc->level2; 1842 struct irdma_pble_info *leaf = lvl2->leaf; 1843 u64 *arr = NULL; 1844 u64 *start_addr = NULL; 1845 int i; 1846 bool ret; 1847 1848 if (palloc->level == PBLE_LEVEL_1) { 1849 arr = palloc->level1.addr; 1850 ret = irdma_check_mem_contiguous(arr, palloc->total_cnt, 1851 pg_size); 1852 return ret; 1853 } 1854 1855 start_addr = leaf->addr; 1856 1857 for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) { 1858 arr = leaf->addr; 1859 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr) 1860 return false; 1861 ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size); 1862 if (!ret) 1863 return false; 1864 } 1865 1866 return true; 1867 } 1868 1869 /** 1870 * irdma_setup_pbles - copy user pg address to pble's 1871 * @rf: RDMA PCI function 1872 * @iwmr: mr pointer for this memory registration 1873 * @lvl: requested pble levels 1874 */ 1875 static int 1876 irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr, 1877 u8 lvl) 1878 { 1879 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 1880 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 1881 struct irdma_pble_info *pinfo; 1882 u64 *pbl; 1883 int status; 1884 enum irdma_pble_level level = PBLE_LEVEL_1; 1885 1886 if (lvl) { 1887 status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt, 1888 lvl); 1889 if (status) 1890 return status; 1891 1892 iwpbl->pbl_allocated = true; 1893 level = palloc->level; 1894 pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 : 1895 palloc->level2.leaf; 1896 pbl = pinfo->addr; 1897 } else { 1898 pbl = iwmr->pgaddrmem; 1899 } 1900 1901 irdma_copy_user_pgaddrs(iwmr, pbl, level); 1902 1903 if (lvl) 1904 iwmr->pgaddrmem[0] = *pbl; 1905 1906 return 0; 1907 } 1908 1909 /** 1910 * irdma_handle_q_mem - handle memory for qp and cq 1911 * @iwdev: irdma device 1912 * @req: information for q memory management 1913 * @iwpbl: pble struct 1914 * @lvl: pble level mask 1915 */ 1916 static int 1917 irdma_handle_q_mem(struct irdma_device *iwdev, 1918 struct irdma_mem_reg_req *req, 1919 struct irdma_pbl *iwpbl, u8 lvl) 1920 { 1921 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 1922 struct irdma_mr *iwmr = iwpbl->iwmr; 1923 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr; 1924 struct irdma_cq_mr *cqmr = &iwpbl->cq_mr; 1925 struct irdma_hmc_pble *hmc_p; 1926 u64 *arr = iwmr->pgaddrmem; 1927 u32 pg_size, total; 1928 int err = 0; 1929 bool ret = true; 1930 1931 pg_size = iwmr->page_size; 1932 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 1933 if (err) 1934 return err; 1935 1936 if (lvl) 1937 arr = palloc->level1.addr; 1938 1939 switch (iwmr->type) { 1940 case IRDMA_MEMREG_TYPE_QP: 1941 total = req->sq_pages + req->rq_pages; 1942 hmc_p = &qpmr->sq_pbl; 1943 qpmr->shadow = (dma_addr_t) arr[total]; 1944 if (lvl) { 1945 ret = irdma_check_mem_contiguous(arr, req->sq_pages, 1946 pg_size); 1947 if (ret) 1948 ret = irdma_check_mem_contiguous(&arr[req->sq_pages], 1949 req->rq_pages, 1950 pg_size); 1951 } 1952 1953 if (!ret) { 1954 hmc_p->idx = palloc->level1.idx; 1955 hmc_p = &qpmr->rq_pbl; 1956 hmc_p->idx = palloc->level1.idx + req->sq_pages; 1957 } else { 1958 hmc_p->addr = arr[0]; 1959 hmc_p = &qpmr->rq_pbl; 1960 hmc_p->addr = arr[req->sq_pages]; 1961 } 1962 break; 1963 case IRDMA_MEMREG_TYPE_CQ: 1964 hmc_p = &cqmr->cq_pbl; 1965 1966 if (!cqmr->split) 1967 cqmr->shadow = (dma_addr_t) arr[req->cq_pages]; 1968 1969 if (lvl) 1970 ret = irdma_check_mem_contiguous(arr, req->cq_pages, 1971 pg_size); 1972 1973 if (!ret) 1974 hmc_p->idx = palloc->level1.idx; 1975 else 1976 hmc_p->addr = arr[0]; 1977 break; 1978 default: 1979 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, "MR type error\n"); 1980 err = -EINVAL; 1981 } 1982 1983 if (lvl && ret) { 1984 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 1985 iwpbl->pbl_allocated = false; 1986 } 1987 1988 return err; 1989 } 1990 1991 /** 1992 * irdma_hw_alloc_mw - create the hw memory window 1993 * @iwdev: irdma device 1994 * @iwmr: pointer to memory window info 1995 */ 1996 int 1997 irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr) 1998 { 1999 struct irdma_mw_alloc_info *info; 2000 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd); 2001 struct irdma_cqp_request *cqp_request; 2002 struct cqp_cmds_info *cqp_info; 2003 int status; 2004 2005 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2006 if (!cqp_request) 2007 return -ENOMEM; 2008 2009 cqp_info = &cqp_request->info; 2010 info = &cqp_info->in.u.mw_alloc.info; 2011 memset(info, 0, sizeof(*info)); 2012 if (iwmr->ibmw.type == IB_MW_TYPE_1) 2013 info->mw_wide = true; 2014 2015 info->page_size = PAGE_SIZE; 2016 info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2017 info->pd_id = iwpd->sc_pd.pd_id; 2018 info->remote_access = true; 2019 cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC; 2020 cqp_info->post_sq = 1; 2021 cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev; 2022 cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request; 2023 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2024 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2025 2026 return status; 2027 } 2028 2029 /** 2030 * irdma_dealloc_mw - Dealloc memory window 2031 * @ibmw: memory window structure. 2032 */ 2033 static int 2034 irdma_dealloc_mw(struct ib_mw *ibmw) 2035 { 2036 struct ib_pd *ibpd = ibmw->pd; 2037 struct irdma_pd *iwpd = to_iwpd(ibpd); 2038 struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw); 2039 struct irdma_device *iwdev = to_iwdev(ibmw->device); 2040 struct irdma_cqp_request *cqp_request; 2041 struct cqp_cmds_info *cqp_info; 2042 struct irdma_dealloc_stag_info *info; 2043 2044 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2045 if (!cqp_request) 2046 return -ENOMEM; 2047 2048 cqp_info = &cqp_request->info; 2049 info = &cqp_info->in.u.dealloc_stag.info; 2050 memset(info, 0, sizeof(*info)); 2051 info->pd_id = iwpd->sc_pd.pd_id; 2052 info->stag_idx = RS_64_1(ibmw->rkey, IRDMA_CQPSQ_STAG_IDX_S); 2053 info->mr = false; 2054 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG; 2055 cqp_info->post_sq = 1; 2056 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev; 2057 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request; 2058 irdma_handle_cqp_op(iwdev->rf, cqp_request); 2059 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2060 irdma_free_stag(iwdev, iwmr->stag); 2061 kfree(iwmr); 2062 2063 return 0; 2064 } 2065 2066 /** 2067 * irdma_hw_alloc_stag - cqp command to allocate stag 2068 * @iwdev: irdma device 2069 * @iwmr: irdma mr pointer 2070 */ 2071 int 2072 irdma_hw_alloc_stag(struct irdma_device *iwdev, 2073 struct irdma_mr *iwmr) 2074 { 2075 struct irdma_allocate_stag_info *info; 2076 struct ib_pd *pd = iwmr->ibmr.pd; 2077 struct irdma_pd *iwpd = to_iwpd(pd); 2078 struct irdma_cqp_request *cqp_request; 2079 struct cqp_cmds_info *cqp_info; 2080 int status; 2081 2082 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2083 if (!cqp_request) 2084 return -ENOMEM; 2085 2086 cqp_info = &cqp_request->info; 2087 info = &cqp_info->in.u.alloc_stag.info; 2088 memset(info, 0, sizeof(*info)); 2089 info->page_size = PAGE_SIZE; 2090 info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2091 info->pd_id = iwpd->sc_pd.pd_id; 2092 info->total_len = iwmr->len; 2093 info->all_memory = (pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) ? true : false; 2094 info->remote_access = true; 2095 cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG; 2096 cqp_info->post_sq = 1; 2097 cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev; 2098 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request; 2099 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2100 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2101 if (!status) 2102 iwmr->is_hwreg = 1; 2103 2104 return status; 2105 } 2106 2107 /** 2108 * irdma_set_page - populate pbl list for fmr 2109 * @ibmr: ib mem to access iwarp mr pointer 2110 * @addr: page dma address fro pbl list 2111 */ 2112 static int 2113 irdma_set_page(struct ib_mr *ibmr, u64 addr) 2114 { 2115 struct irdma_mr *iwmr = to_iwmr(ibmr); 2116 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2117 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2118 u64 *pbl; 2119 2120 if (unlikely(iwmr->npages == iwmr->page_cnt)) 2121 return -ENOMEM; 2122 2123 if (palloc->level == PBLE_LEVEL_2) { 2124 struct irdma_pble_info *palloc_info = 2125 palloc->level2.leaf + (iwmr->npages >> PBLE_512_SHIFT); 2126 2127 palloc_info->addr[iwmr->npages & (PBLE_PER_PAGE - 1)] = addr; 2128 } else { 2129 pbl = palloc->level1.addr; 2130 pbl[iwmr->npages] = addr; 2131 } 2132 2133 iwmr->npages++; 2134 return 0; 2135 } 2136 2137 /** 2138 * irdma_map_mr_sg - map of sg list for fmr 2139 * @ibmr: ib mem to access iwarp mr pointer 2140 * @sg: scatter gather list 2141 * @sg_nents: number of sg pages 2142 * @sg_offset: scatter gather list for fmr 2143 */ 2144 static int 2145 irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, 2146 int sg_nents, unsigned int *sg_offset) 2147 { 2148 struct irdma_mr *iwmr = to_iwmr(ibmr); 2149 2150 iwmr->npages = 0; 2151 2152 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page); 2153 } 2154 2155 /** 2156 * irdma_hwreg_mr - send cqp command for memory registration 2157 * @iwdev: irdma device 2158 * @iwmr: irdma mr pointer 2159 * @access: access for MR 2160 */ 2161 int 2162 irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr, 2163 u16 access) 2164 { 2165 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2166 struct irdma_reg_ns_stag_info *stag_info; 2167 struct ib_pd *pd = iwmr->ibmr.pd; 2168 struct irdma_pd *iwpd = to_iwpd(pd); 2169 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2170 struct irdma_cqp_request *cqp_request; 2171 struct cqp_cmds_info *cqp_info; 2172 int ret; 2173 2174 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2175 if (!cqp_request) 2176 return -ENOMEM; 2177 2178 cqp_info = &cqp_request->info; 2179 stag_info = &cqp_info->in.u.mr_reg_non_shared.info; 2180 memset(stag_info, 0, sizeof(*stag_info)); 2181 stag_info->va = iwpbl->user_base; 2182 stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S; 2183 stag_info->stag_key = (u8)iwmr->stag; 2184 stag_info->total_len = iwmr->len; 2185 stag_info->all_memory = (pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) ? true : false; 2186 stag_info->access_rights = irdma_get_mr_access(access); 2187 stag_info->pd_id = iwpd->sc_pd.pd_id; 2188 if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED) 2189 stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED; 2190 else 2191 stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED; 2192 stag_info->page_size = iwmr->page_size; 2193 2194 if (iwpbl->pbl_allocated) { 2195 if (palloc->level == PBLE_LEVEL_1) { 2196 stag_info->first_pm_pbl_index = palloc->level1.idx; 2197 stag_info->chunk_size = 1; 2198 } else { 2199 stag_info->first_pm_pbl_index = palloc->level2.root.idx; 2200 stag_info->chunk_size = 3; 2201 } 2202 } else { 2203 stag_info->reg_addr_pa = iwmr->pgaddrmem[0]; 2204 } 2205 2206 cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED; 2207 cqp_info->post_sq = 1; 2208 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev; 2209 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request; 2210 ret = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2211 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2212 2213 if (!ret) 2214 iwmr->is_hwreg = 1; 2215 2216 return ret; 2217 } 2218 2219 /** 2220 * irdma_reg_user_mr - Register a user memory region 2221 * @pd: ptr of pd 2222 * @start: virtual start address 2223 * @len: length of mr 2224 * @virt: virtual address 2225 * @access: access of mr 2226 * @udata: user data 2227 */ 2228 static struct ib_mr * 2229 irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len, 2230 u64 virt, int access, 2231 struct ib_udata *udata) 2232 { 2233 #define IRDMA_MEM_REG_MIN_REQ_LEN offsetofend(struct irdma_mem_reg_req, sq_pages) 2234 struct irdma_device *iwdev = to_iwdev(pd->device); 2235 struct irdma_ucontext *ucontext; 2236 struct irdma_pble_alloc *palloc; 2237 struct irdma_pbl *iwpbl; 2238 struct irdma_mr *iwmr; 2239 struct ib_umem *region; 2240 struct irdma_mem_reg_req req = {}; 2241 u32 total, stag = 0; 2242 u8 shadow_pgcnt = 1; 2243 unsigned long flags; 2244 int err = -EINVAL; 2245 u8 lvl; 2246 int ret; 2247 2248 if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size) 2249 return ERR_PTR(-EINVAL); 2250 2251 if (udata->inlen < IRDMA_MEM_REG_MIN_REQ_LEN) 2252 return ERR_PTR(-EINVAL); 2253 2254 region = ib_umem_get(pd->uobject->context, start, len, access, 0); 2255 2256 if (IS_ERR(region)) { 2257 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2258 "Failed to create ib_umem region\n"); 2259 return (struct ib_mr *)region; 2260 } 2261 2262 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) { 2263 ib_umem_release(region); 2264 return ERR_PTR(-EFAULT); 2265 } 2266 2267 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); 2268 if (!iwmr) { 2269 ib_umem_release(region); 2270 return ERR_PTR(-ENOMEM); 2271 } 2272 2273 iwpbl = &iwmr->iwpbl; 2274 iwpbl->iwmr = iwmr; 2275 iwmr->region = region; 2276 iwmr->ibmr.pd = pd; 2277 iwmr->ibmr.device = pd->device; 2278 iwmr->ibmr.iova = virt; 2279 iwmr->page_size = IRDMA_HW_PAGE_SIZE; 2280 iwmr->page_msk = ~(IRDMA_HW_PAGE_SIZE - 1); 2281 2282 iwmr->len = region->length; 2283 iwpbl->user_base = virt; 2284 palloc = &iwpbl->pble_alloc; 2285 iwmr->type = req.reg_type; 2286 iwmr->page_cnt = irdma_ib_umem_num_dma_blocks(region, iwmr->page_size, virt); 2287 2288 switch (req.reg_type) { 2289 case IRDMA_MEMREG_TYPE_QP: 2290 total = req.sq_pages + req.rq_pages + shadow_pgcnt; 2291 if (total > iwmr->page_cnt) { 2292 err = -EINVAL; 2293 goto error; 2294 } 2295 total = req.sq_pages + req.rq_pages; 2296 lvl = total > 2 ? PBLE_LEVEL_1 : PBLE_LEVEL_0; 2297 err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl); 2298 if (err) 2299 goto error; 2300 2301 #if __FreeBSD_version >= 1400026 2302 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 2303 #else 2304 ucontext = to_ucontext(pd->uobject->context); 2305 #endif 2306 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 2307 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list); 2308 iwpbl->on_list = true; 2309 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 2310 break; 2311 case IRDMA_MEMREG_TYPE_CQ: 2312 if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE) 2313 shadow_pgcnt = 0; 2314 total = req.cq_pages + shadow_pgcnt; 2315 if (total > iwmr->page_cnt) { 2316 err = -EINVAL; 2317 goto error; 2318 } 2319 2320 lvl = req.cq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0; 2321 err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl); 2322 if (err) 2323 goto error; 2324 2325 #if __FreeBSD_version >= 1400026 2326 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext, ibucontext); 2327 #else 2328 ucontext = to_ucontext(pd->uobject->context); 2329 #endif 2330 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 2331 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list); 2332 iwpbl->on_list = true; 2333 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 2334 break; 2335 case IRDMA_MEMREG_TYPE_MEM: 2336 lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0; 2337 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 2338 if (err) 2339 goto error; 2340 2341 if (lvl) { 2342 ret = irdma_check_mr_contiguous(palloc, 2343 iwmr->page_size); 2344 if (ret) { 2345 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2346 iwpbl->pbl_allocated = false; 2347 } 2348 } 2349 2350 stag = irdma_create_stag(iwdev); 2351 if (!stag) { 2352 err = -ENOMEM; 2353 goto error; 2354 } 2355 2356 iwmr->stag = stag; 2357 iwmr->ibmr.rkey = stag; 2358 iwmr->ibmr.lkey = stag; 2359 iwmr->access = access; 2360 err = irdma_hwreg_mr(iwdev, iwmr, access); 2361 if (err) { 2362 irdma_free_stag(iwdev, stag); 2363 goto error; 2364 } 2365 2366 break; 2367 default: 2368 goto error; 2369 } 2370 2371 iwmr->type = req.reg_type; 2372 2373 return &iwmr->ibmr; 2374 2375 error: 2376 if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated) 2377 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2378 ib_umem_release(region); 2379 kfree(iwmr); 2380 2381 return ERR_PTR(err); 2382 } 2383 2384 int 2385 irdma_hwdereg_mr(struct ib_mr *ib_mr) 2386 { 2387 struct irdma_device *iwdev = to_iwdev(ib_mr->device); 2388 struct irdma_mr *iwmr = to_iwmr(ib_mr); 2389 struct irdma_pd *iwpd = to_iwpd(ib_mr->pd); 2390 struct irdma_dealloc_stag_info *info; 2391 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2392 struct irdma_cqp_request *cqp_request; 2393 struct cqp_cmds_info *cqp_info; 2394 int status; 2395 2396 /* 2397 * Skip HW MR de-register when it is already de-registered during an MR re-reregister and the re-registration 2398 * fails 2399 */ 2400 if (!iwmr->is_hwreg) 2401 return 0; 2402 2403 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 2404 if (!cqp_request) 2405 return -ENOMEM; 2406 2407 cqp_info = &cqp_request->info; 2408 info = &cqp_info->in.u.dealloc_stag.info; 2409 memset(info, 0, sizeof(*info)); 2410 info->pd_id = iwpd->sc_pd.pd_id; 2411 info->stag_idx = RS_64_1(ib_mr->rkey, IRDMA_CQPSQ_STAG_IDX_S); 2412 info->mr = true; 2413 if (iwpbl->pbl_allocated) 2414 info->dealloc_pbl = true; 2415 2416 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG; 2417 cqp_info->post_sq = 1; 2418 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev; 2419 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request; 2420 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 2421 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 2422 2423 if (!status) 2424 iwmr->is_hwreg = 0; 2425 2426 return status; 2427 } 2428 2429 /* 2430 * irdma_rereg_mr_trans - Re-register a user MR for a change translation. @iwmr: ptr of iwmr @start: virtual start 2431 * address @len: length of mr @virt: virtual address 2432 * 2433 * Re-register a user memory region when a change translation is requested. Re-register a new region while reusing the 2434 * stag from the original registration. 2435 */ 2436 struct ib_mr * 2437 irdma_rereg_mr_trans(struct irdma_mr *iwmr, u64 start, u64 len, 2438 u64 virt, struct ib_udata *udata) 2439 { 2440 struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device); 2441 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2442 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc; 2443 struct ib_pd *pd = iwmr->ibmr.pd; 2444 struct ib_umem *region; 2445 u8 lvl; 2446 int err; 2447 2448 region = ib_umem_get(pd->uobject->context, start, len, iwmr->access, 0); 2449 2450 if (IS_ERR(region)) { 2451 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2452 "Failed to create ib_umem region\n"); 2453 return (struct ib_mr *)region; 2454 } 2455 2456 iwmr->region = region; 2457 iwmr->ibmr.iova = virt; 2458 iwmr->ibmr.pd = pd; 2459 iwmr->page_size = PAGE_SIZE; 2460 2461 iwmr->len = region->length; 2462 iwpbl->user_base = virt; 2463 iwmr->page_cnt = irdma_ib_umem_num_dma_blocks(region, iwmr->page_size, 2464 virt); 2465 2466 lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0; 2467 2468 err = irdma_setup_pbles(iwdev->rf, iwmr, lvl); 2469 if (err) 2470 goto error; 2471 2472 if (lvl) { 2473 err = irdma_check_mr_contiguous(palloc, 2474 iwmr->page_size); 2475 if (err) { 2476 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2477 iwpbl->pbl_allocated = false; 2478 } 2479 } 2480 2481 err = irdma_hwreg_mr(iwdev, iwmr, iwmr->access); 2482 if (err) 2483 goto error; 2484 2485 return &iwmr->ibmr; 2486 2487 error: 2488 if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated) { 2489 irdma_free_pble(iwdev->rf->pble_rsrc, palloc); 2490 iwpbl->pbl_allocated = false; 2491 } 2492 ib_umem_release(region); 2493 iwmr->region = NULL; 2494 2495 return ERR_PTR(err); 2496 } 2497 2498 /** 2499 * irdma_reg_phys_mr - register kernel physical memory 2500 * @pd: ibpd pointer 2501 * @addr: physical address of memory to register 2502 * @size: size of memory to register 2503 * @access: Access rights 2504 * @iova_start: start of virtual address for physical buffers 2505 */ 2506 struct ib_mr * 2507 irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access, 2508 u64 *iova_start) 2509 { 2510 struct irdma_device *iwdev = to_iwdev(pd->device); 2511 struct irdma_pbl *iwpbl; 2512 struct irdma_mr *iwmr; 2513 u32 stag; 2514 int ret; 2515 2516 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL); 2517 if (!iwmr) 2518 return ERR_PTR(-ENOMEM); 2519 2520 iwmr->ibmr.pd = pd; 2521 iwmr->ibmr.device = pd->device; 2522 iwpbl = &iwmr->iwpbl; 2523 iwpbl->iwmr = iwmr; 2524 iwmr->type = IRDMA_MEMREG_TYPE_MEM; 2525 iwpbl->user_base = *iova_start; 2526 stag = irdma_create_stag(iwdev); 2527 if (!stag) { 2528 ret = -ENOMEM; 2529 goto err; 2530 } 2531 2532 iwmr->stag = stag; 2533 iwmr->ibmr.iova = *iova_start; 2534 iwmr->ibmr.rkey = stag; 2535 iwmr->ibmr.lkey = stag; 2536 iwmr->page_cnt = 1; 2537 iwmr->pgaddrmem[0] = addr; 2538 iwmr->len = size; 2539 iwmr->page_size = SZ_4K; 2540 ret = irdma_hwreg_mr(iwdev, iwmr, access); 2541 if (ret) { 2542 irdma_free_stag(iwdev, stag); 2543 goto err; 2544 } 2545 2546 return &iwmr->ibmr; 2547 2548 err: 2549 kfree(iwmr); 2550 2551 return ERR_PTR(ret); 2552 } 2553 2554 /** 2555 * irdma_get_dma_mr - register physical mem 2556 * @pd: ptr of pd 2557 * @acc: access for memory 2558 */ 2559 static struct ib_mr * 2560 irdma_get_dma_mr(struct ib_pd *pd, int acc) 2561 { 2562 u64 kva = 0; 2563 2564 return irdma_reg_phys_mr(pd, 0, 0, acc, &kva); 2565 } 2566 2567 /** 2568 * irdma_del_memlist - Deleting pbl list entries for CQ/QP 2569 * @iwmr: iwmr for IB's user page addresses 2570 * @ucontext: ptr to user context 2571 */ 2572 void 2573 irdma_del_memlist(struct irdma_mr *iwmr, 2574 struct irdma_ucontext *ucontext) 2575 { 2576 struct irdma_pbl *iwpbl = &iwmr->iwpbl; 2577 unsigned long flags; 2578 2579 switch (iwmr->type) { 2580 case IRDMA_MEMREG_TYPE_CQ: 2581 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags); 2582 if (iwpbl->on_list) { 2583 iwpbl->on_list = false; 2584 list_del(&iwpbl->list); 2585 } 2586 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags); 2587 break; 2588 case IRDMA_MEMREG_TYPE_QP: 2589 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags); 2590 if (iwpbl->on_list) { 2591 iwpbl->on_list = false; 2592 list_del(&iwpbl->list); 2593 } 2594 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags); 2595 break; 2596 default: 2597 break; 2598 } 2599 } 2600 2601 /** 2602 * irdma_copy_sg_list - copy sg list for qp 2603 * @sg_list: copied into sg_list 2604 * @sgl: copy from sgl 2605 * @num_sges: count of sg entries 2606 */ 2607 static void 2608 irdma_copy_sg_list(struct irdma_sge *sg_list, struct ib_sge *sgl, 2609 int num_sges) 2610 { 2611 unsigned int i; 2612 2613 for (i = 0; i < num_sges; i++) { 2614 sg_list[i].tag_off = sgl[i].addr; 2615 sg_list[i].len = sgl[i].length; 2616 sg_list[i].stag = sgl[i].lkey; 2617 } 2618 } 2619 2620 /** 2621 * irdma_post_send - kernel application wr 2622 * @ibqp: qp ptr for wr 2623 * @ib_wr: work request ptr 2624 * @bad_wr: return of bad wr if err 2625 */ 2626 static int 2627 irdma_post_send(struct ib_qp *ibqp, 2628 const struct ib_send_wr *ib_wr, 2629 const struct ib_send_wr **bad_wr) 2630 { 2631 struct irdma_qp *iwqp; 2632 struct irdma_qp_uk *ukqp; 2633 struct irdma_sc_dev *dev; 2634 struct irdma_post_sq_info info; 2635 int err = 0; 2636 unsigned long flags; 2637 bool inv_stag; 2638 struct irdma_ah *ah; 2639 2640 iwqp = to_iwqp(ibqp); 2641 ukqp = &iwqp->sc_qp.qp_uk; 2642 dev = &iwqp->iwdev->rf->sc_dev; 2643 2644 spin_lock_irqsave(&iwqp->lock, flags); 2645 while (ib_wr) { 2646 memset(&info, 0, sizeof(info)); 2647 inv_stag = false; 2648 info.wr_id = (ib_wr->wr_id); 2649 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all) 2650 info.signaled = true; 2651 if (ib_wr->send_flags & IB_SEND_FENCE) 2652 info.read_fence = true; 2653 switch (ib_wr->opcode) { 2654 case IB_WR_SEND_WITH_IMM: 2655 if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) { 2656 info.imm_data_valid = true; 2657 info.imm_data = ntohl(ib_wr->ex.imm_data); 2658 } else { 2659 err = -EINVAL; 2660 break; 2661 } 2662 /* fallthrough */ 2663 case IB_WR_SEND: 2664 case IB_WR_SEND_WITH_INV: 2665 if (ib_wr->opcode == IB_WR_SEND || 2666 ib_wr->opcode == IB_WR_SEND_WITH_IMM) { 2667 if (ib_wr->send_flags & IB_SEND_SOLICITED) 2668 info.op_type = IRDMA_OP_TYPE_SEND_SOL; 2669 else 2670 info.op_type = IRDMA_OP_TYPE_SEND; 2671 } else { 2672 if (ib_wr->send_flags & IB_SEND_SOLICITED) 2673 info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV; 2674 else 2675 info.op_type = IRDMA_OP_TYPE_SEND_INV; 2676 info.stag_to_inv = ib_wr->ex.invalidate_rkey; 2677 } 2678 2679 info.op.send.num_sges = ib_wr->num_sge; 2680 info.op.send.sg_list = (struct irdma_sge *)ib_wr->sg_list; 2681 if (iwqp->ibqp.qp_type == IB_QPT_UD || 2682 iwqp->ibqp.qp_type == IB_QPT_GSI) { 2683 ah = to_iwah(ud_wr(ib_wr)->ah); 2684 info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx; 2685 info.op.send.qkey = ud_wr(ib_wr)->remote_qkey; 2686 info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn; 2687 } 2688 2689 if (ib_wr->send_flags & IB_SEND_INLINE) 2690 err = irdma_uk_inline_send(ukqp, &info, false); 2691 else 2692 err = irdma_uk_send(ukqp, &info, false); 2693 break; 2694 case IB_WR_RDMA_WRITE_WITH_IMM: 2695 if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) { 2696 info.imm_data_valid = true; 2697 info.imm_data = ntohl(ib_wr->ex.imm_data); 2698 } else { 2699 err = -EINVAL; 2700 break; 2701 } 2702 /* fallthrough */ 2703 case IB_WR_RDMA_WRITE: 2704 if (ib_wr->send_flags & IB_SEND_SOLICITED) 2705 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL; 2706 else 2707 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE; 2708 2709 info.op.rdma_write.num_lo_sges = ib_wr->num_sge; 2710 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list; 2711 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr; 2712 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey; 2713 if (ib_wr->send_flags & IB_SEND_INLINE) 2714 err = irdma_uk_inline_rdma_write(ukqp, &info, false); 2715 else 2716 err = irdma_uk_rdma_write(ukqp, &info, false); 2717 break; 2718 case IB_WR_RDMA_READ_WITH_INV: 2719 inv_stag = true; 2720 /* fallthrough */ 2721 case IB_WR_RDMA_READ: 2722 if (ib_wr->num_sge > 2723 dev->hw_attrs.uk_attrs.max_hw_read_sges) { 2724 err = -EINVAL; 2725 break; 2726 } 2727 info.op_type = IRDMA_OP_TYPE_RDMA_READ; 2728 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr; 2729 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey; 2730 info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list; 2731 info.op.rdma_read.num_lo_sges = ib_wr->num_sge; 2732 err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false); 2733 break; 2734 case IB_WR_LOCAL_INV: 2735 info.op_type = IRDMA_OP_TYPE_INV_STAG; 2736 info.local_fence = info.read_fence; 2737 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey; 2738 err = irdma_uk_stag_local_invalidate(ukqp, &info, true); 2739 break; 2740 case IB_WR_REG_MR:{ 2741 struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr); 2742 struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc; 2743 struct irdma_fast_reg_stag_info stag_info = {0}; 2744 2745 stag_info.signaled = info.signaled; 2746 stag_info.read_fence = info.read_fence; 2747 stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access); 2748 stag_info.stag_key = reg_wr(ib_wr)->key & 0xff; 2749 stag_info.stag_idx = reg_wr(ib_wr)->key >> 8; 2750 stag_info.page_size = reg_wr(ib_wr)->mr->page_size; 2751 stag_info.wr_id = ib_wr->wr_id; 2752 stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED; 2753 stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova; 2754 stag_info.total_len = iwmr->ibmr.length; 2755 if (palloc->level == PBLE_LEVEL_2) { 2756 stag_info.chunk_size = 3; 2757 stag_info.first_pm_pbl_index = palloc->level2.root.idx; 2758 } else { 2759 stag_info.chunk_size = 1; 2760 stag_info.first_pm_pbl_index = palloc->level1.idx; 2761 } 2762 stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE; 2763 err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info, 2764 true); 2765 break; 2766 } 2767 default: 2768 err = -EINVAL; 2769 irdma_debug(&iwqp->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2770 "upost_send bad opcode = 0x%x\n", 2771 ib_wr->opcode); 2772 break; 2773 } 2774 2775 if (err) 2776 break; 2777 ib_wr = ib_wr->next; 2778 } 2779 2780 if (!iwqp->flush_issued) { 2781 if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS) 2782 irdma_uk_qp_post_wr(ukqp); 2783 spin_unlock_irqrestore(&iwqp->lock, flags); 2784 } else { 2785 spin_unlock_irqrestore(&iwqp->lock, flags); 2786 irdma_sched_qp_flush_work(iwqp); 2787 } 2788 2789 if (err) 2790 *bad_wr = ib_wr; 2791 2792 return err; 2793 } 2794 2795 /** 2796 * irdma_post_recv - post receive wr for kernel application 2797 * @ibqp: ib qp pointer 2798 * @ib_wr: work request for receive 2799 * @bad_wr: bad wr caused an error 2800 */ 2801 static int 2802 irdma_post_recv(struct ib_qp *ibqp, 2803 const struct ib_recv_wr *ib_wr, 2804 const struct ib_recv_wr **bad_wr) 2805 { 2806 struct irdma_qp *iwqp = to_iwqp(ibqp); 2807 struct irdma_qp_uk *ukqp = &iwqp->sc_qp.qp_uk; 2808 struct irdma_post_rq_info post_recv = {0}; 2809 struct irdma_sge *sg_list = iwqp->sg_list; 2810 unsigned long flags; 2811 int err = 0; 2812 2813 spin_lock_irqsave(&iwqp->lock, flags); 2814 2815 while (ib_wr) { 2816 if (ib_wr->num_sge > ukqp->max_rq_frag_cnt) { 2817 err = -EINVAL; 2818 goto out; 2819 } 2820 post_recv.num_sges = ib_wr->num_sge; 2821 post_recv.wr_id = ib_wr->wr_id; 2822 irdma_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge); 2823 post_recv.sg_list = sg_list; 2824 err = irdma_uk_post_receive(ukqp, &post_recv); 2825 if (err) { 2826 irdma_debug(&iwqp->iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 2827 "post_recv err %d\n", 2828 err); 2829 goto out; 2830 } 2831 2832 ib_wr = ib_wr->next; 2833 } 2834 2835 out: 2836 spin_unlock_irqrestore(&iwqp->lock, flags); 2837 if (iwqp->flush_issued) 2838 irdma_sched_qp_flush_work(iwqp); 2839 2840 if (err) 2841 *bad_wr = ib_wr; 2842 2843 return err; 2844 } 2845 2846 /** 2847 * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status 2848 * @opcode: iwarp flush code 2849 */ 2850 static enum ib_wc_status 2851 irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode) 2852 { 2853 switch (opcode) { 2854 case FLUSH_PROT_ERR: 2855 return IB_WC_LOC_PROT_ERR; 2856 case FLUSH_REM_ACCESS_ERR: 2857 return IB_WC_REM_ACCESS_ERR; 2858 case FLUSH_LOC_QP_OP_ERR: 2859 return IB_WC_LOC_QP_OP_ERR; 2860 case FLUSH_REM_OP_ERR: 2861 return IB_WC_REM_OP_ERR; 2862 case FLUSH_LOC_LEN_ERR: 2863 return IB_WC_LOC_LEN_ERR; 2864 case FLUSH_GENERAL_ERR: 2865 return IB_WC_WR_FLUSH_ERR; 2866 case FLUSH_MW_BIND_ERR: 2867 return IB_WC_MW_BIND_ERR; 2868 case FLUSH_REM_INV_REQ_ERR: 2869 return IB_WC_REM_INV_REQ_ERR; 2870 case FLUSH_RETRY_EXC_ERR: 2871 return IB_WC_RETRY_EXC_ERR; 2872 case FLUSH_FATAL_ERR: 2873 default: 2874 return IB_WC_FATAL_ERR; 2875 } 2876 } 2877 2878 static inline void 2879 set_ib_wc_op_sq(struct irdma_cq_poll_info *cq_poll_info, 2880 struct ib_wc *entry) 2881 { 2882 struct irdma_sc_qp *qp; 2883 2884 switch (cq_poll_info->op_type) { 2885 case IRDMA_OP_TYPE_RDMA_WRITE: 2886 case IRDMA_OP_TYPE_RDMA_WRITE_SOL: 2887 entry->opcode = IB_WC_RDMA_WRITE; 2888 break; 2889 case IRDMA_OP_TYPE_RDMA_READ_INV_STAG: 2890 case IRDMA_OP_TYPE_RDMA_READ: 2891 entry->opcode = IB_WC_RDMA_READ; 2892 break; 2893 case IRDMA_OP_TYPE_SEND_SOL: 2894 case IRDMA_OP_TYPE_SEND_SOL_INV: 2895 case IRDMA_OP_TYPE_SEND_INV: 2896 case IRDMA_OP_TYPE_SEND: 2897 entry->opcode = IB_WC_SEND; 2898 break; 2899 case IRDMA_OP_TYPE_FAST_REG_NSMR: 2900 entry->opcode = IB_WC_REG_MR; 2901 break; 2902 case IRDMA_OP_TYPE_INV_STAG: 2903 entry->opcode = IB_WC_LOCAL_INV; 2904 break; 2905 default: 2906 qp = cq_poll_info->qp_handle; 2907 irdma_dev_err(to_ibdev(qp->dev), "Invalid opcode = %d in CQE\n", 2908 cq_poll_info->op_type); 2909 entry->status = IB_WC_GENERAL_ERR; 2910 } 2911 } 2912 2913 static inline void 2914 set_ib_wc_op_rq(struct irdma_cq_poll_info *cq_poll_info, 2915 struct ib_wc *entry, bool send_imm_support) 2916 { 2917 /** 2918 * iWARP does not support sendImm, so the presence of Imm data 2919 * must be WriteImm. 2920 */ 2921 if (!send_imm_support) { 2922 entry->opcode = cq_poll_info->imm_valid ? 2923 IB_WC_RECV_RDMA_WITH_IMM : IB_WC_RECV; 2924 return; 2925 } 2926 switch (cq_poll_info->op_type) { 2927 case IB_OPCODE_RDMA_WRITE_ONLY_WITH_IMMEDIATE: 2928 case IB_OPCODE_RDMA_WRITE_LAST_WITH_IMMEDIATE: 2929 entry->opcode = IB_WC_RECV_RDMA_WITH_IMM; 2930 break; 2931 default: 2932 entry->opcode = IB_WC_RECV; 2933 } 2934 } 2935 2936 /** 2937 * irdma_process_cqe - process cqe info 2938 * @entry: processed cqe 2939 * @cq_poll_info: cqe info 2940 */ 2941 static void 2942 irdma_process_cqe(struct ib_wc *entry, 2943 struct irdma_cq_poll_info *cq_poll_info) 2944 { 2945 struct irdma_sc_qp *qp; 2946 2947 entry->wc_flags = 0; 2948 entry->pkey_index = 0; 2949 entry->wr_id = cq_poll_info->wr_id; 2950 2951 qp = cq_poll_info->qp_handle; 2952 entry->qp = qp->qp_uk.back_qp; 2953 2954 if (cq_poll_info->error) { 2955 entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ? 2956 irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR; 2957 2958 entry->vendor_err = cq_poll_info->major_err << 16 | 2959 cq_poll_info->minor_err; 2960 } else { 2961 entry->status = IB_WC_SUCCESS; 2962 if (cq_poll_info->imm_valid) { 2963 entry->ex.imm_data = htonl(cq_poll_info->imm_data); 2964 entry->wc_flags |= IB_WC_WITH_IMM; 2965 } 2966 if (cq_poll_info->ud_smac_valid) { 2967 ether_addr_copy(entry->smac, cq_poll_info->ud_smac); 2968 entry->wc_flags |= IB_WC_WITH_SMAC; 2969 } 2970 2971 if (cq_poll_info->ud_vlan_valid) { 2972 u16 vlan = cq_poll_info->ud_vlan & EVL_VLID_MASK; 2973 2974 entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT; 2975 if (vlan) { 2976 entry->vlan_id = vlan; 2977 entry->wc_flags |= IB_WC_WITH_VLAN; 2978 } 2979 } else { 2980 entry->sl = 0; 2981 } 2982 } 2983 2984 if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) { 2985 set_ib_wc_op_sq(cq_poll_info, entry); 2986 } else { 2987 set_ib_wc_op_rq(cq_poll_info, entry, 2988 qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM ? 2989 true : false); 2990 if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD && 2991 cq_poll_info->stag_invalid_set) { 2992 entry->ex.invalidate_rkey = cq_poll_info->inv_stag; 2993 entry->wc_flags |= IB_WC_WITH_INVALIDATE; 2994 } 2995 } 2996 2997 if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) { 2998 entry->src_qp = cq_poll_info->ud_src_qpn; 2999 entry->slid = 0; 3000 entry->wc_flags |= 3001 (IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE); 3002 entry->network_hdr_type = cq_poll_info->ipv4 ? 3003 RDMA_NETWORK_IPV4 : 3004 RDMA_NETWORK_IPV6; 3005 } else { 3006 entry->src_qp = cq_poll_info->qp_id; 3007 } 3008 3009 entry->byte_len = cq_poll_info->bytes_xfered; 3010 } 3011 3012 /** 3013 * irdma_poll_one - poll one entry of the CQ 3014 * @ukcq: ukcq to poll 3015 * @cur_cqe: current CQE info to be filled in 3016 * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ 3017 * 3018 * Returns the internal irdma device error code or 0 on success 3019 */ 3020 static inline int 3021 irdma_poll_one(struct irdma_cq_uk *ukcq, 3022 struct irdma_cq_poll_info *cur_cqe, 3023 struct ib_wc *entry) 3024 { 3025 int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe); 3026 3027 if (ret) 3028 return ret; 3029 3030 irdma_process_cqe(entry, cur_cqe); 3031 3032 return 0; 3033 } 3034 3035 /** 3036 * __irdma_poll_cq - poll cq for completion (kernel apps) 3037 * @iwcq: cq to poll 3038 * @num_entries: number of entries to poll 3039 * @entry: wr of a completed entry 3040 */ 3041 static int 3042 __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry) 3043 { 3044 struct list_head *tmp_node, *list_node; 3045 struct irdma_cq_buf *last_buf = NULL; 3046 struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe; 3047 struct irdma_cq_buf *cq_buf; 3048 int ret; 3049 struct irdma_device *iwdev; 3050 struct irdma_cq_uk *ukcq; 3051 bool cq_new_cqe = false; 3052 int resized_bufs = 0; 3053 int npolled = 0; 3054 3055 iwdev = to_iwdev(iwcq->ibcq.device); 3056 ukcq = &iwcq->sc_cq.cq_uk; 3057 3058 /* go through the list of previously resized CQ buffers */ 3059 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) { 3060 cq_buf = container_of(list_node, struct irdma_cq_buf, list); 3061 while (npolled < num_entries) { 3062 ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled); 3063 if (!ret) { 3064 ++npolled; 3065 cq_new_cqe = true; 3066 continue; 3067 } 3068 if (ret == -ENOENT) 3069 break; 3070 /* QP using the CQ is destroyed. Skip reporting this CQE */ 3071 if (ret == -EFAULT) { 3072 cq_new_cqe = true; 3073 continue; 3074 } 3075 goto error; 3076 } 3077 3078 /* save the resized CQ buffer which received the last cqe */ 3079 if (cq_new_cqe) 3080 last_buf = cq_buf; 3081 cq_new_cqe = false; 3082 } 3083 3084 /* check the current CQ for new cqes */ 3085 while (npolled < num_entries) { 3086 ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled); 3087 if (ret == -ENOENT) { 3088 ret = irdma_generated_cmpls(iwcq, cur_cqe); 3089 if (!ret) 3090 irdma_process_cqe(entry + npolled, cur_cqe); 3091 } 3092 if (!ret) { 3093 ++npolled; 3094 cq_new_cqe = true; 3095 continue; 3096 } 3097 3098 if (ret == -ENOENT) 3099 break; 3100 /* QP using the CQ is destroyed. Skip reporting this CQE */ 3101 if (ret == -EFAULT) { 3102 cq_new_cqe = true; 3103 continue; 3104 } 3105 goto error; 3106 } 3107 3108 if (cq_new_cqe) 3109 /* all previous CQ resizes are complete */ 3110 resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL); 3111 else if (last_buf) 3112 /* only CQ resizes up to the last_buf are complete */ 3113 resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf); 3114 if (resized_bufs) 3115 /* report to the HW the number of complete CQ resizes */ 3116 irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs); 3117 3118 return npolled; 3119 error: 3120 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3121 "%s: Error polling CQ, irdma_err: %d\n", 3122 __func__, ret); 3123 3124 return ret; 3125 } 3126 3127 /** 3128 * irdma_poll_cq - poll cq for completion (kernel apps) 3129 * @ibcq: cq to poll 3130 * @num_entries: number of entries to poll 3131 * @entry: wr of a completed entry 3132 */ 3133 static int 3134 irdma_poll_cq(struct ib_cq *ibcq, int num_entries, 3135 struct ib_wc *entry) 3136 { 3137 struct irdma_cq *iwcq; 3138 unsigned long flags; 3139 int ret; 3140 3141 iwcq = to_iwcq(ibcq); 3142 3143 spin_lock_irqsave(&iwcq->lock, flags); 3144 ret = __irdma_poll_cq(iwcq, num_entries, entry); 3145 spin_unlock_irqrestore(&iwcq->lock, flags); 3146 3147 return ret; 3148 } 3149 3150 /** 3151 * irdma_req_notify_cq - arm cq kernel application 3152 * @ibcq: cq to arm 3153 * @notify_flags: notofication flags 3154 */ 3155 static int 3156 irdma_req_notify_cq(struct ib_cq *ibcq, 3157 enum ib_cq_notify_flags notify_flags) 3158 { 3159 struct irdma_cq *iwcq; 3160 struct irdma_cq_uk *ukcq; 3161 unsigned long flags; 3162 enum irdma_cmpl_notify cq_notify = IRDMA_CQ_COMPL_EVENT; 3163 bool promo_event = false; 3164 int ret = 0; 3165 3166 iwcq = to_iwcq(ibcq); 3167 ukcq = &iwcq->sc_cq.cq_uk; 3168 3169 spin_lock_irqsave(&iwcq->lock, flags); 3170 if (notify_flags == IB_CQ_SOLICITED) { 3171 cq_notify = IRDMA_CQ_COMPL_SOLICITED; 3172 } else { 3173 if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED) 3174 promo_event = true; 3175 } 3176 3177 if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) { 3178 iwcq->last_notify = cq_notify; 3179 irdma_uk_cq_request_notification(ukcq, cq_notify); 3180 } 3181 3182 if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) && 3183 (!irdma_cq_empty(iwcq) || !list_empty(&iwcq->cmpl_generated))) 3184 ret = 1; 3185 spin_unlock_irqrestore(&iwcq->lock, flags); 3186 3187 return ret; 3188 } 3189 3190 /** 3191 * mcast_list_add - Add a new mcast item to list 3192 * @rf: RDMA PCI function 3193 * @new_elem: pointer to element to add 3194 */ 3195 static void 3196 mcast_list_add(struct irdma_pci_f *rf, 3197 struct mc_table_list *new_elem) 3198 { 3199 list_add(&new_elem->list, &rf->mc_qht_list.list); 3200 } 3201 3202 /** 3203 * mcast_list_del - Remove an mcast item from list 3204 * @mc_qht_elem: pointer to mcast table list element 3205 */ 3206 static void 3207 mcast_list_del(struct mc_table_list *mc_qht_elem) 3208 { 3209 if (mc_qht_elem) 3210 list_del(&mc_qht_elem->list); 3211 } 3212 3213 /** 3214 * mcast_list_lookup_ip - Search mcast list for address 3215 * @rf: RDMA PCI function 3216 * @ip_mcast: pointer to mcast IP address 3217 */ 3218 static struct mc_table_list * 3219 mcast_list_lookup_ip(struct irdma_pci_f *rf, 3220 u32 *ip_mcast) 3221 { 3222 struct mc_table_list *mc_qht_el; 3223 struct list_head *pos, *q; 3224 3225 list_for_each_safe(pos, q, &rf->mc_qht_list.list) { 3226 mc_qht_el = list_entry(pos, struct mc_table_list, list); 3227 if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast, 3228 sizeof(mc_qht_el->mc_info.dest_ip))) 3229 return mc_qht_el; 3230 } 3231 3232 return NULL; 3233 } 3234 3235 /** 3236 * irdma_mcast_cqp_op - perform a mcast cqp operation 3237 * @iwdev: irdma device 3238 * @mc_grp_ctx: mcast group info 3239 * @op: operation 3240 * 3241 * returns error status 3242 */ 3243 static int 3244 irdma_mcast_cqp_op(struct irdma_device *iwdev, 3245 struct irdma_mcast_grp_info *mc_grp_ctx, u8 op) 3246 { 3247 struct cqp_cmds_info *cqp_info; 3248 struct irdma_cqp_request *cqp_request; 3249 int status; 3250 3251 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true); 3252 if (!cqp_request) 3253 return -ENOMEM; 3254 3255 cqp_request->info.in.u.mc_create.info = *mc_grp_ctx; 3256 cqp_info = &cqp_request->info; 3257 cqp_info->cqp_cmd = op; 3258 cqp_info->post_sq = 1; 3259 cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request; 3260 cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp; 3261 status = irdma_handle_cqp_op(iwdev->rf, cqp_request); 3262 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request); 3263 3264 return status; 3265 } 3266 3267 /** 3268 * irdma_attach_mcast - attach a qp to a multicast group 3269 * @ibqp: ptr to qp 3270 * @ibgid: pointer to global ID 3271 * @lid: local ID 3272 * 3273 * returns error status 3274 */ 3275 static int 3276 irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) 3277 { 3278 struct irdma_qp *iwqp = to_iwqp(ibqp); 3279 struct irdma_device *iwdev = iwqp->iwdev; 3280 struct irdma_pci_f *rf = iwdev->rf; 3281 struct mc_table_list *mc_qht_elem; 3282 struct irdma_mcast_grp_ctx_entry_info mcg_info = {0}; 3283 unsigned long flags; 3284 u32 ip_addr[4] = {0}; 3285 u32 mgn; 3286 u32 no_mgs; 3287 int ret = 0; 3288 bool ipv4; 3289 u16 vlan_id; 3290 union { 3291 struct sockaddr saddr; 3292 struct sockaddr_in saddr_in; 3293 struct sockaddr_in6 saddr_in6; 3294 } sgid_addr; 3295 unsigned char dmac[ETH_ALEN]; 3296 3297 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid); 3298 3299 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) { 3300 irdma_copy_ip_ntohl(ip_addr, 3301 sgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32); 3302 irdma_netdev_vlan_ipv6(ip_addr, &vlan_id, NULL); 3303 ipv4 = false; 3304 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3305 "qp_id=%d, IP6address=%pI6\n", 3306 ibqp->qp_num, 3307 ip_addr); 3308 irdma_mcast_mac_v6(ip_addr, dmac); 3309 } else { 3310 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr); 3311 ipv4 = true; 3312 vlan_id = irdma_get_vlan_ipv4(ip_addr); 3313 irdma_mcast_mac_v4(ip_addr, dmac); 3314 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, 3315 "qp_id=%d, IP4address=%pI4, MAC=%pM\n", 3316 ibqp->qp_num, ip_addr, dmac); 3317 } 3318 3319 spin_lock_irqsave(&rf->qh_list_lock, flags); 3320 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr); 3321 if (!mc_qht_elem) { 3322 struct irdma_dma_mem *dma_mem_mc; 3323 3324 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3325 mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL); 3326 if (!mc_qht_elem) 3327 return -ENOMEM; 3328 3329 mc_qht_elem->mc_info.ipv4_valid = ipv4; 3330 memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr, 3331 sizeof(mc_qht_elem->mc_info.dest_ip)); 3332 ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg, 3333 &mgn, &rf->next_mcg); 3334 if (ret) { 3335 kfree(mc_qht_elem); 3336 return -ENOMEM; 3337 } 3338 3339 mc_qht_elem->mc_info.mgn = mgn; 3340 dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc; 3341 dma_mem_mc->size = sizeof(u64)* IRDMA_MAX_MGS_PER_CTX; 3342 dma_mem_mc->va = irdma_allocate_dma_mem(&rf->hw, dma_mem_mc, 3343 dma_mem_mc->size, 3344 IRDMA_HW_PAGE_SIZE); 3345 if (!dma_mem_mc->va) { 3346 irdma_free_rsrc(rf, rf->allocated_mcgs, mgn); 3347 kfree(mc_qht_elem); 3348 return -ENOMEM; 3349 } 3350 3351 mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn; 3352 memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr, 3353 sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr)); 3354 mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4; 3355 mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id; 3356 if (vlan_id < VLAN_N_VID) 3357 mc_qht_elem->mc_grp_ctx.vlan_valid = true; 3358 mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->rf->sc_dev.hmc_fn_id; 3359 mc_qht_elem->mc_grp_ctx.qs_handle = 3360 iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle; 3361 ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac); 3362 3363 spin_lock_irqsave(&rf->qh_list_lock, flags); 3364 mcast_list_add(rf, mc_qht_elem); 3365 } else { 3366 if (mc_qht_elem->mc_grp_ctx.no_of_mgs == 3367 IRDMA_MAX_MGS_PER_CTX) { 3368 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3369 return -ENOMEM; 3370 } 3371 } 3372 3373 mcg_info.qp_id = iwqp->ibqp.qp_num; 3374 no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs; 3375 irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 3376 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3377 3378 /* Only if there is a change do we need to modify or create */ 3379 if (!no_mgs) { 3380 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3381 IRDMA_OP_MC_CREATE); 3382 } else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) { 3383 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3384 IRDMA_OP_MC_MODIFY); 3385 } else { 3386 return 0; 3387 } 3388 3389 if (ret) 3390 goto error; 3391 3392 return 0; 3393 3394 error: 3395 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 3396 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) { 3397 mcast_list_del(mc_qht_elem); 3398 irdma_free_dma_mem(&rf->hw, 3399 &mc_qht_elem->mc_grp_ctx.dma_mem_mc); 3400 irdma_free_rsrc(rf, rf->allocated_mcgs, 3401 mc_qht_elem->mc_grp_ctx.mg_id); 3402 kfree(mc_qht_elem); 3403 } 3404 3405 return ret; 3406 } 3407 3408 /** 3409 * irdma_detach_mcast - detach a qp from a multicast group 3410 * @ibqp: ptr to qp 3411 * @ibgid: pointer to global ID 3412 * @lid: local ID 3413 * 3414 * returns error status 3415 */ 3416 static int 3417 irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid) 3418 { 3419 struct irdma_qp *iwqp = to_iwqp(ibqp); 3420 struct irdma_device *iwdev = iwqp->iwdev; 3421 struct irdma_pci_f *rf = iwdev->rf; 3422 u32 ip_addr[4] = {0}; 3423 struct mc_table_list *mc_qht_elem; 3424 struct irdma_mcast_grp_ctx_entry_info mcg_info = {0}; 3425 int ret; 3426 unsigned long flags; 3427 union { 3428 struct sockaddr saddr; 3429 struct sockaddr_in saddr_in; 3430 struct sockaddr_in6 saddr_in6; 3431 } sgid_addr; 3432 3433 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid); 3434 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) 3435 irdma_copy_ip_ntohl(ip_addr, 3436 sgid_addr.saddr_in6.sin6_addr.__u6_addr.__u6_addr32); 3437 else 3438 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr); 3439 3440 spin_lock_irqsave(&rf->qh_list_lock, flags); 3441 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr); 3442 if (!mc_qht_elem) { 3443 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3444 irdma_debug(&iwdev->rf->sc_dev, 3445 IRDMA_DEBUG_VERBS, "address not found MCG\n"); 3446 return 0; 3447 } 3448 3449 mcg_info.qp_id = iwqp->ibqp.qp_num; 3450 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info); 3451 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) { 3452 mcast_list_del(mc_qht_elem); 3453 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3454 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3455 IRDMA_OP_MC_DESTROY); 3456 if (ret) { 3457 irdma_debug(&iwdev->rf->sc_dev, 3458 IRDMA_DEBUG_VERBS, "failed MC_DESTROY MCG\n"); 3459 spin_lock_irqsave(&rf->qh_list_lock, flags); 3460 mcast_list_add(rf, mc_qht_elem); 3461 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3462 return -EAGAIN; 3463 } 3464 3465 irdma_free_dma_mem(&rf->hw, 3466 &mc_qht_elem->mc_grp_ctx.dma_mem_mc); 3467 irdma_free_rsrc(rf, rf->allocated_mcgs, 3468 mc_qht_elem->mc_grp_ctx.mg_id); 3469 kfree(mc_qht_elem); 3470 } else { 3471 spin_unlock_irqrestore(&rf->qh_list_lock, flags); 3472 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx, 3473 IRDMA_OP_MC_MODIFY); 3474 if (ret) { 3475 irdma_debug(&iwdev->rf->sc_dev, 3476 IRDMA_DEBUG_VERBS, "failed Modify MCG\n"); 3477 return ret; 3478 } 3479 } 3480 3481 return 0; 3482 } 3483 3484 /** 3485 * irdma_query_ah - Query address handle 3486 * @ibah: pointer to address handle 3487 * @ah_attr: address handle attributes 3488 */ 3489 static int 3490 irdma_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr) 3491 { 3492 struct irdma_ah *ah = to_iwah(ibah); 3493 3494 memset(ah_attr, 0, sizeof(*ah_attr)); 3495 if (ah->av.attrs.ah_flags & IB_AH_GRH) { 3496 ah_attr->ah_flags = IB_AH_GRH; 3497 ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label; 3498 ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos; 3499 ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl; 3500 ah_attr->grh.sgid_index = ah->sgid_index; 3501 ah_attr->grh.sgid_index = ah->sgid_index; 3502 memcpy(&ah_attr->grh.dgid, &ah->dgid, 3503 sizeof(ah_attr->grh.dgid)); 3504 } 3505 3506 return 0; 3507 } 3508 3509 static if_t 3510 irdma_get_netdev(struct ib_device *ibdev, u8 port_num) 3511 { 3512 struct irdma_device *iwdev = to_iwdev(ibdev); 3513 3514 if (iwdev->netdev) { 3515 dev_hold(iwdev->netdev); 3516 return iwdev->netdev; 3517 } 3518 3519 return NULL; 3520 } 3521 3522 static void 3523 irdma_set_device_ops(struct ib_device *ibdev) 3524 { 3525 struct ib_device *dev_ops = ibdev; 3526 3527 #if __FreeBSD_version >= 1400000 3528 dev_ops->ops.driver_id = RDMA_DRIVER_I40IW; 3529 dev_ops->ops.size_ib_ah = IRDMA_SET_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah); 3530 dev_ops->ops.size_ib_cq = IRDMA_SET_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq); 3531 dev_ops->ops.size_ib_pd = IRDMA_SET_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd); 3532 dev_ops->ops.size_ib_ucontext = IRDMA_SET_RDMA_OBJ_SIZE(ib_ucontext, 3533 irdma_ucontext, 3534 ibucontext); 3535 3536 #endif /* __FreeBSD_version >= 1400000 */ 3537 dev_ops->alloc_hw_stats = irdma_alloc_hw_stats; 3538 dev_ops->alloc_mr = irdma_alloc_mr; 3539 dev_ops->alloc_mw = irdma_alloc_mw; 3540 dev_ops->alloc_pd = irdma_alloc_pd; 3541 dev_ops->alloc_ucontext = irdma_alloc_ucontext; 3542 dev_ops->create_cq = irdma_create_cq; 3543 dev_ops->create_qp = irdma_create_qp; 3544 dev_ops->dealloc_mw = irdma_dealloc_mw; 3545 dev_ops->dealloc_pd = irdma_dealloc_pd; 3546 dev_ops->dealloc_ucontext = irdma_dealloc_ucontext; 3547 dev_ops->dereg_mr = irdma_dereg_mr; 3548 dev_ops->destroy_cq = irdma_destroy_cq; 3549 dev_ops->destroy_qp = irdma_destroy_qp; 3550 dev_ops->disassociate_ucontext = irdma_disassociate_ucontext; 3551 dev_ops->get_dev_fw_str = irdma_get_dev_fw_str; 3552 dev_ops->get_dma_mr = irdma_get_dma_mr; 3553 dev_ops->get_hw_stats = irdma_get_hw_stats; 3554 dev_ops->get_netdev = irdma_get_netdev; 3555 dev_ops->map_mr_sg = irdma_map_mr_sg; 3556 dev_ops->mmap = irdma_mmap; 3557 #if __FreeBSD_version >= 1400026 3558 dev_ops->mmap_free = irdma_mmap_free; 3559 #endif 3560 dev_ops->poll_cq = irdma_poll_cq; 3561 dev_ops->post_recv = irdma_post_recv; 3562 dev_ops->post_send = irdma_post_send; 3563 dev_ops->query_device = irdma_query_device; 3564 dev_ops->query_port = irdma_query_port; 3565 dev_ops->modify_port = irdma_modify_port; 3566 dev_ops->query_qp = irdma_query_qp; 3567 dev_ops->reg_user_mr = irdma_reg_user_mr; 3568 dev_ops->rereg_user_mr = irdma_rereg_user_mr; 3569 dev_ops->req_notify_cq = irdma_req_notify_cq; 3570 dev_ops->resize_cq = irdma_resize_cq; 3571 } 3572 3573 static void 3574 irdma_set_device_mcast_ops(struct ib_device *ibdev) 3575 { 3576 struct ib_device *dev_ops = ibdev; 3577 dev_ops->attach_mcast = irdma_attach_mcast; 3578 dev_ops->detach_mcast = irdma_detach_mcast; 3579 } 3580 3581 static void 3582 irdma_set_device_roce_ops(struct ib_device *ibdev) 3583 { 3584 struct ib_device *dev_ops = ibdev; 3585 dev_ops->create_ah = irdma_create_ah; 3586 dev_ops->destroy_ah = irdma_destroy_ah; 3587 dev_ops->get_link_layer = irdma_get_link_layer; 3588 dev_ops->get_port_immutable = irdma_roce_port_immutable; 3589 dev_ops->modify_qp = irdma_modify_qp_roce; 3590 dev_ops->query_ah = irdma_query_ah; 3591 dev_ops->query_gid = irdma_query_gid_roce; 3592 dev_ops->query_pkey = irdma_query_pkey; 3593 ibdev->add_gid = irdma_add_gid; 3594 ibdev->del_gid = irdma_del_gid; 3595 } 3596 3597 static void 3598 irdma_set_device_iw_ops(struct ib_device *ibdev) 3599 { 3600 struct ib_device *dev_ops = ibdev; 3601 3602 ibdev->uverbs_cmd_mask |= 3603 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 3604 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 3605 3606 dev_ops->create_ah = irdma_create_ah_stub; 3607 dev_ops->destroy_ah = irdma_destroy_ah_stub; 3608 dev_ops->get_port_immutable = irdma_iw_port_immutable; 3609 dev_ops->modify_qp = irdma_modify_qp; 3610 dev_ops->query_gid = irdma_query_gid; 3611 dev_ops->query_pkey = irdma_iw_query_pkey; 3612 } 3613 3614 static inline void 3615 irdma_set_device_gen1_ops(struct ib_device *ibdev) 3616 { 3617 } 3618 3619 /** 3620 * irdma_init_roce_device - initialization of roce rdma device 3621 * @iwdev: irdma device 3622 */ 3623 static void 3624 irdma_init_roce_device(struct irdma_device *iwdev) 3625 { 3626 kc_set_roce_uverbs_cmd_mask(iwdev); 3627 iwdev->ibdev.node_type = RDMA_NODE_IB_CA; 3628 addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid, 3629 if_getlladdr(iwdev->netdev)); 3630 irdma_set_device_roce_ops(&iwdev->ibdev); 3631 if (iwdev->rf->rdma_ver == IRDMA_GEN_2) 3632 irdma_set_device_mcast_ops(&iwdev->ibdev); 3633 } 3634 3635 /** 3636 * irdma_init_iw_device - initialization of iwarp rdma device 3637 * @iwdev: irdma device 3638 */ 3639 static int 3640 irdma_init_iw_device(struct irdma_device *iwdev) 3641 { 3642 if_t netdev = iwdev->netdev; 3643 3644 iwdev->ibdev.node_type = RDMA_NODE_RNIC; 3645 addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid, 3646 if_getlladdr(netdev)); 3647 iwdev->ibdev.iwcm = kzalloc(sizeof(*iwdev->ibdev.iwcm), GFP_KERNEL); 3648 if (!iwdev->ibdev.iwcm) 3649 return -ENOMEM; 3650 3651 iwdev->ibdev.iwcm->add_ref = irdma_qp_add_ref; 3652 iwdev->ibdev.iwcm->rem_ref = irdma_qp_rem_ref; 3653 iwdev->ibdev.iwcm->get_qp = irdma_get_qp; 3654 iwdev->ibdev.iwcm->connect = irdma_connect; 3655 iwdev->ibdev.iwcm->accept = irdma_accept; 3656 iwdev->ibdev.iwcm->reject = irdma_reject; 3657 iwdev->ibdev.iwcm->create_listen = irdma_create_listen; 3658 iwdev->ibdev.iwcm->destroy_listen = irdma_destroy_listen; 3659 memcpy(iwdev->ibdev.iwcm->ifname, if_name(netdev), 3660 sizeof(iwdev->ibdev.iwcm->ifname)); 3661 irdma_set_device_iw_ops(&iwdev->ibdev); 3662 3663 return 0; 3664 } 3665 3666 /** 3667 * irdma_init_rdma_device - initialization of rdma device 3668 * @iwdev: irdma device 3669 */ 3670 static int 3671 irdma_init_rdma_device(struct irdma_device *iwdev) 3672 { 3673 int ret; 3674 3675 iwdev->ibdev.owner = THIS_MODULE; 3676 iwdev->ibdev.uverbs_abi_ver = IRDMA_ABI_VER; 3677 kc_set_rdma_uverbs_cmd_mask(iwdev); 3678 3679 if (iwdev->roce_mode) { 3680 irdma_init_roce_device(iwdev); 3681 } else { 3682 ret = irdma_init_iw_device(iwdev); 3683 if (ret) 3684 return ret; 3685 } 3686 3687 iwdev->ibdev.phys_port_cnt = 1; 3688 iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count; 3689 iwdev->ibdev.dev.parent = iwdev->rf->dev_ctx.dev; 3690 set_ibdev_dma_device(iwdev->ibdev, &iwdev->rf->pcidev->dev); 3691 irdma_set_device_ops(&iwdev->ibdev); 3692 if (iwdev->rf->rdma_ver == IRDMA_GEN_1) 3693 irdma_set_device_gen1_ops(&iwdev->ibdev); 3694 3695 return 0; 3696 } 3697 3698 /** 3699 * irdma_port_ibevent - indicate port event 3700 * @iwdev: irdma device 3701 */ 3702 void 3703 irdma_port_ibevent(struct irdma_device *iwdev) 3704 { 3705 struct ib_event event; 3706 3707 event.device = &iwdev->ibdev; 3708 event.element.port_num = 1; 3709 event.event = 3710 iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3711 ib_dispatch_event(&event); 3712 } 3713 3714 /** 3715 * irdma_ib_unregister_device - unregister rdma device from IB 3716 * core 3717 * @iwdev: irdma device 3718 */ 3719 void 3720 irdma_ib_unregister_device(struct irdma_device *iwdev) 3721 { 3722 iwdev->iw_status = 0; 3723 irdma_port_ibevent(iwdev); 3724 ib_unregister_device(&iwdev->ibdev); 3725 dev_put(iwdev->netdev); 3726 kfree(iwdev->ibdev.iwcm); 3727 iwdev->ibdev.iwcm = NULL; 3728 } 3729 3730 /** 3731 * irdma_ib_register_device - register irdma device to IB core 3732 * @iwdev: irdma device 3733 */ 3734 int 3735 irdma_ib_register_device(struct irdma_device *iwdev) 3736 { 3737 int ret; 3738 3739 ret = irdma_init_rdma_device(iwdev); 3740 if (ret) 3741 return ret; 3742 3743 dev_hold(iwdev->netdev); 3744 sprintf(iwdev->ibdev.name, "irdma-%s", if_name(iwdev->netdev)); 3745 ret = ib_register_device(&iwdev->ibdev, NULL); 3746 if (ret) 3747 goto error; 3748 3749 iwdev->iw_status = 1; 3750 irdma_port_ibevent(iwdev); 3751 3752 return 0; 3753 3754 error: 3755 kfree(iwdev->ibdev.iwcm); 3756 iwdev->ibdev.iwcm = NULL; 3757 irdma_debug(&iwdev->rf->sc_dev, IRDMA_DEBUG_VERBS, "Register RDMA device fail\n"); 3758 3759 return ret; 3760 } 3761