1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2022 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 /*$FreeBSD$*/ 35 36 #ifndef IRDMA_PUDA_H 37 #define IRDMA_PUDA_H 38 39 #define IRDMA_IEQ_MPA_FRAMING 6 40 #define IRDMA_TCP_OFFSET 40 41 #define IRDMA_IPV4_PAD 20 42 #define IRDMA_MRK_BLK_SZ 512 43 44 enum puda_rsrc_type { 45 IRDMA_PUDA_RSRC_TYPE_ILQ = 1, 46 IRDMA_PUDA_RSRC_TYPE_IEQ, 47 IRDMA_PUDA_RSRC_TYPE_MAX, /* Must be last entry */ 48 }; 49 50 enum puda_rsrc_complete { 51 PUDA_CQ_CREATED = 1, 52 PUDA_QP_CREATED, 53 PUDA_TX_COMPLETE, 54 PUDA_RX_COMPLETE, 55 PUDA_HASH_CRC_COMPLETE, 56 }; 57 58 struct irdma_sc_dev; 59 struct irdma_sc_qp; 60 struct irdma_sc_cq; 61 62 struct irdma_puda_cmpl_info { 63 struct irdma_qp_uk *qp; 64 u8 q_type; 65 u8 l3proto; 66 u8 l4proto; 67 u16 vlan; 68 u32 payload_len; 69 u32 compl_error; /* No_err=0, else major and minor err code */ 70 u32 qp_id; 71 u32 wqe_idx; 72 bool ipv4:1; 73 bool smac_valid:1; 74 bool vlan_valid:1; 75 u8 smac[ETH_ALEN]; 76 }; 77 78 struct irdma_puda_send_info { 79 u64 paddr; /* Physical address */ 80 u32 len; 81 u32 ah_id; 82 u8 tcplen; 83 u8 maclen; 84 bool ipv4:1; 85 bool do_lpb:1; 86 void *scratch; 87 }; 88 89 struct irdma_puda_buf { 90 struct list_head list; /* MUST be first entry */ 91 struct irdma_dma_mem mem; /* DMA memory for the buffer */ 92 struct irdma_puda_buf *next; /* for alloclist in rsrc struct */ 93 struct irdma_virt_mem buf_mem; /* Buffer memory for this buffer */ 94 void *scratch; 95 u8 *iph; 96 u8 *tcph; 97 u8 *data; 98 u16 datalen; 99 u16 vlan_id; 100 u8 tcphlen; /* tcp length in bytes */ 101 u8 maclen; /* mac length in bytes */ 102 u32 totallen; /* machlen+iphlen+tcphlen+datalen */ 103 atomic_t refcount; 104 u8 hdrlen; 105 bool virtdma:1; 106 bool ipv4:1; 107 bool vlan_valid:1; 108 bool do_lpb:1; /* Loopback buffer */ 109 bool smac_valid:1; 110 u32 seqnum; 111 u32 ah_id; 112 u8 smac[ETH_ALEN]; 113 struct irdma_sc_vsi *vsi; 114 }; 115 116 struct irdma_puda_rsrc_info { 117 void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf); 118 void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid); 119 enum puda_rsrc_type type; /* ILQ or IEQ */ 120 u32 count; 121 u32 pd_id; 122 u32 cq_id; 123 u32 qp_id; 124 u32 sq_size; 125 u32 rq_size; 126 u32 tx_buf_cnt; /* total bufs allocated will be rq_size + tx_buf_cnt */ 127 u16 buf_size; 128 u16 mss; /* FIXME: Windows driver still using this */ 129 u16 stats_idx; 130 bool stats_idx_valid:1; 131 int abi_ver; 132 }; 133 134 struct irdma_puda_rsrc { 135 struct irdma_sc_cq cq; 136 struct irdma_sc_qp qp; 137 struct irdma_sc_pd sc_pd; 138 struct irdma_sc_dev *dev; 139 struct irdma_sc_vsi *vsi; 140 struct irdma_dma_mem cqmem; 141 struct irdma_dma_mem qpmem; 142 struct irdma_virt_mem ilq_mem; 143 enum puda_rsrc_complete cmpl; 144 enum puda_rsrc_type type; 145 u16 buf_size; /*buf must be max datalen + tcpip hdr + mac */ 146 u32 cq_id; 147 u32 qp_id; 148 u32 sq_size; 149 u32 rq_size; 150 u32 cq_size; 151 struct irdma_sq_uk_wr_trk_info *sq_wrtrk_array; 152 u64 *rq_wrid_array; 153 u32 compl_rxwqe_idx; 154 u32 rx_wqe_idx; 155 u32 rxq_invalid_cnt; 156 u32 tx_wqe_avail_cnt; 157 void *hash_desc; 158 struct list_head txpend; 159 struct list_head bufpool; /* free buffers pool list for recv and xmit */ 160 u32 alloc_buf_count; 161 u32 avail_buf_count; /* snapshot of currently available buffers */ 162 spinlock_t bufpool_lock; 163 struct irdma_puda_buf *alloclist; 164 void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf); 165 void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid); 166 /* puda stats */ 167 u64 stats_buf_alloc_fail; 168 u64 stats_pkt_rcvd; 169 u64 stats_pkt_sent; 170 u64 stats_rcvd_pkt_err; 171 u64 stats_sent_pkt_q; 172 u64 stats_bad_qp_id; 173 /* IEQ stats */ 174 u64 fpdu_processed; 175 u64 bad_seq_num; 176 u64 crc_err; 177 u64 pmode_count; 178 u64 partials_handled; 179 u16 mss; /* FIXME: Windows driver still using this */ 180 u16 stats_idx; 181 bool check_crc:1; 182 bool stats_idx_valid:1; 183 }; 184 185 struct irdma_puda_buf *irdma_puda_get_bufpool(struct irdma_puda_rsrc *rsrc); 186 void irdma_puda_ret_bufpool(struct irdma_puda_rsrc *rsrc, 187 struct irdma_puda_buf *buf); 188 void irdma_puda_send_buf(struct irdma_puda_rsrc *rsrc, 189 struct irdma_puda_buf *buf); 190 int irdma_puda_send(struct irdma_sc_qp *qp, struct irdma_puda_send_info *info); 191 int irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi, 192 struct irdma_puda_rsrc_info *info); 193 void irdma_puda_dele_rsrc(struct irdma_sc_vsi *vsi, enum puda_rsrc_type type, 194 bool reset); 195 int irdma_puda_poll_cmpl(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq, 196 u32 *compl_err); 197 198 struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev, 199 struct irdma_puda_buf *buf); 200 int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info, 201 struct irdma_puda_buf *buf); 202 int irdma_ieq_check_mpacrc(void *desc, void *addr, u32 len, u32 val); 203 int irdma_init_hash_desc(void **desc); 204 void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 205 void irdma_free_hash_desc(void *desc); 206 void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, u32 seqnum); 207 int irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 208 int irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq); 209 int irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 210 void irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq); 211 void irdma_puda_ieq_get_ah_info(struct irdma_sc_qp *qp, 212 struct irdma_ah_info *ah_info); 213 int irdma_puda_create_ah(struct irdma_sc_dev *dev, 214 struct irdma_ah_info *ah_info, bool wait, 215 enum puda_rsrc_type type, void *cb_param, 216 struct irdma_sc_ah **ah); 217 void irdma_puda_free_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah); 218 void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp, 219 struct irdma_puda_rsrc *ieq); 220 void irdma_ieq_cleanup_qp(struct irdma_puda_rsrc *ieq, struct irdma_sc_qp *qp); 221 #endif /*IRDMA_PROTOS_H */ 222