1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2023 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef IRDMA_MAIN_H 36 #define IRDMA_MAIN_H 37 38 #include <linux/in.h> 39 #include <netinet/ip6.h> 40 #include <netinet/udp.h> 41 #include <netinet/tcp.h> 42 #include <sys/rman.h> 43 #include <sys/socket.h> 44 #include <netinet/if_ether.h> 45 #include <linux/slab.h> 46 #include <linux/rculist.h> 47 #include <rdma/uverbs_ioctl.h> 48 #include <rdma/ib_smi.h> 49 #include <rdma/ib_verbs.h> 50 #include <rdma/ib_pack.h> 51 #include <rdma/rdma_cm.h> 52 #include <rdma/iw_cm.h> 53 #include <rdma/ib_user_verbs.h> 54 #include <rdma/ib_umem.h> 55 #include <rdma/ib_cache.h> 56 #include "osdep.h" 57 #include "irdma_defs.h" 58 #include "irdma_hmc.h" 59 #include "irdma_type.h" 60 #include "irdma_ws.h" 61 #include "irdma_protos.h" 62 #include "irdma_pble.h" 63 #include "irdma_cm.h" 64 #include "fbsd_kcompat.h" 65 #include "irdma-abi.h" 66 #include "irdma_verbs.h" 67 #include "irdma_user.h" 68 #include "irdma_puda.h" 69 70 extern struct list_head irdma_handlers; 71 extern spinlock_t irdma_handler_lock; 72 extern bool irdma_upload_context; 73 74 #define IRDMA_FW_VER_DEFAULT 2 75 #define IRDMA_HW_VER 2 76 77 #define IRDMA_ARP_ADD 1 78 #define IRDMA_ARP_DELETE 2 79 #define IRDMA_ARP_RESOLVE 3 80 81 #define IRDMA_MACIP_ADD 1 82 #define IRDMA_MACIP_DELETE 2 83 84 #define IW_CCQ_SIZE (IRDMA_CQP_SW_SQSIZE_2048 + 1) 85 #define IW_CEQ_SIZE 2048 86 #define IW_AEQ_SIZE 2048 87 88 #define RX_BUF_SIZE (1536 + 8) 89 #define IW_REG0_SIZE (4 * 1024) 90 #define IW_TX_TIMEOUT (6 * HZ) 91 #define IW_FIRST_QPN 1 92 93 #define IW_SW_CONTEXT_ALIGN 1024 94 95 #define MAX_DPC_ITERATIONS 128 96 97 #define IRDMA_EVENT_TIMEOUT_MS 5000 98 #define IRDMA_VCHNL_EVENT_TIMEOUT_MS 10000 99 #define IRDMA_RST_TIMEOUT_HZ 4 100 101 #define IRDMA_NO_QSET 0xffff 102 103 #define IW_CFG_FPM_QP_COUNT 32768 104 #define IRDMA_MAX_PAGES_PER_FMR 262144 105 #define IRDMA_MIN_PAGES_PER_FMR 1 106 #define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED 2 107 #define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED 3 108 109 #define IRDMA_Q_TYPE_PE_AEQ 0x80 110 #define IRDMA_Q_INVALID_IDX 0xffff 111 #define IRDMA_REM_ENDPOINT_TRK_QPID 3 112 113 #define IRDMA_DRV_OPT_ENA_MPA_VER_0 0x00000001 114 #define IRDMA_DRV_OPT_DISABLE_MPA_CRC 0x00000002 115 #define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004 116 #define IRDMA_DRV_OPT_DISABLE_INTF 0x00000008 117 #define IRDMA_DRV_OPT_ENA_MSI 0x00000010 118 #define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020 119 #define IRDMA_DRV_OPT_NO_INLINE_DATA 0x00000080 120 #define IRDMA_DRV_OPT_DISABLE_INT_MOD 0x00000100 121 #define IRDMA_DRV_OPT_DISABLE_VIRT_WQ 0x00000200 122 #define IRDMA_DRV_OPT_ENA_PAU 0x00000400 123 #define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800 124 125 #define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types) 126 #define IRDMA_ROCE_CWND_DEFAULT 0x400 127 #define IRDMA_ROCE_ACKCREDS_DEFAULT 0x1E 128 129 #define IRDMA_FLUSH_SQ BIT(0) 130 #define IRDMA_FLUSH_RQ BIT(1) 131 #define IRDMA_REFLUSH BIT(2) 132 #define IRDMA_FLUSH_WAIT BIT(3) 133 134 #define IRDMA_IRQ_NAME_STR_LEN 64 135 136 enum init_completion_state { 137 INVALID_STATE = 0, 138 INITIAL_STATE, 139 CQP_CREATED, 140 HMC_OBJS_CREATED, 141 HW_RSRC_INITIALIZED, 142 CCQ_CREATED, 143 CEQ0_CREATED, /* Last state of probe */ 144 ILQ_CREATED, 145 IEQ_CREATED, 146 REM_ENDPOINT_TRK_CREATED, 147 CEQS_CREATED, 148 PBLE_CHUNK_MEM, 149 AEQ_CREATED, 150 IP_ADDR_REGISTERED, /* Last state of open */ 151 }; 152 153 struct ae_desc { 154 u16 id; 155 const char *desc; 156 }; 157 158 struct irdma_rsrc_limits { 159 u32 qplimit; 160 u32 mrlimit; 161 u32 cqlimit; 162 }; 163 164 struct irdma_cqp_err_info { 165 u16 maj; 166 u16 min; 167 const char *desc; 168 }; 169 170 struct irdma_cqp_compl_info { 171 u32 op_ret_val; 172 u16 maj_err_code; 173 u16 min_err_code; 174 bool error; 175 u8 op_code; 176 }; 177 178 struct irdma_cqp_request { 179 struct cqp_cmds_info info; 180 wait_queue_head_t waitq; 181 struct list_head list; 182 atomic_t refcnt; 183 void (*callback_fcn)(struct irdma_cqp_request *cqp_request); 184 void *param; 185 struct irdma_cqp_compl_info compl_info; 186 u8 request_done; /* READ/WRITE_ONCE macros operate on it */ 187 bool waiting:1; 188 bool dynamic:1; 189 }; 190 191 struct irdma_cqp { 192 struct irdma_sc_cqp sc_cqp; 193 spinlock_t req_lock; /* protect CQP request list */ 194 spinlock_t compl_lock; /* protect CQP completion processing */ 195 wait_queue_head_t waitq; 196 wait_queue_head_t remove_wq; 197 struct irdma_dma_mem sq; 198 struct irdma_dma_mem host_ctx; 199 u64 *scratch_array; 200 struct irdma_cqp_request *cqp_requests; 201 struct list_head cqp_avail_reqs; 202 struct list_head cqp_pending_reqs; 203 }; 204 205 struct irdma_ccq { 206 struct irdma_sc_cq sc_cq; 207 struct irdma_dma_mem mem_cq; 208 struct irdma_dma_mem shadow_area; 209 }; 210 211 struct irdma_ceq { 212 struct irdma_sc_ceq sc_ceq; 213 struct irdma_dma_mem mem; 214 u32 irq; 215 u32 msix_idx; 216 struct irdma_pci_f *rf; 217 struct tasklet_struct dpc_tasklet; 218 spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */ 219 }; 220 221 struct irdma_aeq { 222 struct irdma_sc_aeq sc_aeq; 223 struct irdma_dma_mem mem; 224 struct irdma_pble_alloc palloc; 225 bool virtual_map; 226 }; 227 228 struct irdma_arp_entry { 229 u32 ip_addr[4]; 230 u8 mac_addr[ETHER_ADDR_LEN]; 231 }; 232 233 struct irdma_msix_vector { 234 u32 idx; 235 u32 irq; 236 u32 cpu_affinity; 237 u16 ceq_id; 238 char name[IRDMA_IRQ_NAME_STR_LEN]; 239 struct resource *res; 240 void *tag; 241 }; 242 243 struct irdma_mc_table_info { 244 u32 mgn; 245 u32 dest_ip[4]; 246 bool lan_fwd:1; 247 bool ipv4_valid:1; 248 }; 249 250 struct mc_table_list { 251 struct list_head list; 252 struct irdma_mc_table_info mc_info; 253 struct irdma_mcast_grp_info mc_grp_ctx; 254 }; 255 256 struct irdma_qv_info { 257 u32 v_idx; /* msix_vector */ 258 u16 ceq_idx; 259 u16 aeq_idx; 260 u8 itr_idx; 261 }; 262 263 struct irdma_qvlist_info { 264 u32 num_vectors; 265 struct irdma_qv_info qv_info[1]; 266 }; 267 268 struct irdma_gen_ops { 269 void (*request_reset)(struct irdma_pci_f *rf); 270 int (*register_qset)(struct irdma_sc_vsi *vsi, 271 struct irdma_ws_node *tc_node); 272 void (*unregister_qset)(struct irdma_sc_vsi *vsi, 273 struct irdma_ws_node *tc_node); 274 }; 275 276 struct irdma_pci_f { 277 bool reset:1; 278 bool rsrc_created:1; 279 bool msix_shared:1; 280 bool ftype:1; 281 u8 rsrc_profile; 282 u8 *hmc_info_mem; 283 u8 *mem_rsrc; 284 u8 rdma_ver; 285 u8 rst_to; 286 /* Not used in SRIOV VF mode */ 287 u8 pf_id; 288 enum irdma_protocol_used protocol_used; 289 bool en_rem_endpoint_trk:1; 290 bool dcqcn_ena:1; 291 u32 sd_type; 292 u32 msix_count; 293 u32 max_mr; 294 u32 max_qp; 295 u32 max_cq; 296 u32 max_ah; 297 u32 next_ah; 298 u32 max_mcg; 299 u32 next_mcg; 300 u32 max_pd; 301 u32 next_qp; 302 u32 next_cq; 303 u32 next_pd; 304 u32 max_mr_size; 305 u32 max_cqe; 306 u32 mr_stagmask; 307 u32 used_pds; 308 u32 used_cqs; 309 u32 used_mrs; 310 u32 used_qps; 311 u32 arp_table_size; 312 u32 next_arp_index; 313 u32 ceqs_count; 314 u32 next_ws_node_id; 315 u32 max_ws_node_id; 316 u32 limits_sel; 317 unsigned long *allocated_ws_nodes; 318 unsigned long *allocated_qps; 319 unsigned long *allocated_cqs; 320 unsigned long *allocated_mrs; 321 unsigned long *allocated_pds; 322 unsigned long *allocated_mcgs; 323 unsigned long *allocated_ahs; 324 unsigned long *allocated_arps; 325 enum init_completion_state init_state; 326 struct irdma_sc_dev sc_dev; 327 struct irdma_dev_ctx dev_ctx; 328 struct irdma_tunable_info tun_info; 329 eventhandler_tag irdma_ifaddr_event; 330 struct irdma_handler *hdl; 331 struct pci_dev *pcidev; 332 struct ice_rdma_peer *peer_info; 333 struct irdma_hw hw; 334 struct irdma_cqp cqp; 335 struct irdma_ccq ccq; 336 struct irdma_aeq aeq; 337 struct irdma_ceq *ceqlist; 338 struct irdma_hmc_pble_rsrc *pble_rsrc; 339 struct irdma_arp_entry *arp_table; 340 spinlock_t arp_lock; /*protect ARP table access*/ 341 spinlock_t rsrc_lock; /* protect HW resource array access */ 342 spinlock_t qptable_lock; /*protect QP table access*/ 343 spinlock_t cqtable_lock; /*protect CQ table access*/ 344 struct irdma_qp **qp_table; 345 struct irdma_cq **cq_table; 346 spinlock_t qh_list_lock; /* protect mc_qht_list */ 347 struct mc_table_list mc_qht_list; 348 struct irdma_msix_vector *iw_msixtbl; 349 struct irdma_qvlist_info *iw_qvlist; 350 struct tasklet_struct dpc_tasklet; 351 struct msix_entry msix_info; 352 struct irdma_dma_mem obj_mem; 353 struct irdma_dma_mem obj_next; 354 atomic_t vchnl_msgs; 355 wait_queue_head_t vchnl_waitq; 356 struct workqueue_struct *cqp_cmpl_wq; 357 struct work_struct cqp_cmpl_work; 358 struct irdma_sc_vsi default_vsi; 359 void *back_fcn; 360 struct irdma_gen_ops gen_ops; 361 void (*check_fc)(struct irdma_sc_vsi *vsi, struct irdma_sc_qp *sc_qp); 362 struct irdma_dcqcn_cc_params dcqcn_params; 363 struct irdma_device *iwdev; 364 }; 365 366 struct irdma_device { 367 struct ib_device ibdev; 368 struct irdma_pci_f *rf; 369 if_t netdev; 370 struct notifier_block nb_netdevice_event; 371 struct irdma_handler *hdl; 372 struct workqueue_struct *cleanup_wq; 373 struct irdma_sc_vsi vsi; 374 struct irdma_cm_core cm_core; 375 u32 roce_cwnd; 376 u32 roce_ackcreds; 377 u32 vendor_id; 378 u32 vendor_part_id; 379 u32 rcv_wnd; 380 u16 mac_ip_table_idx; 381 u16 vsi_num; 382 u8 rcv_wscale; 383 u8 iw_status; 384 u8 roce_rtomin; 385 u8 rd_fence_rate; 386 bool override_rcv_wnd:1; 387 bool override_cwnd:1; 388 bool override_ackcreds:1; 389 bool override_ooo:1; 390 bool override_rd_fence_rate:1; 391 bool override_rtomin:1; 392 bool push_mode:1; 393 bool roce_mode:1; 394 bool roce_dcqcn_en:1; 395 bool dcb_vlan_mode:1; 396 bool iw_ooo:1; 397 enum init_completion_state init_state; 398 399 wait_queue_head_t suspend_wq; 400 }; 401 402 struct irdma_handler { 403 struct list_head list; 404 struct irdma_device *iwdev; 405 struct task deferred_task; 406 struct taskqueue *deferred_tq; 407 bool shared_res_created; 408 }; 409 410 static inline struct irdma_device *to_iwdev(struct ib_device *ibdev) 411 { 412 return container_of(ibdev, struct irdma_device, ibdev); 413 } 414 415 static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext) 416 { 417 return container_of(ibucontext, struct irdma_ucontext, ibucontext); 418 } 419 420 static inline struct irdma_user_mmap_entry * 421 to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry) 422 { 423 return container_of(rdma_entry, struct irdma_user_mmap_entry, 424 rdma_entry); 425 } 426 427 static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd) 428 { 429 return container_of(ibpd, struct irdma_pd, ibpd); 430 } 431 432 static inline struct irdma_ah *to_iwah(struct ib_ah *ibah) 433 { 434 return container_of(ibah, struct irdma_ah, ibah); 435 } 436 437 static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr) 438 { 439 return container_of(ibmr, struct irdma_mr, ibmr); 440 } 441 442 static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw) 443 { 444 return container_of(ibmw, struct irdma_mr, ibmw); 445 } 446 447 static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq) 448 { 449 return container_of(ibcq, struct irdma_cq, ibcq); 450 } 451 452 static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp) 453 { 454 return container_of(ibqp, struct irdma_qp, ibqp); 455 } 456 457 static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev) 458 { 459 return container_of(dev, struct irdma_pci_f, sc_dev); 460 } 461 462 /** 463 * irdma_alloc_resource - allocate a resource 464 * @iwdev: device pointer 465 * @resource_array: resource bit array: 466 * @max_resources: maximum resource number 467 * @req_resources_num: Allocated resource number 468 * @next: next free id 469 **/ 470 static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf, 471 unsigned long *rsrc_array, u32 max_rsrc, 472 u32 *req_rsrc_num, u32 *next) 473 { 474 u32 rsrc_num; 475 unsigned long flags; 476 477 spin_lock_irqsave(&rf->rsrc_lock, flags); 478 rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next); 479 if (rsrc_num >= max_rsrc) { 480 rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc); 481 if (rsrc_num >= max_rsrc) { 482 spin_unlock_irqrestore(&rf->rsrc_lock, flags); 483 irdma_debug(&rf->sc_dev, IRDMA_DEBUG_ERR, 484 "resource [%d] allocation failed\n", 485 rsrc_num); 486 return -EOVERFLOW; 487 } 488 } 489 __set_bit(rsrc_num, rsrc_array); 490 *next = rsrc_num + 1; 491 if (*next == max_rsrc) 492 *next = 0; 493 *req_rsrc_num = rsrc_num; 494 spin_unlock_irqrestore(&rf->rsrc_lock, flags); 495 496 return 0; 497 } 498 499 /** 500 * irdma_free_resource - free a resource 501 * @iwdev: device pointer 502 * @resource_array: resource array for the resource_num 503 * @resource_num: resource number to free 504 **/ 505 static inline void irdma_free_rsrc(struct irdma_pci_f *rf, 506 unsigned long *rsrc_array, u32 rsrc_num) 507 { 508 unsigned long flags; 509 510 spin_lock_irqsave(&rf->rsrc_lock, flags); 511 __clear_bit(rsrc_num, rsrc_array); 512 spin_unlock_irqrestore(&rf->rsrc_lock, flags); 513 } 514 515 int irdma_ctrl_init_hw(struct irdma_pci_f *rf); 516 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf); 517 int irdma_rt_init_hw(struct irdma_device *iwdev, 518 struct irdma_l2params *l2params); 519 void irdma_rt_deinit_hw(struct irdma_device *iwdev); 520 void irdma_qp_add_ref(struct ib_qp *ibqp); 521 void irdma_qp_rem_ref(struct ib_qp *ibqp); 522 void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp); 523 struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn); 524 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask); 525 void irdma_manage_arp_cache(struct irdma_pci_f *rf, const unsigned char *mac_addr, 526 u32 *ip_addr, u32 action); 527 struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port); 528 void irdma_del_apbvt(struct irdma_device *iwdev, 529 struct irdma_apbvt_entry *entry); 530 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp, 531 bool wait); 532 void irdma_free_cqp_request(struct irdma_cqp *cqp, 533 struct irdma_cqp_request *cqp_request); 534 void irdma_put_cqp_request(struct irdma_cqp *cqp, 535 struct irdma_cqp_request *cqp_request); 536 int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx); 537 int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx); 538 void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx); 539 const char *irdma_get_ae_desc(u16 ae_id); 540 541 u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf); 542 void irdma_port_ibevent(struct irdma_device *iwdev); 543 void irdma_cm_disconn(struct irdma_qp *qp); 544 545 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd, 546 u16 maj_err_code, u16 min_err_code); 547 int irdma_handle_cqp_op(struct irdma_pci_f *rf, 548 struct irdma_cqp_request *cqp_request); 549 550 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, 551 struct ib_udata *udata); 552 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, 553 int attr_mask, struct ib_udata *udata); 554 void irdma_cq_add_ref(struct ib_cq *ibcq); 555 void irdma_cq_rem_ref(struct ib_cq *ibcq); 556 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq); 557 558 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf); 559 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp, 560 struct irdma_modify_qp_info *info, bool wait); 561 int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend); 562 int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo, 563 enum irdma_quad_entry_type etype, 564 enum irdma_quad_hash_manage_type mtype, void *cmnode, 565 bool wait); 566 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf); 567 void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp); 568 void irdma_free_qp_rsrc(struct irdma_qp *iwqp); 569 int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver); 570 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core); 571 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term, 572 u8 term_len); 573 int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack); 574 int irdma_send_reset(struct irdma_cm_node *cm_node); 575 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core, 576 u16 rem_port, u32 *rem_addr, u16 loc_port, 577 u32 *loc_addr, u16 vlan_id); 578 int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp, 579 struct irdma_qp_flush_info *info, bool wait); 580 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp, 581 struct irdma_gen_ae_info *info, bool wait); 582 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src); 583 void irdma_copy_ip_htonl(__be32 *dst, u32 *src); 584 u16 irdma_get_vlan_ipv4(struct iw_cm_id *cm_id, u32 *addr); 585 void irdma_get_vlan_mac_ipv6(struct iw_cm_id *cm_id, u32 *addr, u16 *vlan_id, 586 u8 *mac); 587 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size, 588 int acc, u64 *iova_start); 589 int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw); 590 void irdma_del_hmc_objects(struct irdma_sc_dev *dev, 591 struct irdma_hmc_info *hmc_info, bool privileged, 592 bool reset, enum irdma_vers vers); 593 void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq); 594 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd, 595 bool wait, 596 void (*callback_fcn)(struct irdma_cqp_request *cqp_request), 597 void *cb_param); 598 void irdma_udqp_qs_worker(struct work_struct *work); 599 bool irdma_cq_empty(struct irdma_cq *iwcq); 600 int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event, 601 void *ptr); 602 void irdma_unregister_notifiers(struct irdma_device *iwdev); 603 int irdma_register_notifiers(struct irdma_device *iwdev); 604 void irdma_set_rf_user_cfg_params(struct irdma_pci_f *rf); 605 void irdma_add_ip(struct irdma_device *iwdev); 606 void irdma_add_handler(struct irdma_handler *hdl); 607 void irdma_del_handler(struct irdma_handler *hdl); 608 void cqp_compl_worker(struct work_struct *work); 609 void irdma_cleanup_dead_qps(struct irdma_sc_vsi *vsi); 610 #endif /* IRDMA_MAIN_H */ 611