xref: /freebsd/sys/dev/irdma/irdma_main.h (revision 84823cc70824c8d842f503d8c2e6d7b0c2d95b61)
1 /*-
2  * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
3  *
4  * Copyright (c) 2015 - 2022 Intel Corporation
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenFabrics.org BSD license below:
11  *
12  *   Redistribution and use in source and binary forms, with or
13  *   without modification, are permitted provided that the following
14  *   conditions are met:
15  *
16  *    - Redistributions of source code must retain the above
17  *	copyright notice, this list of conditions and the following
18  *	disclaimer.
19  *
20  *    - Redistributions in binary form must reproduce the above
21  *	copyright notice, this list of conditions and the following
22  *	disclaimer in the documentation and/or other materials
23  *	provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 /*$FreeBSD$*/
35 
36 #ifndef IRDMA_MAIN_H
37 #define IRDMA_MAIN_H
38 
39 #include <linux/in.h>
40 #include <netinet/ip6.h>
41 #include <netinet/udp.h>
42 #include <netinet/tcp.h>
43 #include <sys/socket.h>
44 #include <netinet/if_ether.h>
45 #include <linux/slab.h>
46 #include <linux/rculist.h>
47 #include <rdma/ib_smi.h>
48 #include <rdma/ib_verbs.h>
49 #include <rdma/ib_pack.h>
50 #include <rdma/rdma_cm.h>
51 #include <rdma/iw_cm.h>
52 #include <rdma/ib_user_verbs.h>
53 #include <rdma/ib_umem.h>
54 #include <rdma/ib_cache.h>
55 #include <rdma/uverbs_ioctl.h>
56 #include "osdep.h"
57 #include "irdma_defs.h"
58 #include "irdma_hmc.h"
59 #include "irdma_type.h"
60 #include "irdma_ws.h"
61 #include "irdma_protos.h"
62 #include "irdma_pble.h"
63 #include "irdma_cm.h"
64 #include "fbsd_kcompat.h"
65 #include "irdma-abi.h"
66 #include "irdma_verbs.h"
67 #include "irdma_user.h"
68 #include "irdma_puda.h"
69 
70 extern struct list_head irdma_handlers;
71 extern spinlock_t irdma_handler_lock;
72 extern bool irdma_upload_context;
73 
74 #define IRDMA_FW_VER_DEFAULT	2
75 #define IRDMA_HW_VER	        2
76 
77 #define IRDMA_ARP_ADD		1
78 #define IRDMA_ARP_DELETE	2
79 #define IRDMA_ARP_RESOLVE	3
80 
81 #define IRDMA_MACIP_ADD		1
82 #define IRDMA_MACIP_DELETE	2
83 
84 #define IW_CCQ_SIZE	(IRDMA_CQP_SW_SQSIZE_2048 + 1)
85 #define IW_CEQ_SIZE	2048
86 #define IW_AEQ_SIZE	2048
87 
88 #define RX_BUF_SIZE	(1536 + 8)
89 #define IW_REG0_SIZE	(4 * 1024)
90 #define IW_TX_TIMEOUT	(6 * HZ)
91 #define IW_FIRST_QPN	1
92 
93 #define IW_SW_CONTEXT_ALIGN	1024
94 
95 #define MAX_DPC_ITERATIONS	128
96 
97 #define IRDMA_EVENT_TIMEOUT_MS		5000
98 #define IRDMA_VCHNL_EVENT_TIMEOUT_MS	10000
99 #define IRDMA_RST_TIMEOUT_HZ		4
100 
101 #define	IRDMA_NO_QSET	0xffff
102 
103 #define IW_CFG_FPM_QP_COUNT		32768
104 #define IRDMA_MAX_PAGES_PER_FMR		512
105 #define IRDMA_MIN_PAGES_PER_FMR		1
106 #define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED	2
107 #define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED	3
108 
109 #define IRDMA_Q_TYPE_PE_AEQ	0x80
110 #define IRDMA_Q_INVALID_IDX	0xffff
111 #define IRDMA_REM_ENDPOINT_TRK_QPID	3
112 
113 #define IRDMA_DRV_OPT_ENA_MPA_VER_0		0x00000001
114 #define IRDMA_DRV_OPT_DISABLE_MPA_CRC		0x00000002
115 #define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE	0x00000004
116 #define IRDMA_DRV_OPT_DISABLE_INTF		0x00000008
117 #define IRDMA_DRV_OPT_ENA_MSI			0x00000010
118 #define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT		0x00000020
119 #define IRDMA_DRV_OPT_NO_INLINE_DATA		0x00000080
120 #define IRDMA_DRV_OPT_DISABLE_INT_MOD		0x00000100
121 #define IRDMA_DRV_OPT_DISABLE_VIRT_WQ		0x00000200
122 #define IRDMA_DRV_OPT_ENA_PAU			0x00000400
123 #define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP		0x00000800
124 
125 #define IW_HMC_OBJ_TYPE_NUM	ARRAY_SIZE(iw_hmc_obj_types)
126 #define VSI_RXSWCTRL(_VSI)			(0x00205000 + ((_VSI) * 4))
127 #define VSI_RXSWCTRL_MACVSIPRUNEENABLE_M	BIT(8)
128 #define VSI_RXSWCTRL_SRCPRUNEENABLE_M		BIT(13)
129 #define IRDMA_ROCE_CWND_DEFAULT			0x400
130 #define IRDMA_ROCE_ACKCREDS_DEFAULT		0x1E
131 
132 #define IRDMA_FLUSH_SQ		BIT(0)
133 #define IRDMA_FLUSH_RQ		BIT(1)
134 #define IRDMA_REFLUSH		BIT(2)
135 #define IRDMA_FLUSH_WAIT	BIT(3)
136 
137 enum init_completion_state {
138 	INVALID_STATE = 0,
139 	INITIAL_STATE,
140 	CQP_CREATED,
141 	HMC_OBJS_CREATED,
142 	HW_RSRC_INITIALIZED,
143 	CCQ_CREATED,
144 	CEQ0_CREATED, /* Last state of probe */
145 	ILQ_CREATED,
146 	IEQ_CREATED,
147 	REM_ENDPOINT_TRK_CREATED,
148 	CEQS_CREATED,
149 	PBLE_CHUNK_MEM,
150 	AEQ_CREATED,
151 	IP_ADDR_REGISTERED,  /* Last state of open */
152 };
153 
154 struct irdma_rsrc_limits {
155 	u32 qplimit;
156 	u32 mrlimit;
157 	u32 cqlimit;
158 };
159 
160 struct irdma_cqp_err_info {
161 	u16 maj;
162 	u16 min;
163 	const char *desc;
164 };
165 
166 struct irdma_cqp_compl_info {
167 	u32 op_ret_val;
168 	u16 maj_err_code;
169 	u16 min_err_code;
170 	bool error;
171 	u8 op_code;
172 };
173 
174 struct irdma_cqp_request {
175 	struct cqp_cmds_info info;
176 	wait_queue_head_t waitq;
177 	struct list_head list;
178 	atomic_t refcnt;
179 	void (*callback_fcn)(struct irdma_cqp_request *cqp_request);
180 	void *param;
181 	struct irdma_cqp_compl_info compl_info;
182 	bool waiting:1;
183 	bool request_done:1;
184 	bool dynamic:1;
185 };
186 
187 struct irdma_cqp {
188 	struct irdma_sc_cqp sc_cqp;
189 	spinlock_t req_lock; /* protect CQP request list */
190 	spinlock_t compl_lock; /* protect CQP completion processing */
191 	wait_queue_head_t waitq;
192 	wait_queue_head_t remove_wq;
193 	struct irdma_dma_mem sq;
194 	struct irdma_dma_mem host_ctx;
195 	u64 *scratch_array;
196 	struct irdma_cqp_request *cqp_requests;
197 	struct list_head cqp_avail_reqs;
198 	struct list_head cqp_pending_reqs;
199 };
200 
201 struct irdma_ccq {
202 	struct irdma_sc_cq sc_cq;
203 	struct irdma_dma_mem mem_cq;
204 	struct irdma_dma_mem shadow_area;
205 };
206 
207 struct irdma_ceq {
208 	struct irdma_sc_ceq sc_ceq;
209 	struct irdma_dma_mem mem;
210 	u32 irq;
211 	u32 msix_idx;
212 	struct irdma_pci_f *rf;
213 	struct tasklet_struct dpc_tasklet;
214 	spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */
215 };
216 
217 struct irdma_aeq {
218 	struct irdma_sc_aeq sc_aeq;
219 	struct irdma_dma_mem mem;
220 	struct irdma_pble_alloc palloc;
221 	bool virtual_map;
222 };
223 
224 struct irdma_arp_entry {
225 	u32 ip_addr[4];
226 	u8 mac_addr[ETH_ALEN];
227 };
228 
229 struct irdma_msix_vector {
230 	u32 idx;
231 	u32 irq;
232 	u32 cpu_affinity;
233 	u32 ceq_id;
234 	struct resource *res;
235 	void  *tag;
236 };
237 
238 struct irdma_mc_table_info {
239 	u32 mgn;
240 	u32 dest_ip[4];
241 	bool lan_fwd:1;
242 	bool ipv4_valid:1;
243 };
244 
245 struct mc_table_list {
246 	struct list_head list;
247 	struct irdma_mc_table_info mc_info;
248 	struct irdma_mcast_grp_info mc_grp_ctx;
249 };
250 
251 struct irdma_qv_info {
252 	u32 v_idx; /* msix_vector */
253 	u16 ceq_idx;
254 	u16 aeq_idx;
255 	u8 itr_idx;
256 };
257 
258 struct irdma_qvlist_info {
259 	u32 num_vectors;
260 	struct irdma_qv_info qv_info[1];
261 };
262 
263 struct irdma_gen_ops {
264 	void (*request_reset)(struct irdma_pci_f *rf);
265 	int (*register_qset)(struct irdma_sc_vsi *vsi,
266 			     struct irdma_ws_node *tc_node);
267 	void (*unregister_qset)(struct irdma_sc_vsi *vsi,
268 				struct irdma_ws_node *tc_node);
269 };
270 
271 struct irdma_pci_f {
272 	bool reset:1;
273 	bool rsrc_created:1;
274 	bool msix_shared:1;
275 	bool ftype:1;
276 	u8 rsrc_profile;
277 	u8 *hmc_info_mem;
278 	u8 *mem_rsrc;
279 	u8 rdma_ver;
280 	u8 rst_to;
281 	enum irdma_protocol_used protocol_used;
282 	bool en_rem_endpoint_trk:1;
283 	bool dcqcn_ena:1;
284 	u32 sd_type;
285 	u32 msix_count;
286 	u32 max_mr;
287 	u32 max_qp;
288 	u32 max_cq;
289 	u32 max_ah;
290 	u32 next_ah;
291 	u32 max_mcg;
292 	u32 next_mcg;
293 	u32 max_pd;
294 	u32 next_qp;
295 	u32 next_cq;
296 	u32 next_pd;
297 	u32 max_mr_size;
298 	u32 max_cqe;
299 	u32 mr_stagmask;
300 	u32 used_pds;
301 	u32 used_cqs;
302 	u32 used_mrs;
303 	u32 used_qps;
304 	u32 arp_table_size;
305 	u32 next_arp_index;
306 	u32 ceqs_count;
307 	u32 next_ws_node_id;
308 	u32 max_ws_node_id;
309 	u32 limits_sel;
310 	unsigned long *allocated_ws_nodes;
311 	unsigned long *allocated_qps;
312 	unsigned long *allocated_cqs;
313 	unsigned long *allocated_mrs;
314 	unsigned long *allocated_pds;
315 	unsigned long *allocated_mcgs;
316 	unsigned long *allocated_ahs;
317 	unsigned long *allocated_arps;
318 	enum init_completion_state init_state;
319 	struct irdma_sc_dev sc_dev;
320 	struct irdma_dev_ctx dev_ctx;
321 	struct irdma_tunable_info tun_info;
322 	eventhandler_tag irdma_ifaddr_event;
323 	struct irdma_handler *hdl;
324 	struct pci_dev *pcidev;
325 	struct ice_rdma_peer *peer_info;
326 	struct irdma_hw hw;
327 	struct irdma_cqp cqp;
328 	struct irdma_ccq ccq;
329 	struct irdma_aeq aeq;
330 	struct irdma_ceq *ceqlist;
331 	struct irdma_hmc_pble_rsrc *pble_rsrc;
332 	struct irdma_arp_entry *arp_table;
333 	spinlock_t arp_lock; /*protect ARP table access*/
334 	spinlock_t rsrc_lock; /* protect HW resource array access */
335 	spinlock_t qptable_lock; /*protect QP table access*/
336 	spinlock_t cqtable_lock; /*protect CQ table access*/
337 	struct irdma_qp **qp_table;
338 	struct irdma_cq **cq_table;
339 	spinlock_t qh_list_lock; /* protect mc_qht_list */
340 	struct mc_table_list mc_qht_list;
341 	struct irdma_msix_vector *iw_msixtbl;
342 	struct irdma_qvlist_info *iw_qvlist;
343 	struct tasklet_struct dpc_tasklet;
344 	struct msix_entry msix_info;
345 	struct irdma_dma_mem obj_mem;
346 	struct irdma_dma_mem obj_next;
347 	atomic_t vchnl_msgs;
348 	wait_queue_head_t vchnl_waitq;
349 	struct workqueue_struct *cqp_cmpl_wq;
350 	struct work_struct cqp_cmpl_work;
351 	struct irdma_sc_vsi default_vsi;
352 	void *back_fcn;
353 	struct irdma_gen_ops gen_ops;
354 	void (*check_fc)(struct irdma_sc_vsi *vsi, struct irdma_sc_qp *sc_qp);
355 	struct irdma_dcqcn_cc_params dcqcn_params;
356 	struct irdma_device *iwdev;
357 };
358 
359 struct irdma_device {
360 	struct ib_device ibdev;
361 	struct irdma_pci_f *rf;
362 	struct ifnet *netdev;
363 	struct irdma_handler *hdl;
364 	struct workqueue_struct *cleanup_wq;
365 	struct irdma_sc_vsi vsi;
366 	struct irdma_cm_core cm_core;
367 	u32 roce_cwnd;
368 	u32 roce_ackcreds;
369 	u32 vendor_id;
370 	u32 vendor_part_id;
371 	u32 device_cap_flags;
372 	u32 push_mode;
373 	u32 rcv_wnd;
374 	u16 mac_ip_table_idx;
375 	u16 vsi_num;
376 	u8 rcv_wscale;
377 	u8 iw_status;
378 	u8 rd_fence_rate;
379 	bool roce_mode:1;
380 	bool roce_dcqcn_en:1;
381 	bool dcb_vlan_mode:1;
382 	bool iw_ooo:1;
383 	enum init_completion_state init_state;
384 
385 	wait_queue_head_t suspend_wq;
386 };
387 
388 struct irdma_handler {
389 	struct list_head list;
390 	struct irdma_device *iwdev;
391 	struct task deferred_task;
392 	struct taskqueue *deferred_tq;
393 	bool shared_res_created;
394 };
395 
396 static inline struct irdma_device *to_iwdev(struct ib_device *ibdev)
397 {
398 	return container_of(ibdev, struct irdma_device, ibdev);
399 }
400 
401 static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
402 {
403 	return container_of(ibucontext, struct irdma_ucontext, ibucontext);
404 }
405 
406 static inline struct irdma_user_mmap_entry *
407 to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry)
408 {
409 	return container_of(rdma_entry, struct irdma_user_mmap_entry,
410 			    rdma_entry);
411 }
412 
413 static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd)
414 {
415 	return container_of(ibpd, struct irdma_pd, ibpd);
416 }
417 
418 static inline struct irdma_ah *to_iwah(struct ib_ah *ibah)
419 {
420 	return container_of(ibah, struct irdma_ah, ibah);
421 }
422 
423 static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr)
424 {
425 	return container_of(ibmr, struct irdma_mr, ibmr);
426 }
427 
428 static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw)
429 {
430 	return container_of(ibmw, struct irdma_mr, ibmw);
431 }
432 
433 static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq)
434 {
435 	return container_of(ibcq, struct irdma_cq, ibcq);
436 }
437 
438 static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp)
439 {
440 	return container_of(ibqp, struct irdma_qp, ibqp);
441 }
442 
443 static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev)
444 {
445 	return container_of(dev, struct irdma_pci_f, sc_dev);
446 }
447 
448 /**
449  * irdma_alloc_resource - allocate a resource
450  * @iwdev: device pointer
451  * @resource_array: resource bit array:
452  * @max_resources: maximum resource number
453  * @req_resources_num: Allocated resource number
454  * @next: next free id
455  **/
456 static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf,
457 				   unsigned long *rsrc_array, u32 max_rsrc,
458 				   u32 *req_rsrc_num, u32 *next)
459 {
460 	u32 rsrc_num;
461 	unsigned long flags;
462 
463 	spin_lock_irqsave(&rf->rsrc_lock, flags);
464 	rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next);
465 	if (rsrc_num >= max_rsrc) {
466 		rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc);
467 		if (rsrc_num >= max_rsrc) {
468 			spin_unlock_irqrestore(&rf->rsrc_lock, flags);
469 			irdma_debug(&rf->sc_dev, IRDMA_DEBUG_ERR,
470 				    "resource [%d] allocation failed\n",
471 				    rsrc_num);
472 			return -EOVERFLOW;
473 		}
474 	}
475 	__set_bit(rsrc_num, rsrc_array);
476 	*next = rsrc_num + 1;
477 	if (*next == max_rsrc)
478 		*next = 0;
479 	*req_rsrc_num = rsrc_num;
480 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
481 
482 	return 0;
483 }
484 
485 /**
486  * irdma_free_resource - free a resource
487  * @iwdev: device pointer
488  * @resource_array: resource array for the resource_num
489  * @resource_num: resource number to free
490  **/
491 static inline void irdma_free_rsrc(struct irdma_pci_f *rf,
492 				   unsigned long *rsrc_array, u32 rsrc_num)
493 {
494 	unsigned long flags;
495 
496 	spin_lock_irqsave(&rf->rsrc_lock, flags);
497 	__clear_bit(rsrc_num, rsrc_array);
498 	spin_unlock_irqrestore(&rf->rsrc_lock, flags);
499 }
500 
501 int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
502 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
503 int irdma_rt_init_hw(struct irdma_device *iwdev,
504 		     struct irdma_l2params *l2params);
505 void irdma_rt_deinit_hw(struct irdma_device *iwdev);
506 void irdma_qp_add_ref(struct ib_qp *ibqp);
507 void irdma_qp_rem_ref(struct ib_qp *ibqp);
508 void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp);
509 struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn);
510 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
511 void irdma_manage_arp_cache(struct irdma_pci_f *rf, unsigned char *mac_addr,
512 			    u32 *ip_addr, u32 action);
513 struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port);
514 void irdma_del_apbvt(struct irdma_device *iwdev,
515 		     struct irdma_apbvt_entry *entry);
516 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
517 							  bool wait);
518 void irdma_free_cqp_request(struct irdma_cqp *cqp,
519 			    struct irdma_cqp_request *cqp_request);
520 void irdma_put_cqp_request(struct irdma_cqp *cqp,
521 			   struct irdma_cqp_request *cqp_request);
522 int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx);
523 int irdma_add_local_mac_entry(struct irdma_pci_f *rf, u8 *mac_addr, u16 idx);
524 void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx);
525 
526 u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
527 void irdma_port_ibevent(struct irdma_device *iwdev);
528 void irdma_cm_disconn(struct irdma_qp *qp);
529 
530 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
531 			u16 maj_err_code, u16 min_err_code);
532 int irdma_handle_cqp_op(struct irdma_pci_f *rf,
533 			struct irdma_cqp_request *cqp_request);
534 
535 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
536 		    struct ib_udata *udata);
537 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
538 			 int attr_mask, struct ib_udata *udata);
539 void irdma_cq_add_ref(struct ib_cq *ibcq);
540 void irdma_cq_rem_ref(struct ib_cq *ibcq);
541 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
542 
543 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
544 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
545 		       struct irdma_modify_qp_info *info, bool wait);
546 int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
547 int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
548 		       enum irdma_quad_entry_type etype,
549 		       enum irdma_quad_hash_manage_type mtype, void *cmnode,
550 		       bool wait);
551 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
552 void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp);
553 void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
554 int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
555 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
556 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
557 			 u8 term_len);
558 int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
559 int irdma_send_reset(struct irdma_cm_node *cm_node);
560 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
561 				      u16 rem_port, u32 *rem_addr, u16 loc_port,
562 				      u32 *loc_addr, u16 vlan_id);
563 int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
564 			struct irdma_qp_flush_info *info, bool wait);
565 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
566 		  struct irdma_gen_ae_info *info, bool wait);
567 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
568 void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
569 u16 irdma_get_vlan_ipv4(u32 *addr);
570 struct ifnet *irdma_netdev_vlan_ipv6(u32 *addr, u16 *vlan_id, u8 *mac);
571 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
572 				int acc, u64 *iova_start);
573 int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw);
574 void irdma_del_hmc_objects(struct irdma_sc_dev *dev,
575 			   struct irdma_hmc_info *hmc_info, bool privileged,
576 			   bool reset, enum irdma_vers vers);
577 void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
578 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
579 		    bool wait,
580 		    void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
581 		    void *cb_param);
582 void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request);
583 bool irdma_cq_empty(struct irdma_cq *iwcq);
584 void irdma_set_rf_user_cfg_params(struct irdma_pci_f *rf);
585 void irdma_add_ip(struct irdma_device *iwdev);
586 void irdma_add_handler(struct irdma_handler *hdl);
587 void irdma_del_handler(struct irdma_handler *hdl);
588 void cqp_compl_worker(struct work_struct *work);
589 #endif /* IRDMA_MAIN_H */
590