1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2023 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef IRDMA_MAIN_H 36 #define IRDMA_MAIN_H 37 38 #include <linux/in.h> 39 #include <netinet/ip6.h> 40 #include <netinet/udp.h> 41 #include <netinet/tcp.h> 42 #include <sys/socket.h> 43 #include <netinet/if_ether.h> 44 #include <linux/slab.h> 45 #include <linux/rculist.h> 46 #if __FreeBSD_version >= 1400000 47 #include <rdma/uverbs_ioctl.h> 48 #endif 49 #include <rdma/ib_smi.h> 50 #include <rdma/ib_verbs.h> 51 #include <rdma/ib_pack.h> 52 #include <rdma/rdma_cm.h> 53 #include <rdma/iw_cm.h> 54 #include <rdma/ib_user_verbs.h> 55 #include <rdma/ib_umem.h> 56 #include <rdma/ib_cache.h> 57 #include "osdep.h" 58 #include "irdma_defs.h" 59 #include "irdma_hmc.h" 60 #include "irdma_type.h" 61 #include "irdma_ws.h" 62 #include "irdma_protos.h" 63 #include "irdma_pble.h" 64 #include "irdma_cm.h" 65 #include "fbsd_kcompat.h" 66 #include "irdma-abi.h" 67 #include "irdma_verbs.h" 68 #include "irdma_user.h" 69 #include "irdma_puda.h" 70 71 extern struct list_head irdma_handlers; 72 extern spinlock_t irdma_handler_lock; 73 extern bool irdma_upload_context; 74 75 #define IRDMA_FW_VER_DEFAULT 2 76 #define IRDMA_HW_VER 2 77 78 #define IRDMA_ARP_ADD 1 79 #define IRDMA_ARP_DELETE 2 80 #define IRDMA_ARP_RESOLVE 3 81 82 #define IRDMA_MACIP_ADD 1 83 #define IRDMA_MACIP_DELETE 2 84 85 #define IW_CCQ_SIZE (IRDMA_CQP_SW_SQSIZE_2048 + 1) 86 #define IW_CEQ_SIZE 2048 87 #define IW_AEQ_SIZE 2048 88 89 #define RX_BUF_SIZE (1536 + 8) 90 #define IW_REG0_SIZE (4 * 1024) 91 #define IW_TX_TIMEOUT (6 * HZ) 92 #define IW_FIRST_QPN 1 93 94 #define IW_SW_CONTEXT_ALIGN 1024 95 96 #define MAX_DPC_ITERATIONS 128 97 98 #define IRDMA_EVENT_TIMEOUT_MS 5000 99 #define IRDMA_VCHNL_EVENT_TIMEOUT_MS 10000 100 #define IRDMA_RST_TIMEOUT_HZ 4 101 102 #define IRDMA_NO_QSET 0xffff 103 104 #define IW_CFG_FPM_QP_COUNT 32768 105 #define IRDMA_MAX_PAGES_PER_FMR 262144 106 #define IRDMA_MIN_PAGES_PER_FMR 1 107 #define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED 2 108 #define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED 3 109 110 #define IRDMA_Q_TYPE_PE_AEQ 0x80 111 #define IRDMA_Q_INVALID_IDX 0xffff 112 #define IRDMA_REM_ENDPOINT_TRK_QPID 3 113 114 #define IRDMA_DRV_OPT_ENA_MPA_VER_0 0x00000001 115 #define IRDMA_DRV_OPT_DISABLE_MPA_CRC 0x00000002 116 #define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004 117 #define IRDMA_DRV_OPT_DISABLE_INTF 0x00000008 118 #define IRDMA_DRV_OPT_ENA_MSI 0x00000010 119 #define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020 120 #define IRDMA_DRV_OPT_NO_INLINE_DATA 0x00000080 121 #define IRDMA_DRV_OPT_DISABLE_INT_MOD 0x00000100 122 #define IRDMA_DRV_OPT_DISABLE_VIRT_WQ 0x00000200 123 #define IRDMA_DRV_OPT_ENA_PAU 0x00000400 124 #define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800 125 126 #define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types) 127 #define IRDMA_ROCE_CWND_DEFAULT 0x400 128 #define IRDMA_ROCE_ACKCREDS_DEFAULT 0x1E 129 130 #define IRDMA_FLUSH_SQ BIT(0) 131 #define IRDMA_FLUSH_RQ BIT(1) 132 #define IRDMA_REFLUSH BIT(2) 133 #define IRDMA_FLUSH_WAIT BIT(3) 134 135 #define IRDMA_IRQ_NAME_STR_LEN 64 136 137 enum init_completion_state { 138 INVALID_STATE = 0, 139 INITIAL_STATE, 140 CQP_CREATED, 141 HMC_OBJS_CREATED, 142 HW_RSRC_INITIALIZED, 143 CCQ_CREATED, 144 CEQ0_CREATED, /* Last state of probe */ 145 ILQ_CREATED, 146 IEQ_CREATED, 147 REM_ENDPOINT_TRK_CREATED, 148 CEQS_CREATED, 149 PBLE_CHUNK_MEM, 150 AEQ_CREATED, 151 IP_ADDR_REGISTERED, /* Last state of open */ 152 }; 153 154 struct ae_desc { 155 u16 id; 156 const char *desc; 157 }; 158 159 struct irdma_rsrc_limits { 160 u32 qplimit; 161 u32 mrlimit; 162 u32 cqlimit; 163 }; 164 165 struct irdma_cqp_err_info { 166 u16 maj; 167 u16 min; 168 const char *desc; 169 }; 170 171 struct irdma_cqp_compl_info { 172 u32 op_ret_val; 173 u16 maj_err_code; 174 u16 min_err_code; 175 bool error; 176 u8 op_code; 177 }; 178 179 struct irdma_cqp_request { 180 struct cqp_cmds_info info; 181 wait_queue_head_t waitq; 182 struct list_head list; 183 atomic_t refcnt; 184 void (*callback_fcn)(struct irdma_cqp_request *cqp_request); 185 void *param; 186 struct irdma_cqp_compl_info compl_info; 187 bool request_done; /* READ/WRITE_ONCE macros operate on it */ 188 bool waiting:1; 189 bool dynamic:1; 190 }; 191 192 struct irdma_cqp { 193 struct irdma_sc_cqp sc_cqp; 194 spinlock_t req_lock; /* protect CQP request list */ 195 spinlock_t compl_lock; /* protect CQP completion processing */ 196 wait_queue_head_t waitq; 197 wait_queue_head_t remove_wq; 198 struct irdma_dma_mem sq; 199 struct irdma_dma_mem host_ctx; 200 u64 *scratch_array; 201 struct irdma_cqp_request *cqp_requests; 202 struct list_head cqp_avail_reqs; 203 struct list_head cqp_pending_reqs; 204 }; 205 206 struct irdma_ccq { 207 struct irdma_sc_cq sc_cq; 208 struct irdma_dma_mem mem_cq; 209 struct irdma_dma_mem shadow_area; 210 }; 211 212 struct irdma_ceq { 213 struct irdma_sc_ceq sc_ceq; 214 struct irdma_dma_mem mem; 215 u32 irq; 216 u32 msix_idx; 217 struct irdma_pci_f *rf; 218 struct tasklet_struct dpc_tasklet; 219 spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */ 220 }; 221 222 struct irdma_aeq { 223 struct irdma_sc_aeq sc_aeq; 224 struct irdma_dma_mem mem; 225 struct irdma_pble_alloc palloc; 226 bool virtual_map; 227 }; 228 229 struct irdma_arp_entry { 230 u32 ip_addr[4]; 231 u8 mac_addr[ETHER_ADDR_LEN]; 232 }; 233 234 struct irdma_msix_vector { 235 u32 idx; 236 u32 irq; 237 u32 cpu_affinity; 238 u32 ceq_id; 239 char name[IRDMA_IRQ_NAME_STR_LEN]; 240 struct resource *res; 241 void *tag; 242 }; 243 244 struct irdma_mc_table_info { 245 u32 mgn; 246 u32 dest_ip[4]; 247 bool lan_fwd:1; 248 bool ipv4_valid:1; 249 }; 250 251 struct mc_table_list { 252 struct list_head list; 253 struct irdma_mc_table_info mc_info; 254 struct irdma_mcast_grp_info mc_grp_ctx; 255 }; 256 257 struct irdma_qv_info { 258 u32 v_idx; /* msix_vector */ 259 u16 ceq_idx; 260 u16 aeq_idx; 261 u8 itr_idx; 262 }; 263 264 struct irdma_qvlist_info { 265 u32 num_vectors; 266 struct irdma_qv_info qv_info[1]; 267 }; 268 269 struct irdma_gen_ops { 270 void (*request_reset)(struct irdma_pci_f *rf); 271 int (*register_qset)(struct irdma_sc_vsi *vsi, 272 struct irdma_ws_node *tc_node); 273 void (*unregister_qset)(struct irdma_sc_vsi *vsi, 274 struct irdma_ws_node *tc_node); 275 }; 276 277 struct irdma_pci_f { 278 bool reset:1; 279 bool rsrc_created:1; 280 bool msix_shared:1; 281 bool ftype:1; 282 u8 rsrc_profile; 283 u8 *hmc_info_mem; 284 u8 *mem_rsrc; 285 u8 rdma_ver; 286 u8 rst_to; 287 /* Not used in SRIOV VF mode */ 288 u8 pf_id; 289 enum irdma_protocol_used protocol_used; 290 bool en_rem_endpoint_trk:1; 291 bool dcqcn_ena:1; 292 u32 sd_type; 293 u32 msix_count; 294 u32 max_mr; 295 u32 max_qp; 296 u32 max_cq; 297 u32 max_ah; 298 u32 next_ah; 299 u32 max_mcg; 300 u32 next_mcg; 301 u32 max_pd; 302 u32 next_qp; 303 u32 next_cq; 304 u32 next_pd; 305 u32 max_mr_size; 306 u32 max_cqe; 307 u32 mr_stagmask; 308 u32 used_pds; 309 u32 used_cqs; 310 u32 used_mrs; 311 u32 used_qps; 312 u32 arp_table_size; 313 u32 next_arp_index; 314 u32 ceqs_count; 315 u32 next_ws_node_id; 316 u32 max_ws_node_id; 317 u32 limits_sel; 318 unsigned long *allocated_ws_nodes; 319 unsigned long *allocated_qps; 320 unsigned long *allocated_cqs; 321 unsigned long *allocated_mrs; 322 unsigned long *allocated_pds; 323 unsigned long *allocated_mcgs; 324 unsigned long *allocated_ahs; 325 unsigned long *allocated_arps; 326 enum init_completion_state init_state; 327 struct irdma_sc_dev sc_dev; 328 struct irdma_dev_ctx dev_ctx; 329 struct irdma_tunable_info tun_info; 330 eventhandler_tag irdma_ifaddr_event; 331 struct irdma_handler *hdl; 332 struct pci_dev *pcidev; 333 struct ice_rdma_peer *peer_info; 334 struct irdma_hw hw; 335 struct irdma_cqp cqp; 336 struct irdma_ccq ccq; 337 struct irdma_aeq aeq; 338 struct irdma_ceq *ceqlist; 339 struct irdma_hmc_pble_rsrc *pble_rsrc; 340 struct irdma_arp_entry *arp_table; 341 spinlock_t arp_lock; /*protect ARP table access*/ 342 spinlock_t rsrc_lock; /* protect HW resource array access */ 343 spinlock_t qptable_lock; /*protect QP table access*/ 344 spinlock_t cqtable_lock; /*protect CQ table access*/ 345 struct irdma_qp **qp_table; 346 struct irdma_cq **cq_table; 347 spinlock_t qh_list_lock; /* protect mc_qht_list */ 348 struct mc_table_list mc_qht_list; 349 struct irdma_msix_vector *iw_msixtbl; 350 struct irdma_qvlist_info *iw_qvlist; 351 struct tasklet_struct dpc_tasklet; 352 struct msix_entry msix_info; 353 struct irdma_dma_mem obj_mem; 354 struct irdma_dma_mem obj_next; 355 atomic_t vchnl_msgs; 356 wait_queue_head_t vchnl_waitq; 357 struct workqueue_struct *cqp_cmpl_wq; 358 struct work_struct cqp_cmpl_work; 359 struct irdma_sc_vsi default_vsi; 360 void *back_fcn; 361 struct irdma_gen_ops gen_ops; 362 void (*check_fc)(struct irdma_sc_vsi *vsi, struct irdma_sc_qp *sc_qp); 363 struct irdma_dcqcn_cc_params dcqcn_params; 364 struct irdma_device *iwdev; 365 }; 366 367 struct irdma_device { 368 struct ib_device ibdev; 369 struct irdma_pci_f *rf; 370 if_t netdev; 371 struct notifier_block nb_netdevice_event; 372 struct irdma_handler *hdl; 373 struct workqueue_struct *cleanup_wq; 374 struct irdma_sc_vsi vsi; 375 struct irdma_cm_core cm_core; 376 u32 roce_cwnd; 377 u32 roce_ackcreds; 378 u32 vendor_id; 379 u32 vendor_part_id; 380 u32 push_mode; 381 u32 rcv_wnd; 382 u16 mac_ip_table_idx; 383 u16 vsi_num; 384 u8 rcv_wscale; 385 u8 iw_status; 386 u8 roce_rtomin; 387 u8 rd_fence_rate; 388 bool override_rcv_wnd:1; 389 bool override_cwnd:1; 390 bool override_ackcreds:1; 391 bool override_ooo:1; 392 bool override_rd_fence_rate:1; 393 bool override_rtomin:1; 394 bool roce_mode:1; 395 bool roce_dcqcn_en:1; 396 bool dcb_vlan_mode:1; 397 bool iw_ooo:1; 398 enum init_completion_state init_state; 399 400 wait_queue_head_t suspend_wq; 401 }; 402 403 struct irdma_handler { 404 struct list_head list; 405 struct irdma_device *iwdev; 406 struct task deferred_task; 407 struct taskqueue *deferred_tq; 408 bool shared_res_created; 409 }; 410 411 static inline struct irdma_device *to_iwdev(struct ib_device *ibdev) 412 { 413 return container_of(ibdev, struct irdma_device, ibdev); 414 } 415 416 static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext) 417 { 418 return container_of(ibucontext, struct irdma_ucontext, ibucontext); 419 } 420 421 #if __FreeBSD_version >= 1400026 422 static inline struct irdma_user_mmap_entry * 423 to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry) 424 { 425 return container_of(rdma_entry, struct irdma_user_mmap_entry, 426 rdma_entry); 427 } 428 429 #endif 430 static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd) 431 { 432 return container_of(ibpd, struct irdma_pd, ibpd); 433 } 434 435 static inline struct irdma_ah *to_iwah(struct ib_ah *ibah) 436 { 437 return container_of(ibah, struct irdma_ah, ibah); 438 } 439 440 static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr) 441 { 442 return container_of(ibmr, struct irdma_mr, ibmr); 443 } 444 445 static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw) 446 { 447 return container_of(ibmw, struct irdma_mr, ibmw); 448 } 449 450 static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq) 451 { 452 return container_of(ibcq, struct irdma_cq, ibcq); 453 } 454 455 static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp) 456 { 457 return container_of(ibqp, struct irdma_qp, ibqp); 458 } 459 460 static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev) 461 { 462 return container_of(dev, struct irdma_pci_f, sc_dev); 463 } 464 465 /** 466 * irdma_alloc_resource - allocate a resource 467 * @iwdev: device pointer 468 * @resource_array: resource bit array: 469 * @max_resources: maximum resource number 470 * @req_resources_num: Allocated resource number 471 * @next: next free id 472 **/ 473 static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf, 474 unsigned long *rsrc_array, u32 max_rsrc, 475 u32 *req_rsrc_num, u32 *next) 476 { 477 u32 rsrc_num; 478 unsigned long flags; 479 480 spin_lock_irqsave(&rf->rsrc_lock, flags); 481 rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next); 482 if (rsrc_num >= max_rsrc) { 483 rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc); 484 if (rsrc_num >= max_rsrc) { 485 spin_unlock_irqrestore(&rf->rsrc_lock, flags); 486 irdma_debug(&rf->sc_dev, IRDMA_DEBUG_ERR, 487 "resource [%d] allocation failed\n", 488 rsrc_num); 489 return -EOVERFLOW; 490 } 491 } 492 __set_bit(rsrc_num, rsrc_array); 493 *next = rsrc_num + 1; 494 if (*next == max_rsrc) 495 *next = 0; 496 *req_rsrc_num = rsrc_num; 497 spin_unlock_irqrestore(&rf->rsrc_lock, flags); 498 499 return 0; 500 } 501 502 /** 503 * irdma_free_resource - free a resource 504 * @iwdev: device pointer 505 * @resource_array: resource array for the resource_num 506 * @resource_num: resource number to free 507 **/ 508 static inline void irdma_free_rsrc(struct irdma_pci_f *rf, 509 unsigned long *rsrc_array, u32 rsrc_num) 510 { 511 unsigned long flags; 512 513 spin_lock_irqsave(&rf->rsrc_lock, flags); 514 __clear_bit(rsrc_num, rsrc_array); 515 spin_unlock_irqrestore(&rf->rsrc_lock, flags); 516 } 517 518 int irdma_ctrl_init_hw(struct irdma_pci_f *rf); 519 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf); 520 int irdma_rt_init_hw(struct irdma_device *iwdev, 521 struct irdma_l2params *l2params); 522 void irdma_rt_deinit_hw(struct irdma_device *iwdev); 523 void irdma_qp_add_ref(struct ib_qp *ibqp); 524 void irdma_qp_rem_ref(struct ib_qp *ibqp); 525 void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp); 526 struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn); 527 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask); 528 void irdma_manage_arp_cache(struct irdma_pci_f *rf, const unsigned char *mac_addr, 529 u32 *ip_addr, u32 action); 530 struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port); 531 void irdma_del_apbvt(struct irdma_device *iwdev, 532 struct irdma_apbvt_entry *entry); 533 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp, 534 bool wait); 535 void irdma_free_cqp_request(struct irdma_cqp *cqp, 536 struct irdma_cqp_request *cqp_request); 537 void irdma_put_cqp_request(struct irdma_cqp *cqp, 538 struct irdma_cqp_request *cqp_request); 539 int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx); 540 int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx); 541 void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx); 542 const char *irdma_get_ae_desc(u16 ae_id); 543 544 u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf); 545 void irdma_port_ibevent(struct irdma_device *iwdev); 546 void irdma_cm_disconn(struct irdma_qp *qp); 547 548 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd, 549 u16 maj_err_code, u16 min_err_code); 550 int irdma_handle_cqp_op(struct irdma_pci_f *rf, 551 struct irdma_cqp_request *cqp_request); 552 553 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, 554 struct ib_udata *udata); 555 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, 556 int attr_mask, struct ib_udata *udata); 557 void irdma_cq_add_ref(struct ib_cq *ibcq); 558 void irdma_cq_rem_ref(struct ib_cq *ibcq); 559 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq); 560 561 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf); 562 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp, 563 struct irdma_modify_qp_info *info, bool wait); 564 int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend); 565 int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo, 566 enum irdma_quad_entry_type etype, 567 enum irdma_quad_hash_manage_type mtype, void *cmnode, 568 bool wait); 569 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf); 570 void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp); 571 void irdma_free_qp_rsrc(struct irdma_qp *iwqp); 572 int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver); 573 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core); 574 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term, 575 u8 term_len); 576 int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack); 577 int irdma_send_reset(struct irdma_cm_node *cm_node); 578 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core, 579 u16 rem_port, u32 *rem_addr, u16 loc_port, 580 u32 *loc_addr, u16 vlan_id); 581 int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp, 582 struct irdma_qp_flush_info *info, bool wait); 583 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp, 584 struct irdma_gen_ae_info *info, bool wait); 585 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src); 586 void irdma_copy_ip_htonl(__be32 *dst, u32 *src); 587 u16 irdma_get_vlan_ipv4(u32 *addr); 588 if_t irdma_netdev_vlan_ipv6(u32 *addr, u16 *vlan_id, u8 *mac); 589 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size, 590 int acc, u64 *iova_start); 591 int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw); 592 void irdma_del_hmc_objects(struct irdma_sc_dev *dev, 593 struct irdma_hmc_info *hmc_info, bool privileged, 594 bool reset, enum irdma_vers vers); 595 void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq); 596 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd, 597 bool wait, 598 void (*callback_fcn)(struct irdma_cqp_request *cqp_request), 599 void *cb_param); 600 void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request); 601 void irdma_udqp_qs_worker(struct work_struct *work); 602 bool irdma_cq_empty(struct irdma_cq *iwcq); 603 int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event, 604 void *ptr); 605 void irdma_unregister_notifiers(struct irdma_device *iwdev); 606 int irdma_register_notifiers(struct irdma_device *iwdev); 607 void irdma_set_rf_user_cfg_params(struct irdma_pci_f *rf); 608 void irdma_add_ip(struct irdma_device *iwdev); 609 void irdma_add_handler(struct irdma_handler *hdl); 610 void irdma_del_handler(struct irdma_handler *hdl); 611 void cqp_compl_worker(struct work_struct *work); 612 void irdma_cleanup_dead_qps(struct irdma_sc_vsi *vsi); 613 #endif /* IRDMA_MAIN_H */ 614