1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2021 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 /*$FreeBSD$*/ 35 36 #ifndef IRDMA_HMC_H 37 #define IRDMA_HMC_H 38 39 #include "irdma_defs.h" 40 41 #define IRDMA_HMC_MAX_BP_COUNT 512 42 #define IRDMA_MAX_SD_ENTRIES 11 43 #define IRDMA_HW_DBG_HMC_INVALID_BP_MARK 0xca 44 #define IRDMA_HMC_INFO_SIGNATURE 0x484d5347 45 #define IRDMA_HMC_PD_CNT_IN_SD 512 46 #define IRDMA_HMC_DIRECT_BP_SIZE 0x200000 47 #define IRDMA_HMC_MAX_SD_COUNT 8192 48 #define IRDMA_HMC_PAGED_BP_SIZE 4096 49 #define IRDMA_HMC_PD_BP_BUF_ALIGNMENT 4096 50 #define IRDMA_FIRST_VF_FPM_ID 8 51 #define FPM_MULTIPLIER 1024 52 53 enum irdma_hmc_rsrc_type { 54 IRDMA_HMC_IW_QP = 0, 55 IRDMA_HMC_IW_CQ = 1, 56 IRDMA_HMC_IW_RESERVED = 2, 57 IRDMA_HMC_IW_HTE = 3, 58 IRDMA_HMC_IW_ARP = 4, 59 IRDMA_HMC_IW_APBVT_ENTRY = 5, 60 IRDMA_HMC_IW_MR = 6, 61 IRDMA_HMC_IW_XF = 7, 62 IRDMA_HMC_IW_XFFL = 8, 63 IRDMA_HMC_IW_Q1 = 9, 64 IRDMA_HMC_IW_Q1FL = 10, 65 IRDMA_HMC_IW_TIMER = 11, 66 IRDMA_HMC_IW_FSIMC = 12, 67 IRDMA_HMC_IW_FSIAV = 13, 68 IRDMA_HMC_IW_PBLE = 14, 69 IRDMA_HMC_IW_RRF = 15, 70 IRDMA_HMC_IW_RRFFL = 16, 71 IRDMA_HMC_IW_HDR = 17, 72 IRDMA_HMC_IW_MD = 18, 73 IRDMA_HMC_IW_OOISC = 19, 74 IRDMA_HMC_IW_OOISCFFL = 20, 75 IRDMA_HMC_IW_MAX, /* Must be last entry */ 76 }; 77 78 enum irdma_sd_entry_type { 79 IRDMA_SD_TYPE_INVALID = 0, 80 IRDMA_SD_TYPE_PAGED = 1, 81 IRDMA_SD_TYPE_DIRECT = 2, 82 }; 83 84 struct irdma_hmc_obj_info { 85 u64 base; 86 u32 max_cnt; 87 u32 cnt; 88 u64 size; 89 }; 90 91 struct irdma_hmc_bp { 92 enum irdma_sd_entry_type entry_type; 93 struct irdma_dma_mem addr; 94 u32 sd_pd_index; 95 u32 use_cnt; 96 }; 97 98 struct irdma_hmc_pd_entry { 99 struct irdma_hmc_bp bp; 100 u32 sd_index; 101 bool rsrc_pg:1; 102 bool valid:1; 103 }; 104 105 struct irdma_hmc_pd_table { 106 struct irdma_dma_mem pd_page_addr; 107 struct irdma_hmc_pd_entry *pd_entry; 108 struct irdma_virt_mem pd_entry_virt_mem; 109 u32 use_cnt; 110 u32 sd_index; 111 }; 112 113 struct irdma_hmc_sd_entry { 114 enum irdma_sd_entry_type entry_type; 115 bool valid; 116 union { 117 struct irdma_hmc_pd_table pd_table; 118 struct irdma_hmc_bp bp; 119 } u; 120 }; 121 122 struct irdma_hmc_sd_table { 123 struct irdma_virt_mem addr; 124 u32 sd_cnt; 125 u32 use_cnt; 126 struct irdma_hmc_sd_entry *sd_entry; 127 }; 128 129 struct irdma_hmc_info { 130 u32 signature; 131 u8 hmc_fn_id; 132 u16 first_sd_index; 133 struct irdma_hmc_obj_info *hmc_obj; 134 struct irdma_virt_mem hmc_obj_virt_mem; 135 struct irdma_hmc_sd_table sd_table; 136 u16 sd_indexes[IRDMA_HMC_MAX_SD_COUNT]; 137 }; 138 139 struct irdma_update_sd_entry { 140 u64 cmd; 141 u64 data; 142 }; 143 144 struct irdma_update_sds_info { 145 u32 cnt; 146 u8 hmc_fn_id; 147 struct irdma_update_sd_entry entry[IRDMA_MAX_SD_ENTRIES]; 148 }; 149 150 struct irdma_ccq_cqe_info; 151 struct irdma_hmc_fcn_info { 152 u32 vf_id; 153 u8 free_fcn; 154 }; 155 156 struct irdma_hmc_create_obj_info { 157 struct irdma_hmc_info *hmc_info; 158 struct irdma_virt_mem add_sd_virt_mem; 159 u32 rsrc_type; 160 u32 start_idx; 161 u32 count; 162 u32 add_sd_cnt; 163 enum irdma_sd_entry_type entry_type; 164 bool privileged; 165 }; 166 167 struct irdma_hmc_del_obj_info { 168 struct irdma_hmc_info *hmc_info; 169 struct irdma_virt_mem del_sd_virt_mem; 170 u32 rsrc_type; 171 u32 start_idx; 172 u32 count; 173 u32 del_sd_cnt; 174 bool privileged; 175 }; 176 177 int irdma_copy_dma_mem(struct irdma_hw *hw, void *dest_buf, 178 struct irdma_dma_mem *src_mem, u64 src_offset, u64 size); 179 int irdma_sc_create_hmc_obj(struct irdma_sc_dev *dev, 180 struct irdma_hmc_create_obj_info *info); 181 int irdma_sc_del_hmc_obj(struct irdma_sc_dev *dev, 182 struct irdma_hmc_del_obj_info *info, bool reset); 183 int irdma_hmc_sd_one(struct irdma_sc_dev *dev, u8 hmc_fn_id, u64 pa, u32 sd_idx, 184 enum irdma_sd_entry_type type, 185 bool setsd); 186 int irdma_update_sds_noccq(struct irdma_sc_dev *dev, 187 struct irdma_update_sds_info *info); 188 struct irdma_vfdev *irdma_vfdev_from_fpm(struct irdma_sc_dev *dev, 189 u8 hmc_fn_id); 190 struct irdma_hmc_info *irdma_vf_hmcinfo_from_fpm(struct irdma_sc_dev *dev, 191 u8 hmc_fn_id); 192 int irdma_add_sd_table_entry(struct irdma_hw *hw, 193 struct irdma_hmc_info *hmc_info, u32 sd_index, 194 enum irdma_sd_entry_type type, u64 direct_mode_sz); 195 int irdma_add_pd_table_entry(struct irdma_sc_dev *dev, 196 struct irdma_hmc_info *hmc_info, u32 pd_index, 197 struct irdma_dma_mem *rsrc_pg); 198 int irdma_remove_pd_bp(struct irdma_sc_dev *dev, 199 struct irdma_hmc_info *hmc_info, u32 idx); 200 int irdma_prep_remove_sd_bp(struct irdma_hmc_info *hmc_info, u32 idx); 201 int irdma_prep_remove_pd_page(struct irdma_hmc_info *hmc_info, u32 idx); 202 #endif /* IRDMA_HMC_H */ 203