1 /* $FreeBSD$ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 5 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /*- 34 * Intel(R) PRO/Wireless 2100 MiniPCI driver 35 * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm 36 */ 37 38 #include <sys/param.h> 39 #include <sys/sysctl.h> 40 #include <sys/sockio.h> 41 #include <sys/mbuf.h> 42 #include <sys/kernel.h> 43 #include <sys/socket.h> 44 #include <sys/systm.h> 45 #include <sys/malloc.h> 46 #include <sys/module.h> 47 #include <sys/bus.h> 48 #include <sys/endian.h> 49 50 #include <machine/bus.h> 51 #include <machine/resource.h> 52 #include <machine/clock.h> 53 #include <sys/rman.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 58 #include <net/bpf.h> 59 #include <net/if.h> 60 #include <net/if_arp.h> 61 #include <net/ethernet.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_types.h> 65 66 #include <netinet/in.h> 67 #include <netinet/in_systm.h> 68 #include <netinet/in_var.h> 69 #include <netinet/ip.h> 70 #include <netinet/if_ether.h> 71 72 #include <net80211/ieee80211_var.h> 73 #include <net80211/ieee80211_radiotap.h> 74 75 #include <dev/ipw/if_ipwreg.h> 76 #include <dev/ipw/if_ipwvar.h> 77 78 #ifdef IPW_DEBUG 79 #define DPRINTF(x) do { if (ipw_debug > 0) printf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ipw_debug >= (n)) printf x; } while (0) 81 int ipw_debug = 0; 82 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level"); 83 #else 84 #define DPRINTF(x) 85 #define DPRINTFN(n, x) 86 #endif 87 88 MODULE_DEPEND(ipw, pci, 1, 1, 1); 89 MODULE_DEPEND(ipw, wlan, 1, 1, 1); 90 91 struct ipw_ident { 92 uint16_t vendor; 93 uint16_t device; 94 const char *name; 95 }; 96 97 static const struct ipw_ident ipw_ident_table[] = { 98 { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" }, 99 100 { 0, 0, NULL } 101 }; 102 103 static int ipw_dma_alloc(struct ipw_softc *); 104 static void ipw_release(struct ipw_softc *); 105 static int ipw_media_change(struct ifnet *); 106 static void ipw_media_status(struct ifnet *, struct ifmediareq *); 107 static int ipw_newstate(struct ieee80211com *, enum ieee80211_state, int); 108 static uint16_t ipw_read_prom_word(struct ipw_softc *, uint8_t); 109 static void ipw_command_intr(struct ipw_softc *, struct ipw_soft_buf *); 110 static void ipw_newstate_intr(struct ipw_softc *, struct ipw_soft_buf *); 111 static void ipw_data_intr(struct ipw_softc *, struct ipw_status *, 112 struct ipw_soft_bd *, struct ipw_soft_buf *); 113 static void ipw_rx_intr(struct ipw_softc *); 114 static void ipw_release_sbd(struct ipw_softc *, struct ipw_soft_bd *); 115 static void ipw_tx_intr(struct ipw_softc *); 116 static void ipw_intr(void *); 117 static void ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int); 118 static int ipw_cmd(struct ipw_softc *, uint32_t, void *, uint32_t); 119 static int ipw_tx_start(struct ifnet *, struct mbuf *, 120 struct ieee80211_node *); 121 static void ipw_start(struct ifnet *); 122 static void ipw_watchdog(struct ifnet *); 123 static int ipw_ioctl(struct ifnet *, u_long, caddr_t); 124 static void ipw_stop_master(struct ipw_softc *); 125 static int ipw_reset(struct ipw_softc *); 126 static int ipw_load_ucode(struct ipw_softc *, u_char *, int); 127 static int ipw_load_firmware(struct ipw_softc *, u_char *, int); 128 static int ipw_cache_firmware(struct ipw_softc *, void *); 129 static void ipw_free_firmware(struct ipw_softc *); 130 static int ipw_config(struct ipw_softc *); 131 static void ipw_init(void *); 132 static void ipw_stop(void *); 133 static int ipw_sysctl_stats(SYSCTL_HANDLER_ARGS); 134 static int ipw_sysctl_radio(SYSCTL_HANDLER_ARGS); 135 static uint32_t ipw_read_table1(struct ipw_softc *, uint32_t); 136 static void ipw_write_table1(struct ipw_softc *, uint32_t, uint32_t); 137 static int ipw_read_table2(struct ipw_softc *, uint32_t, void *, 138 uint32_t *); 139 static void ipw_read_mem_1(struct ipw_softc *, bus_size_t, uint8_t *, 140 bus_size_t); 141 static void ipw_write_mem_1(struct ipw_softc *, bus_size_t, uint8_t *, 142 bus_size_t); 143 144 static int ipw_probe(device_t); 145 static int ipw_attach(device_t); 146 static int ipw_detach(device_t); 147 static int ipw_shutdown(device_t); 148 static int ipw_suspend(device_t); 149 static int ipw_resume(device_t); 150 151 static device_method_t ipw_methods[] = { 152 /* Device interface */ 153 DEVMETHOD(device_probe, ipw_probe), 154 DEVMETHOD(device_attach, ipw_attach), 155 DEVMETHOD(device_detach, ipw_detach), 156 DEVMETHOD(device_shutdown, ipw_shutdown), 157 DEVMETHOD(device_suspend, ipw_suspend), 158 DEVMETHOD(device_resume, ipw_resume), 159 160 { 0, 0 } 161 }; 162 163 static driver_t ipw_driver = { 164 "ipw", 165 ipw_methods, 166 sizeof (struct ipw_softc) 167 }; 168 169 static devclass_t ipw_devclass; 170 171 DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0); 172 173 /* 174 * Supported rates for 802.11b mode (in 500Kbps unit). 175 */ 176 static const struct ieee80211_rateset ipw_rateset_11b = 177 { 4, { 2, 4, 11, 22 } }; 178 179 static __inline uint8_t 180 MEM_READ_1(struct ipw_softc *sc, uint32_t addr) 181 { 182 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr); 183 return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA); 184 } 185 186 static __inline uint32_t 187 MEM_READ_4(struct ipw_softc *sc, uint32_t addr) 188 { 189 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr); 190 return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA); 191 } 192 193 static int 194 ipw_probe(device_t dev) 195 { 196 const struct ipw_ident *ident; 197 198 for (ident = ipw_ident_table; ident->name != NULL; ident++) { 199 if (pci_get_vendor(dev) == ident->vendor && 200 pci_get_device(dev) == ident->device) { 201 device_set_desc(dev, ident->name); 202 return 0; 203 } 204 } 205 return ENXIO; 206 } 207 208 /* Base Address Register */ 209 #define IPW_PCI_BAR0 0x10 210 211 static int 212 ipw_attach(device_t dev) 213 { 214 struct ipw_softc *sc = device_get_softc(dev); 215 struct ifnet *ifp; 216 struct ieee80211com *ic = &sc->sc_ic; 217 uint16_t val; 218 int error, i; 219 220 sc->sc_dev = dev; 221 222 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 223 MTX_DEF | MTX_RECURSE); 224 225 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 226 device_printf(dev, "chip is in D%d power mode " 227 "-- setting to D0\n", pci_get_powerstate(dev)); 228 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 229 } 230 231 pci_write_config(dev, 0x41, 0, 1); 232 233 /* enable bus-mastering */ 234 pci_enable_busmaster(dev); 235 236 sc->mem_rid = IPW_PCI_BAR0; 237 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, 238 RF_ACTIVE); 239 if (sc->mem == NULL) { 240 device_printf(dev, "could not allocate memory resource\n"); 241 goto fail; 242 } 243 244 sc->sc_st = rman_get_bustag(sc->mem); 245 sc->sc_sh = rman_get_bushandle(sc->mem); 246 247 sc->irq_rid = 0; 248 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid, 249 RF_ACTIVE | RF_SHAREABLE); 250 if (sc->irq == NULL) { 251 device_printf(dev, "could not allocate interrupt resource\n"); 252 goto fail; 253 } 254 255 if (ipw_reset(sc) != 0) { 256 device_printf(dev, "could not reset adapter\n"); 257 goto fail; 258 } 259 260 if (ipw_dma_alloc(sc) != 0) { 261 device_printf(dev, "could not allocate DMA resources\n"); 262 goto fail; 263 } 264 265 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 266 if (ifp == NULL) { 267 device_printf(dev, "can not if_alloc()\n"); 268 goto fail; 269 } 270 271 ifp->if_softc = sc; 272 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 273 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 274 ifp->if_init = ipw_init; 275 ifp->if_ioctl = ipw_ioctl; 276 ifp->if_start = ipw_start; 277 ifp->if_watchdog = ipw_watchdog; 278 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 279 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 280 IFQ_SET_READY(&ifp->if_snd); 281 282 ic->ic_ifp = ifp; 283 ic->ic_phytype = IEEE80211_T_DS; 284 ic->ic_opmode = IEEE80211_M_STA; 285 ic->ic_state = IEEE80211_S_INIT; 286 287 /* set device capabilities */ 288 ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT | 289 IEEE80211_C_PMGT | IEEE80211_C_IBSS | IEEE80211_C_MONITOR; 290 291 /* read MAC address from EEPROM */ 292 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0); 293 ic->ic_myaddr[0] = val >> 8; 294 ic->ic_myaddr[1] = val & 0xff; 295 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1); 296 ic->ic_myaddr[2] = val >> 8; 297 ic->ic_myaddr[3] = val & 0xff; 298 val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2); 299 ic->ic_myaddr[4] = val >> 8; 300 ic->ic_myaddr[5] = val & 0xff; 301 302 /* set supported .11b rates */ 303 ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b; 304 305 /* set supported .11b channels (read from EEPROM) */ 306 if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0) 307 val = 0x7ff; /* default to channels 1-11 */ 308 val <<= 1; 309 for (i = 1; i < 16; i++) { 310 if (val & (1 << i)) { 311 ic->ic_channels[i].ic_freq = 312 ieee80211_ieee2mhz(i, IEEE80211_CHAN_B); 313 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B; 314 } 315 } 316 317 /* check support for radio transmitter switch in EEPROM */ 318 if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8)) 319 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH; 320 321 ieee80211_ifattach(ic); 322 /* override state transition machine */ 323 sc->sc_newstate = ic->ic_newstate; 324 ic->ic_newstate = ipw_newstate; 325 ieee80211_media_init(ic, ipw_media_change, ipw_media_status); 326 327 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 328 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 329 330 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 331 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 332 sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT); 333 334 sc->sc_txtap_len = sizeof sc->sc_txtapu; 335 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 336 sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT); 337 338 /* 339 * Add a few sysctl knobs. 340 */ 341 sc->dwelltime = 100; 342 343 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 344 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "radio", 345 CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I", 346 "radio transmitter switch state (0=off, 1=on)"); 347 348 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 349 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats", 350 CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S", 351 "statistics"); 352 353 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 354 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "dwell", 355 CTLFLAG_RW, &sc->dwelltime, 0, 356 "channel dwell time (ms) for AP/station scanning"); 357 358 /* 359 * Hook our interrupt after all initialization is complete. 360 */ 361 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE, 362 ipw_intr, sc, &sc->sc_ih); 363 if (error != 0) { 364 device_printf(dev, "could not set up interrupt\n"); 365 goto fail; 366 } 367 368 if (bootverbose) 369 ieee80211_announce(ic); 370 371 return 0; 372 373 fail: ipw_detach(dev); 374 return ENXIO; 375 } 376 377 static int 378 ipw_detach(device_t dev) 379 { 380 struct ipw_softc *sc = device_get_softc(dev); 381 struct ieee80211com *ic = &sc->sc_ic; 382 struct ifnet *ifp = ic->ic_ifp; 383 384 IPW_LOCK(sc); 385 386 ipw_stop(sc); 387 ipw_free_firmware(sc); 388 389 IPW_UNLOCK(sc); 390 391 if (ifp != NULL) { 392 bpfdetach(ifp); 393 ieee80211_ifdetach(ic); 394 } 395 396 ipw_release(sc); 397 398 if (sc->irq != NULL) { 399 bus_teardown_intr(dev, sc->irq, sc->sc_ih); 400 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq); 401 } 402 403 if (sc->mem != NULL) 404 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem); 405 if (ifp != NULL) 406 if_free(ifp); 407 408 mtx_destroy(&sc->sc_mtx); 409 410 return 0; 411 } 412 413 static int 414 ipw_dma_alloc(struct ipw_softc *sc) 415 { 416 struct ipw_soft_bd *sbd; 417 struct ipw_soft_hdr *shdr; 418 struct ipw_soft_buf *sbuf; 419 bus_addr_t physaddr; 420 int error, i; 421 422 /* 423 * Allocate and map tx ring. 424 */ 425 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 426 BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0, NULL, 427 NULL, &sc->tbd_dmat); 428 if (error != 0) { 429 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n"); 430 goto fail; 431 } 432 433 error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list, 434 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->tbd_map); 435 if (error != 0) { 436 device_printf(sc->sc_dev, 437 "could not allocate tx ring DMA memory\n"); 438 goto fail; 439 } 440 441 error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list, 442 IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0); 443 if (error != 0) { 444 device_printf(sc->sc_dev, "could not map tx ring DMA memory\n"); 445 goto fail; 446 } 447 448 /* 449 * Allocate and map rx ring. 450 */ 451 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 452 BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0, NULL, 453 NULL, &sc->rbd_dmat); 454 if (error != 0) { 455 device_printf(sc->sc_dev, "could not create rx ring DMA tag\n"); 456 goto fail; 457 } 458 459 error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list, 460 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->rbd_map); 461 if (error != 0) { 462 device_printf(sc->sc_dev, 463 "could not allocate rx ring DMA memory\n"); 464 goto fail; 465 } 466 467 error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list, 468 IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0); 469 if (error != 0) { 470 device_printf(sc->sc_dev, "could not map rx ring DMA memory\n"); 471 goto fail; 472 } 473 474 /* 475 * Allocate and map status ring. 476 */ 477 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 478 BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0, 479 NULL, NULL, &sc->status_dmat); 480 if (error != 0) { 481 device_printf(sc->sc_dev, 482 "could not create status ring DMA tag\n"); 483 goto fail; 484 } 485 486 error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list, 487 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->status_map); 488 if (error != 0) { 489 device_printf(sc->sc_dev, 490 "could not allocate status ring DMA memory\n"); 491 goto fail; 492 } 493 494 error = bus_dmamap_load(sc->status_dmat, sc->status_map, 495 sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys, 496 0); 497 if (error != 0) { 498 device_printf(sc->sc_dev, 499 "could not map status ring DMA memory\n"); 500 goto fail; 501 } 502 503 /* 504 * Allocate command DMA map. 505 */ 506 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 507 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1, 508 sizeof (struct ipw_cmd), 0, NULL, NULL, &sc->cmd_dmat); 509 if (error != 0) { 510 device_printf(sc->sc_dev, "could not create command DMA tag\n"); 511 goto fail; 512 } 513 514 error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map); 515 if (error != 0) { 516 device_printf(sc->sc_dev, 517 "could not create command DMA map\n"); 518 goto fail; 519 } 520 521 /* 522 * Allocate headers DMA maps. 523 */ 524 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 525 BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1, 526 sizeof (struct ipw_hdr), 0, NULL, NULL, &sc->hdr_dmat); 527 if (error != 0) { 528 device_printf(sc->sc_dev, "could not create header DMA tag\n"); 529 goto fail; 530 } 531 532 SLIST_INIT(&sc->free_shdr); 533 for (i = 0; i < IPW_NDATA; i++) { 534 shdr = &sc->shdr_list[i]; 535 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map); 536 if (error != 0) { 537 device_printf(sc->sc_dev, 538 "could not create header DMA map\n"); 539 goto fail; 540 } 541 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next); 542 } 543 544 /* 545 * Allocate tx buffers DMA maps. 546 */ 547 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 548 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0, 549 NULL, NULL, &sc->txbuf_dmat); 550 if (error != 0) { 551 device_printf(sc->sc_dev, "could not create tx DMA tag\n"); 552 goto fail; 553 } 554 555 SLIST_INIT(&sc->free_sbuf); 556 for (i = 0; i < IPW_NDATA; i++) { 557 sbuf = &sc->tx_sbuf_list[i]; 558 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map); 559 if (error != 0) { 560 device_printf(sc->sc_dev, 561 "could not create tx DMA map\n"); 562 goto fail; 563 } 564 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next); 565 } 566 567 /* 568 * Initialize tx ring. 569 */ 570 for (i = 0; i < IPW_NTBD; i++) { 571 sbd = &sc->stbd_list[i]; 572 sbd->bd = &sc->tbd_list[i]; 573 sbd->type = IPW_SBD_TYPE_NOASSOC; 574 } 575 576 /* 577 * Pre-allocate rx buffers and DMA maps. 578 */ 579 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 580 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0, NULL, 581 NULL, &sc->rxbuf_dmat); 582 if (error != 0) { 583 device_printf(sc->sc_dev, "could not create rx DMA tag\n"); 584 goto fail; 585 } 586 587 for (i = 0; i < IPW_NRBD; i++) { 588 sbd = &sc->srbd_list[i]; 589 sbuf = &sc->rx_sbuf_list[i]; 590 sbd->bd = &sc->rbd_list[i]; 591 592 sbuf->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 593 if (sbuf->m == NULL) { 594 device_printf(sc->sc_dev, 595 "could not allocate rx mbuf\n"); 596 error = ENOMEM; 597 goto fail; 598 } 599 600 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map); 601 if (error != 0) { 602 device_printf(sc->sc_dev, 603 "could not create rx DMA map\n"); 604 goto fail; 605 } 606 607 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, 608 mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr, 609 &physaddr, 0); 610 if (error != 0) { 611 device_printf(sc->sc_dev, 612 "could not map rx DMA memory\n"); 613 goto fail; 614 } 615 616 sbd->type = IPW_SBD_TYPE_DATA; 617 sbd->priv = sbuf; 618 sbd->bd->physaddr = htole32(physaddr); 619 sbd->bd->len = htole32(MCLBYTES); 620 } 621 622 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 623 624 return 0; 625 626 fail: ipw_release(sc); 627 return error; 628 } 629 630 static void 631 ipw_release(struct ipw_softc *sc) 632 { 633 struct ipw_soft_buf *sbuf; 634 int i; 635 636 if (sc->tbd_dmat != NULL) { 637 if (sc->stbd_list != NULL) { 638 bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map); 639 bus_dmamem_free(sc->tbd_dmat, sc->tbd_list, 640 sc->tbd_map); 641 } 642 bus_dma_tag_destroy(sc->tbd_dmat); 643 } 644 645 if (sc->rbd_dmat != NULL) { 646 if (sc->rbd_list != NULL) { 647 bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map); 648 bus_dmamem_free(sc->rbd_dmat, sc->rbd_list, 649 sc->rbd_map); 650 } 651 bus_dma_tag_destroy(sc->rbd_dmat); 652 } 653 654 if (sc->status_dmat != NULL) { 655 if (sc->status_list != NULL) { 656 bus_dmamap_unload(sc->status_dmat, sc->status_map); 657 bus_dmamem_free(sc->status_dmat, sc->status_list, 658 sc->status_map); 659 } 660 bus_dma_tag_destroy(sc->status_dmat); 661 } 662 663 for (i = 0; i < IPW_NTBD; i++) 664 ipw_release_sbd(sc, &sc->stbd_list[i]); 665 666 if (sc->cmd_dmat != NULL) { 667 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map); 668 bus_dma_tag_destroy(sc->cmd_dmat); 669 } 670 671 if (sc->hdr_dmat != NULL) { 672 for (i = 0; i < IPW_NDATA; i++) 673 bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map); 674 bus_dma_tag_destroy(sc->hdr_dmat); 675 } 676 677 if (sc->txbuf_dmat != NULL) { 678 for (i = 0; i < IPW_NDATA; i++) { 679 bus_dmamap_destroy(sc->txbuf_dmat, 680 sc->tx_sbuf_list[i].map); 681 } 682 bus_dma_tag_destroy(sc->txbuf_dmat); 683 } 684 685 if (sc->rxbuf_dmat != NULL) { 686 for (i = 0; i < IPW_NRBD; i++) { 687 sbuf = &sc->rx_sbuf_list[i]; 688 if (sbuf->m != NULL) { 689 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, 690 BUS_DMASYNC_POSTREAD); 691 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map); 692 m_freem(sbuf->m); 693 } 694 bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map); 695 } 696 bus_dma_tag_destroy(sc->rxbuf_dmat); 697 } 698 } 699 700 static int 701 ipw_shutdown(device_t dev) 702 { 703 struct ipw_softc *sc = device_get_softc(dev); 704 705 ipw_stop(sc); 706 707 return 0; 708 } 709 710 static int 711 ipw_suspend(device_t dev) 712 { 713 struct ipw_softc *sc = device_get_softc(dev); 714 715 ipw_stop(sc); 716 717 return 0; 718 } 719 720 static int 721 ipw_resume(device_t dev) 722 { 723 struct ipw_softc *sc = device_get_softc(dev); 724 struct ifnet *ifp = sc->sc_ic.ic_ifp; 725 726 IPW_LOCK(sc); 727 728 pci_write_config(dev, 0x41, 0, 1); 729 730 if (ifp->if_flags & IFF_UP) { 731 ifp->if_init(ifp->if_softc); 732 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 733 ifp->if_start(ifp); 734 } 735 736 IPW_UNLOCK(sc); 737 738 return 0; 739 } 740 741 static int 742 ipw_media_change(struct ifnet *ifp) 743 { 744 struct ipw_softc *sc = ifp->if_softc; 745 int error; 746 747 IPW_LOCK(sc); 748 749 error = ieee80211_media_change(ifp); 750 if (error != ENETRESET) { 751 IPW_UNLOCK(sc); 752 return error; 753 } 754 755 if ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 756 ipw_init(sc); 757 758 IPW_UNLOCK(sc); 759 760 return 0; 761 } 762 763 /* 764 * The firmware automaticly adapt the transmit speed. We report the current 765 * transmit speed here. 766 */ 767 static void 768 ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr) 769 { 770 #define N(a) (sizeof (a) / sizeof (a[0])) 771 struct ipw_softc *sc = ifp->if_softc; 772 struct ieee80211com *ic = &sc->sc_ic; 773 static const struct { 774 uint32_t val; 775 int rate; 776 } rates[] = { 777 { IPW_RATE_DS1, 2 }, 778 { IPW_RATE_DS2, 4 }, 779 { IPW_RATE_DS5, 11 }, 780 { IPW_RATE_DS11, 22 }, 781 }; 782 uint32_t val; 783 int rate, i; 784 785 imr->ifm_status = IFM_AVALID; 786 imr->ifm_active = IFM_IEEE80211; 787 if (ic->ic_state == IEEE80211_S_RUN) 788 imr->ifm_status |= IFM_ACTIVE; 789 790 /* read current transmission rate from adapter */ 791 val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf; 792 793 /* convert ipw rate to 802.11 rate */ 794 for (i = 0; i < N(rates) && rates[i].val != val; i++); 795 rate = (i < N(rates)) ? rates[i].rate : 0; 796 797 imr->ifm_active |= IFM_IEEE80211_11B; 798 imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B); 799 switch (ic->ic_opmode) { 800 case IEEE80211_M_STA: 801 break; 802 803 case IEEE80211_M_IBSS: 804 imr->ifm_active |= IFM_IEEE80211_IBSS; 805 break; 806 807 case IEEE80211_M_MONITOR: 808 imr->ifm_active |= IFM_IEEE80211_MONITOR; 809 break; 810 811 case IEEE80211_M_AHDEMO: 812 case IEEE80211_M_HOSTAP: 813 /* should not get there */ 814 break; 815 } 816 #undef N 817 } 818 819 static int 820 ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 821 { 822 struct ifnet *ifp = ic->ic_ifp; 823 struct ipw_softc *sc = ifp->if_softc; 824 struct ieee80211_node *ni; 825 uint8_t macaddr[IEEE80211_ADDR_LEN]; 826 uint32_t len; 827 828 switch (nstate) { 829 case IEEE80211_S_RUN: 830 DELAY(200); /* firmware needs a short delay here */ 831 832 len = IEEE80211_ADDR_LEN; 833 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len); 834 835 ni = ieee80211_find_node(&ic->ic_scan, macaddr); 836 if (ni == NULL) 837 break; 838 839 ieee80211_ref_node(ni); 840 ieee80211_sta_join(ic, ni); 841 ieee80211_node_authorize(ni); 842 843 if (ic->ic_opmode == IEEE80211_M_STA) 844 ieee80211_notify_node_join(ic, ni, 1); 845 break; 846 847 case IEEE80211_S_INIT: 848 case IEEE80211_S_SCAN: 849 case IEEE80211_S_AUTH: 850 case IEEE80211_S_ASSOC: 851 break; 852 } 853 854 ic->ic_state = nstate; 855 return 0; 856 } 857 858 /* 859 * Read 16 bits at address 'addr' from the serial EEPROM. 860 */ 861 static uint16_t 862 ipw_read_prom_word(struct ipw_softc *sc, uint8_t addr) 863 { 864 uint32_t tmp; 865 uint16_t val; 866 int n; 867 868 /* clock C once before the first command */ 869 IPW_EEPROM_CTL(sc, 0); 870 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 871 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 872 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 873 874 /* write start bit (1) */ 875 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D); 876 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C); 877 878 /* write READ opcode (10) */ 879 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D); 880 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C); 881 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 882 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 883 884 /* write address A7-A0 */ 885 for (n = 7; n >= 0; n--) { 886 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | 887 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D)); 888 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | 889 (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C); 890 } 891 892 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 893 894 /* read data Q15-Q0 */ 895 val = 0; 896 for (n = 15; n >= 0; n--) { 897 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C); 898 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 899 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL); 900 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n; 901 } 902 903 IPW_EEPROM_CTL(sc, 0); 904 905 /* clear Chip Select and clock C */ 906 IPW_EEPROM_CTL(sc, IPW_EEPROM_S); 907 IPW_EEPROM_CTL(sc, 0); 908 IPW_EEPROM_CTL(sc, IPW_EEPROM_C); 909 910 return le16toh(val); 911 } 912 913 static void 914 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf) 915 { 916 struct ipw_cmd *cmd; 917 918 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 919 920 cmd = mtod(sbuf->m, struct ipw_cmd *); 921 922 DPRINTFN(2, ("cmd ack'ed (%u, %u, %u, %u, %u)\n", le32toh(cmd->type), 923 le32toh(cmd->subtype), le32toh(cmd->seq), le32toh(cmd->len), 924 le32toh(cmd->status))); 925 926 wakeup(sc); 927 } 928 929 static void 930 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf) 931 { 932 struct ieee80211com *ic = &sc->sc_ic; 933 uint32_t state; 934 935 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 936 937 state = le32toh(*mtod(sbuf->m, uint32_t *)); 938 939 DPRINTFN(2, ("entering state %u\n", state)); 940 941 switch (state) { 942 case IPW_STATE_ASSOCIATED: 943 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 944 break; 945 946 case IPW_STATE_SCANNING: 947 /* don't leave run state on background scan */ 948 if (ic->ic_state != IEEE80211_S_RUN) 949 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 950 951 ic->ic_flags |= IEEE80211_F_SCAN; 952 break; 953 954 case IPW_STATE_SCAN_COMPLETE: 955 ieee80211_notify_scan_done(ic); 956 ic->ic_flags &= ~IEEE80211_F_SCAN; 957 break; 958 959 case IPW_STATE_ASSOCIATION_LOST: 960 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 961 break; 962 963 case IPW_STATE_RADIO_DISABLED: 964 ic->ic_ifp->if_flags &= ~IFF_UP; 965 ipw_stop(sc); 966 break; 967 } 968 } 969 970 /* 971 * XXX: Hack to set the current channel to the value advertised in beacons or 972 * probe responses. Only used during AP detection. 973 */ 974 static void 975 ipw_fix_channel(struct ieee80211com *ic, struct mbuf *m) 976 { 977 struct ieee80211_frame *wh; 978 uint8_t subtype; 979 uint8_t *frm, *efrm; 980 981 wh = mtod(m, struct ieee80211_frame *); 982 983 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT) 984 return; 985 986 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 987 988 if (subtype != IEEE80211_FC0_SUBTYPE_BEACON && 989 subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP) 990 return; 991 992 frm = (uint8_t *)(wh + 1); 993 efrm = mtod(m, uint8_t *) + m->m_len; 994 995 frm += 12; /* skip tstamp, bintval and capinfo fields */ 996 while (frm < efrm) { 997 if (*frm == IEEE80211_ELEMID_DSPARMS) 998 #if IEEE80211_CHAN_MAX < 255 999 if (frm[2] <= IEEE80211_CHAN_MAX) 1000 #endif 1001 ic->ic_curchan = &ic->ic_channels[frm[2]]; 1002 1003 frm += frm[1] + 2; 1004 } 1005 } 1006 1007 static void 1008 ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status, 1009 struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf) 1010 { 1011 struct ieee80211com *ic = &sc->sc_ic; 1012 struct ifnet *ifp = ic->ic_ifp; 1013 struct mbuf *m; 1014 struct ieee80211_frame *wh; 1015 struct ieee80211_node *ni; 1016 bus_addr_t physaddr; 1017 int error; 1018 1019 if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) || 1020 le32toh(status->len) > MCLBYTES) 1021 return; 1022 1023 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD); 1024 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map); 1025 1026 /* finalize mbuf */ 1027 m = sbuf->m; 1028 m->m_pkthdr.rcvif = ifp; 1029 m->m_pkthdr.len = m->m_len = le32toh(status->len); 1030 1031 if (sc->sc_drvbpf != NULL) { 1032 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap; 1033 1034 tap->wr_flags = 0; 1035 tap->wr_antsignal = status->rssi; 1036 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1037 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1038 1039 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1040 } 1041 1042 if (ic->ic_state == IEEE80211_S_SCAN) 1043 ipw_fix_channel(ic, m); 1044 1045 wh = mtod(m, struct ieee80211_frame *); 1046 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1047 1048 /* send the frame to the 802.11 layer */ 1049 ieee80211_input(ic, m, ni, status->rssi, 0); 1050 1051 /* node is no longer needed */ 1052 ieee80211_free_node(ni); 1053 1054 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1055 if (m == NULL) { 1056 device_printf(sc->sc_dev, "could not allocate rx mbuf\n"); 1057 sbuf->m = NULL; 1058 return; 1059 } 1060 1061 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(m, void *), 1062 MCLBYTES, ipw_dma_map_addr, &physaddr, 0); 1063 if (error != 0) { 1064 device_printf(sc->sc_dev, "could not map rx DMA memory\n"); 1065 m_freem(m); 1066 sbuf->m = NULL; 1067 return; 1068 } 1069 1070 sbuf->m = m; 1071 sbd->bd->physaddr = htole32(physaddr); 1072 1073 DPRINTFN(5, ("received frame len=%u, rssi=%u\n", le32toh(status->len), 1074 status->rssi)); 1075 1076 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 1077 } 1078 1079 static void 1080 ipw_rx_intr(struct ipw_softc *sc) 1081 { 1082 struct ipw_status *status; 1083 struct ipw_soft_bd *sbd; 1084 struct ipw_soft_buf *sbuf; 1085 uint32_t r, i; 1086 1087 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1088 return; 1089 1090 r = CSR_READ_4(sc, IPW_CSR_RX_READ); 1091 1092 bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD); 1093 1094 for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) { 1095 status = &sc->status_list[i]; 1096 sbd = &sc->srbd_list[i]; 1097 sbuf = sbd->priv; 1098 1099 switch (le16toh(status->code) & 0xf) { 1100 case IPW_STATUS_CODE_COMMAND: 1101 ipw_command_intr(sc, sbuf); 1102 break; 1103 1104 case IPW_STATUS_CODE_NEWSTATE: 1105 ipw_newstate_intr(sc, sbuf); 1106 break; 1107 1108 case IPW_STATUS_CODE_DATA_802_3: 1109 case IPW_STATUS_CODE_DATA_802_11: 1110 ipw_data_intr(sc, status, sbd, sbuf); 1111 break; 1112 1113 case IPW_STATUS_CODE_NOTIFICATION: 1114 DPRINTFN(2, ("received notification\n")); 1115 break; 1116 1117 default: 1118 device_printf(sc->sc_dev, "unknown status code %u\n", 1119 le16toh(status->code)); 1120 } 1121 1122 /* firmware was killed, stop processing received frames */ 1123 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1124 return; 1125 1126 sbd->bd->flags = 0; 1127 } 1128 1129 bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE); 1130 1131 /* kick the firmware */ 1132 sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1; 1133 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur); 1134 } 1135 1136 static void 1137 ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd) 1138 { 1139 struct ipw_soft_hdr *shdr; 1140 struct ipw_soft_buf *sbuf; 1141 1142 switch (sbd->type) { 1143 case IPW_SBD_TYPE_COMMAND: 1144 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, 1145 BUS_DMASYNC_POSTWRITE); 1146 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map); 1147 break; 1148 1149 case IPW_SBD_TYPE_HEADER: 1150 shdr = sbd->priv; 1151 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE); 1152 bus_dmamap_unload(sc->hdr_dmat, shdr->map); 1153 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next); 1154 break; 1155 1156 case IPW_SBD_TYPE_DATA: 1157 sbuf = sbd->priv; 1158 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, 1159 BUS_DMASYNC_POSTWRITE); 1160 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map); 1161 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next); 1162 1163 m_freem(sbuf->m); 1164 ieee80211_free_node(sbuf->ni); 1165 1166 sc->sc_tx_timer = 0; 1167 break; 1168 } 1169 1170 sbd->type = IPW_SBD_TYPE_NOASSOC; 1171 } 1172 1173 static void 1174 ipw_tx_intr(struct ipw_softc *sc) 1175 { 1176 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1177 struct ipw_soft_bd *sbd; 1178 uint32_t r, i; 1179 1180 if (!(sc->flags & IPW_FLAG_FW_INITED)) 1181 return; 1182 1183 r = CSR_READ_4(sc, IPW_CSR_TX_READ); 1184 1185 for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) { 1186 sbd = &sc->stbd_list[i]; 1187 1188 if (sbd->type == IPW_SBD_TYPE_DATA) 1189 ifp->if_opackets++; 1190 1191 ipw_release_sbd(sc, sbd); 1192 sc->txfree++; 1193 } 1194 1195 /* remember what the firmware has processed */ 1196 sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1; 1197 1198 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1199 ipw_start(ifp); 1200 } 1201 1202 static void 1203 ipw_intr(void *arg) 1204 { 1205 struct ipw_softc *sc = arg; 1206 uint32_t r; 1207 1208 IPW_LOCK(sc); 1209 1210 if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff) { 1211 IPW_UNLOCK(sc); 1212 return; 1213 } 1214 1215 /* disable interrupts */ 1216 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1217 1218 if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) { 1219 device_printf(sc->sc_dev, "fatal error\n"); 1220 sc->sc_ic.ic_ifp->if_flags &= ~IFF_UP; 1221 ipw_stop(sc); 1222 } 1223 1224 if (r & IPW_INTR_FW_INIT_DONE) { 1225 if (!(r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR))) 1226 wakeup(sc); 1227 } 1228 1229 if (r & IPW_INTR_RX_TRANSFER) 1230 ipw_rx_intr(sc); 1231 1232 if (r & IPW_INTR_TX_TRANSFER) 1233 ipw_tx_intr(sc); 1234 1235 /* acknowledge all interrupts */ 1236 CSR_WRITE_4(sc, IPW_CSR_INTR, r); 1237 1238 /* re-enable interrupts */ 1239 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK); 1240 1241 IPW_UNLOCK(sc); 1242 } 1243 1244 static void 1245 ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 1246 { 1247 if (error != 0) 1248 return; 1249 1250 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 1251 1252 *(bus_addr_t *)arg = segs[0].ds_addr; 1253 } 1254 1255 /* 1256 * Send a command to the firmware and wait for the acknowledgement. 1257 */ 1258 static int 1259 ipw_cmd(struct ipw_softc *sc, uint32_t type, void *data, uint32_t len) 1260 { 1261 struct ipw_soft_bd *sbd; 1262 bus_addr_t physaddr; 1263 int error; 1264 1265 sbd = &sc->stbd_list[sc->txcur]; 1266 1267 error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd, 1268 sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0); 1269 if (error != 0) { 1270 device_printf(sc->sc_dev, "could not map command DMA memory\n"); 1271 return error; 1272 } 1273 1274 sc->cmd.type = htole32(type); 1275 sc->cmd.subtype = 0; 1276 sc->cmd.len = htole32(len); 1277 sc->cmd.seq = 0; 1278 bcopy(data, sc->cmd.data, len); 1279 1280 sbd->type = IPW_SBD_TYPE_COMMAND; 1281 sbd->bd->physaddr = htole32(physaddr); 1282 sbd->bd->len = htole32(sizeof (struct ipw_cmd)); 1283 sbd->bd->nfrag = 1; 1284 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND | 1285 IPW_BD_FLAG_TX_LAST_FRAGMENT; 1286 1287 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE); 1288 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE); 1289 1290 DPRINTFN(2, ("sending command (%u, %u, %u, %u)\n", type, 0, 0, len)); 1291 1292 /* kick firmware */ 1293 sc->txfree--; 1294 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1295 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1296 1297 /* wait at most one second for command to complete */ 1298 return msleep(sc, &sc->sc_mtx, 0, "ipwcmd", hz); 1299 } 1300 1301 static int 1302 ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni) 1303 { 1304 struct ipw_softc *sc = ifp->if_softc; 1305 struct ieee80211com *ic = &sc->sc_ic; 1306 struct ieee80211_frame *wh; 1307 struct ipw_soft_bd *sbd; 1308 struct ipw_soft_hdr *shdr; 1309 struct ipw_soft_buf *sbuf; 1310 struct ieee80211_key *k; 1311 struct mbuf *mnew; 1312 bus_dma_segment_t segs[IPW_MAX_NSEG]; 1313 bus_addr_t physaddr; 1314 int nsegs, error, i; 1315 1316 wh = mtod(m0, struct ieee80211_frame *); 1317 1318 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1319 k = ieee80211_crypto_encap(ic, ni, m0); 1320 if (k == NULL) { 1321 m_freem(m0); 1322 return ENOBUFS; 1323 } 1324 1325 /* packet header may have moved, reset our local pointer */ 1326 wh = mtod(m0, struct ieee80211_frame *); 1327 } 1328 1329 if (sc->sc_drvbpf != NULL) { 1330 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap; 1331 1332 tap->wt_flags = 0; 1333 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1334 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1335 1336 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1337 } 1338 1339 shdr = SLIST_FIRST(&sc->free_shdr); 1340 sbuf = SLIST_FIRST(&sc->free_sbuf); 1341 KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool")); 1342 1343 shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND); 1344 shdr->hdr.subtype = 0; 1345 shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0; 1346 shdr->hdr.encrypt = 0; 1347 shdr->hdr.keyidx = 0; 1348 shdr->hdr.keysz = 0; 1349 shdr->hdr.fragmentsz = 0; 1350 IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2); 1351 if (ic->ic_opmode == IEEE80211_M_STA) 1352 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3); 1353 else 1354 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1); 1355 1356 /* trim IEEE802.11 header */ 1357 m_adj(m0, sizeof (struct ieee80211_frame)); 1358 1359 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, segs, 1360 &nsegs, 0); 1361 if (error != 0 && error != EFBIG) { 1362 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1363 error); 1364 m_freem(m0); 1365 return error; 1366 } 1367 if (error != 0) { 1368 mnew = m_defrag(m0, M_DONTWAIT); 1369 if (mnew == NULL) { 1370 device_printf(sc->sc_dev, 1371 "could not defragment mbuf\n"); 1372 m_freem(m0); 1373 return ENOBUFS; 1374 } 1375 m0 = mnew; 1376 1377 error = bus_dmamap_load_mbuf_sg(sc->txbuf_dmat, sbuf->map, m0, 1378 segs, &nsegs, 0); 1379 if (error != 0) { 1380 device_printf(sc->sc_dev, 1381 "could not map mbuf (error %d)\n", error); 1382 m_freem(m0); 1383 return error; 1384 } 1385 } 1386 1387 error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr, 1388 sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0); 1389 if (error != 0) { 1390 device_printf(sc->sc_dev, "could not map header DMA memory\n"); 1391 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map); 1392 m_freem(m0); 1393 return error; 1394 } 1395 1396 SLIST_REMOVE_HEAD(&sc->free_sbuf, next); 1397 SLIST_REMOVE_HEAD(&sc->free_shdr, next); 1398 1399 sbd = &sc->stbd_list[sc->txcur]; 1400 sbd->type = IPW_SBD_TYPE_HEADER; 1401 sbd->priv = shdr; 1402 sbd->bd->physaddr = htole32(physaddr); 1403 sbd->bd->len = htole32(sizeof (struct ipw_hdr)); 1404 sbd->bd->nfrag = 1 + nsegs; 1405 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 | 1406 IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT; 1407 1408 DPRINTFN(5, ("sending tx hdr (%u, %u, %u, %u, %6D, %6D)\n", 1409 shdr->hdr.type, shdr->hdr.subtype, shdr->hdr.encrypted, 1410 shdr->hdr.encrypt, shdr->hdr.src_addr, ":", shdr->hdr.dst_addr, 1411 ":")); 1412 1413 sc->txfree--; 1414 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1415 1416 sbuf->m = m0; 1417 sbuf->ni = ni; 1418 1419 for (i = 0; i < nsegs; i++) { 1420 sbd = &sc->stbd_list[sc->txcur]; 1421 1422 sbd->bd->physaddr = htole32(segs[i].ds_addr); 1423 sbd->bd->len = htole32(segs[i].ds_len); 1424 sbd->bd->nfrag = 0; 1425 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3; 1426 if (i == nsegs - 1) { 1427 sbd->type = IPW_SBD_TYPE_DATA; 1428 sbd->priv = sbuf; 1429 sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT; 1430 } else { 1431 sbd->type = IPW_SBD_TYPE_NOASSOC; 1432 sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT; 1433 } 1434 1435 DPRINTFN(5, ("sending fragment (%d, %d)\n", i, segs[i].ds_len)); 1436 1437 sc->txfree--; 1438 sc->txcur = (sc->txcur + 1) % IPW_NTBD; 1439 } 1440 1441 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE); 1442 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE); 1443 bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE); 1444 1445 /* kick firmware */ 1446 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 1447 1448 return 0; 1449 } 1450 1451 static void 1452 ipw_start(struct ifnet *ifp) 1453 { 1454 struct ipw_softc *sc = ifp->if_softc; 1455 struct ieee80211com *ic = &sc->sc_ic; 1456 struct mbuf *m0; 1457 struct ether_header *eh; 1458 struct ieee80211_node *ni; 1459 1460 IPW_LOCK(sc); 1461 1462 if (ic->ic_state != IEEE80211_S_RUN) { 1463 IPW_UNLOCK(sc); 1464 return; 1465 } 1466 1467 for (;;) { 1468 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 1469 if (m0 == NULL) 1470 break; 1471 1472 if (sc->txfree < 1 + IPW_MAX_NSEG) { 1473 IFQ_DRV_PREPEND(&ifp->if_snd, m0); 1474 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1475 break; 1476 } 1477 1478 if (m0->m_len < sizeof (struct ether_header) && 1479 (m0 = m_pullup(m0, sizeof (struct ether_header))) == NULL) 1480 continue; 1481 1482 eh = mtod(m0, struct ether_header *); 1483 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1484 if (ni == NULL) { 1485 m_freem(m0); 1486 continue; 1487 } 1488 BPF_MTAP(ifp, m0); 1489 1490 m0 = ieee80211_encap(ic, m0, ni); 1491 if (m0 == NULL) { 1492 ieee80211_free_node(ni); 1493 continue; 1494 } 1495 1496 if (ic->ic_rawbpf != NULL) 1497 bpf_mtap(ic->ic_rawbpf, m0); 1498 1499 if (ipw_tx_start(ifp, m0, ni) != 0) { 1500 ieee80211_free_node(ni); 1501 ifp->if_oerrors++; 1502 break; 1503 } 1504 1505 /* start watchdog timer */ 1506 sc->sc_tx_timer = 5; 1507 ifp->if_timer = 1; 1508 } 1509 1510 IPW_UNLOCK(sc); 1511 } 1512 1513 static void 1514 ipw_watchdog(struct ifnet *ifp) 1515 { 1516 struct ipw_softc *sc = ifp->if_softc; 1517 struct ieee80211com *ic = &sc->sc_ic; 1518 1519 ifp->if_timer = 0; 1520 1521 if (sc->sc_tx_timer > 0) { 1522 if (--sc->sc_tx_timer == 0) { 1523 if_printf(ifp, "device timeout\n"); 1524 ifp->if_oerrors++; 1525 ifp->if_flags &= ~IFF_UP; 1526 ipw_stop(sc); 1527 return; 1528 } 1529 ifp->if_timer = 1; 1530 } 1531 1532 ieee80211_watchdog(ic); 1533 } 1534 1535 static int 1536 ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1537 { 1538 struct ipw_softc *sc = ifp->if_softc; 1539 struct ieee80211com *ic = &sc->sc_ic; 1540 struct ifreq *ifr; 1541 int error = 0; 1542 1543 IPW_LOCK(sc); 1544 1545 switch (cmd) { 1546 case SIOCSIFFLAGS: 1547 if (ifp->if_flags & IFF_UP) { 1548 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1549 ipw_init(sc); 1550 } else { 1551 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1552 ipw_stop(sc); 1553 } 1554 break; 1555 1556 case SIOCSLOADFW: 1557 /* only super-user can do that! */ 1558 if ((error = suser(curthread)) != 0) 1559 break; 1560 1561 ifr = (struct ifreq *)data; 1562 error = ipw_cache_firmware(sc, ifr->ifr_data); 1563 break; 1564 1565 case SIOCSKILLFW: 1566 /* only super-user can do that! */ 1567 if ((error = suser(curthread)) != 0) 1568 break; 1569 1570 ifp->if_flags &= ~IFF_UP; 1571 ipw_stop(sc); 1572 ipw_free_firmware(sc); 1573 break; 1574 1575 default: 1576 error = ieee80211_ioctl(ic, cmd, data); 1577 } 1578 1579 if (error == ENETRESET) { 1580 if ((ifp->if_flags & IFF_UP) && 1581 (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1582 ipw_init(sc); 1583 error = 0; 1584 } 1585 1586 IPW_UNLOCK(sc); 1587 1588 return error; 1589 } 1590 1591 static void 1592 ipw_stop_master(struct ipw_softc *sc) 1593 { 1594 int ntries; 1595 1596 /* disable interrupts */ 1597 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0); 1598 1599 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER); 1600 for (ntries = 0; ntries < 50; ntries++) { 1601 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED) 1602 break; 1603 DELAY(10); 1604 } 1605 if (ntries == 50) 1606 device_printf(sc->sc_dev, "timeout waiting for master\n"); 1607 1608 CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) | 1609 IPW_RST_PRINCETON_RESET); 1610 1611 sc->flags &= ~IPW_FLAG_FW_INITED; 1612 } 1613 1614 static int 1615 ipw_reset(struct ipw_softc *sc) 1616 { 1617 int ntries; 1618 1619 ipw_stop_master(sc); 1620 1621 /* move adapter to D0 state */ 1622 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) | 1623 IPW_CTL_INIT); 1624 1625 /* wait for clock stabilization */ 1626 for (ntries = 0; ntries < 1000; ntries++) { 1627 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY) 1628 break; 1629 DELAY(200); 1630 } 1631 if (ntries == 1000) 1632 return EIO; 1633 1634 CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) | 1635 IPW_RST_SW_RESET); 1636 1637 DELAY(10); 1638 1639 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) | 1640 IPW_CTL_INIT); 1641 1642 return 0; 1643 } 1644 1645 /* 1646 * Upload the microcode to the device. 1647 */ 1648 static int 1649 ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size) 1650 { 1651 int ntries; 1652 1653 MEM_WRITE_4(sc, 0x3000e0, 0x80000000); 1654 CSR_WRITE_4(sc, IPW_CSR_RST, 0); 1655 1656 MEM_WRITE_2(sc, 0x220000, 0x0703); 1657 MEM_WRITE_2(sc, 0x220000, 0x0707); 1658 1659 MEM_WRITE_1(sc, 0x210014, 0x72); 1660 MEM_WRITE_1(sc, 0x210014, 0x72); 1661 1662 MEM_WRITE_1(sc, 0x210000, 0x40); 1663 MEM_WRITE_1(sc, 0x210000, 0x00); 1664 MEM_WRITE_1(sc, 0x210000, 0x40); 1665 1666 MEM_WRITE_MULTI_1(sc, 0x210010, uc, size); 1667 1668 MEM_WRITE_1(sc, 0x210000, 0x00); 1669 MEM_WRITE_1(sc, 0x210000, 0x00); 1670 MEM_WRITE_1(sc, 0x210000, 0x80); 1671 1672 MEM_WRITE_2(sc, 0x220000, 0x0703); 1673 MEM_WRITE_2(sc, 0x220000, 0x0707); 1674 1675 MEM_WRITE_1(sc, 0x210014, 0x72); 1676 MEM_WRITE_1(sc, 0x210014, 0x72); 1677 1678 MEM_WRITE_1(sc, 0x210000, 0x00); 1679 MEM_WRITE_1(sc, 0x210000, 0x80); 1680 1681 for (ntries = 0; ntries < 10; ntries++) { 1682 if (MEM_READ_1(sc, 0x210000) & 1) 1683 break; 1684 DELAY(10); 1685 } 1686 if (ntries == 10) { 1687 device_printf(sc->sc_dev, 1688 "timeout waiting for ucode to initialize\n"); 1689 return EIO; 1690 } 1691 1692 MEM_WRITE_4(sc, 0x3000e0, 0); 1693 1694 return 0; 1695 } 1696 1697 /* set of macros to handle unaligned little endian data in firmware image */ 1698 #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24) 1699 #define GETLE16(p) ((p)[0] | (p)[1] << 8) 1700 static int 1701 ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size) 1702 { 1703 u_char *p, *end; 1704 uint32_t dst; 1705 uint16_t len; 1706 int error; 1707 1708 p = fw; 1709 end = fw + size; 1710 while (p < end) { 1711 dst = GETLE32(p); p += 4; 1712 len = GETLE16(p); p += 2; 1713 1714 ipw_write_mem_1(sc, dst, p, len); 1715 p += len; 1716 } 1717 1718 CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK | 1719 IPW_IO_LED_OFF); 1720 1721 /* enable interrupts */ 1722 CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK); 1723 1724 /* kick the firmware */ 1725 CSR_WRITE_4(sc, IPW_CSR_RST, 0); 1726 1727 CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) | 1728 IPW_CTL_ALLOW_STANDBY); 1729 1730 /* wait at most one second for firmware initialization to complete */ 1731 if ((error = msleep(sc, &sc->sc_mtx, 0, "ipwinit", hz)) != 0) { 1732 device_printf(sc->sc_dev, "timeout waiting for firmware " 1733 "initialization to complete\n"); 1734 return error; 1735 } 1736 1737 CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) | 1738 IPW_IO_GPIO1_MASK | IPW_IO_GPIO3_MASK); 1739 1740 return 0; 1741 } 1742 1743 /* 1744 * Store firmware into kernel memory so we can download it when we need to, 1745 * e.g when the adapter wakes up from suspend mode. 1746 */ 1747 static int 1748 ipw_cache_firmware(struct ipw_softc *sc, void *data) 1749 { 1750 struct ipw_firmware *fw = &sc->fw; 1751 struct ipw_firmware_hdr hdr; 1752 u_char *p = data; 1753 int error; 1754 1755 ipw_free_firmware(sc); 1756 1757 IPW_UNLOCK(sc); 1758 1759 if ((error = copyin(data, &hdr, sizeof hdr)) != 0) 1760 goto fail1; 1761 1762 fw->main_size = le32toh(hdr.main_size); 1763 fw->ucode_size = le32toh(hdr.ucode_size); 1764 p += sizeof hdr; 1765 1766 fw->main = malloc(fw->main_size, M_DEVBUF, M_NOWAIT); 1767 if (fw->main == NULL) { 1768 error = ENOMEM; 1769 goto fail1; 1770 } 1771 1772 fw->ucode = malloc(fw->ucode_size, M_DEVBUF, M_NOWAIT); 1773 if (fw->ucode == NULL) { 1774 error = ENOMEM; 1775 goto fail2; 1776 } 1777 1778 if ((error = copyin(p, fw->main, fw->main_size)) != 0) 1779 goto fail3; 1780 1781 p += fw->main_size; 1782 if ((error = copyin(p, fw->ucode, fw->ucode_size)) != 0) 1783 goto fail3; 1784 1785 DPRINTF(("Firmware cached: main %u, ucode %u\n", fw->main_size, 1786 fw->ucode_size)); 1787 1788 IPW_LOCK(sc); 1789 1790 sc->flags |= IPW_FLAG_FW_CACHED; 1791 1792 return 0; 1793 1794 fail3: free(fw->ucode, M_DEVBUF); 1795 fail2: free(fw->main, M_DEVBUF); 1796 fail1: IPW_LOCK(sc); 1797 1798 return error; 1799 } 1800 1801 static void 1802 ipw_free_firmware(struct ipw_softc *sc) 1803 { 1804 if (!(sc->flags & IPW_FLAG_FW_CACHED)) 1805 return; 1806 1807 free(sc->fw.main, M_DEVBUF); 1808 free(sc->fw.ucode, M_DEVBUF); 1809 1810 sc->flags &= ~IPW_FLAG_FW_CACHED; 1811 } 1812 1813 static int 1814 ipw_config(struct ipw_softc *sc) 1815 { 1816 struct ieee80211com *ic = &sc->sc_ic; 1817 struct ifnet *ifp = ic->ic_ifp; 1818 struct ipw_security security; 1819 struct ieee80211_key *k; 1820 struct ipw_wep_key wepkey; 1821 struct ipw_scan_options options; 1822 struct ipw_configuration config; 1823 uint32_t data; 1824 int error, i; 1825 1826 switch (ic->ic_opmode) { 1827 case IEEE80211_M_STA: 1828 case IEEE80211_M_HOSTAP: 1829 data = htole32(IPW_MODE_BSS); 1830 break; 1831 1832 case IEEE80211_M_IBSS: 1833 case IEEE80211_M_AHDEMO: 1834 data = htole32(IPW_MODE_IBSS); 1835 break; 1836 1837 case IEEE80211_M_MONITOR: 1838 data = htole32(IPW_MODE_MONITOR); 1839 break; 1840 } 1841 DPRINTF(("Setting mode to %u\n", le32toh(data))); 1842 error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data); 1843 if (error != 0) 1844 return error; 1845 1846 if (ic->ic_opmode == IEEE80211_M_IBSS || 1847 ic->ic_opmode == IEEE80211_M_MONITOR) { 1848 data = htole32(ieee80211_chan2ieee(ic, ic->ic_ibss_chan)); 1849 DPRINTF(("Setting channel to %u\n", le32toh(data))); 1850 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data); 1851 if (error != 0) 1852 return error; 1853 } 1854 1855 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1856 DPRINTF(("Enabling adapter\n")); 1857 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0); 1858 } 1859 1860 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp)); 1861 DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":")); 1862 error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr, 1863 IEEE80211_ADDR_LEN); 1864 if (error != 0) 1865 return error; 1866 1867 config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK | 1868 IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE); 1869 if (ic->ic_opmode == IEEE80211_M_IBSS) 1870 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START); 1871 if (ifp->if_flags & IFF_PROMISC) 1872 config.flags |= htole32(IPW_CFG_PROMISCUOUS); 1873 config.bss_chan = htole32(0x3fff); /* channels 1-14 */ 1874 config.ibss_chan = htole32(0x7ff); /* channels 1-11 */ 1875 DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags))); 1876 error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config); 1877 if (error != 0) 1878 return error; 1879 1880 data = htole32(0x3); /* 1, 2 */ 1881 DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data))); 1882 error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data); 1883 if (error != 0) 1884 return error; 1885 1886 data = htole32(0xf); /* 1, 2, 5.5, 11 */ 1887 DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data))); 1888 error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data); 1889 if (error != 0) 1890 return error; 1891 1892 data = htole32(IPW_POWER_MODE_CAM); 1893 DPRINTF(("Setting power mode to %u\n", le32toh(data))); 1894 error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data); 1895 if (error != 0) 1896 return error; 1897 1898 if (ic->ic_opmode == IEEE80211_M_IBSS) { 1899 data = htole32(32); /* default value */ 1900 DPRINTF(("Setting tx power index to %u\n", le32toh(data))); 1901 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data, 1902 sizeof data); 1903 if (error != 0) 1904 return error; 1905 } 1906 1907 data = htole32(ic->ic_rtsthreshold); 1908 DPRINTF(("Setting RTS threshold to %u\n", le32toh(data))); 1909 error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data); 1910 if (error != 0) 1911 return error; 1912 1913 data = htole32(ic->ic_fragthreshold); 1914 DPRINTF(("Setting frag threshold to %u\n", le32toh(data))); 1915 error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data); 1916 if (error != 0) 1917 return error; 1918 1919 #ifdef IPW_DEBUG 1920 if (ipw_debug > 0) { 1921 printf("Setting ESSID to "); 1922 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen); 1923 printf("\n"); 1924 } 1925 #endif 1926 error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid, 1927 ic->ic_des_esslen); 1928 if (error != 0) 1929 return error; 1930 1931 /* no mandatory BSSID */ 1932 DPRINTF(("Setting mandatory BSSID to null\n")); 1933 error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0); 1934 if (error != 0) 1935 return error; 1936 1937 if (ic->ic_flags & IEEE80211_F_DESBSSID) { 1938 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid, 1939 ":")); 1940 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID, 1941 ic->ic_des_bssid, IEEE80211_ADDR_LEN); 1942 if (error != 0) 1943 return error; 1944 } 1945 1946 bzero(&security, sizeof security); 1947 security.authmode = (ic->ic_bss->ni_authmode == IEEE80211_AUTH_SHARED) ? 1948 IPW_AUTH_SHARED : IPW_AUTH_OPEN; 1949 security.ciphers = htole32(IPW_CIPHER_NONE); 1950 DPRINTF(("Setting authmode to %u\n", security.authmode)); 1951 error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security, 1952 sizeof security); 1953 if (error != 0) 1954 return error; 1955 1956 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 1957 k = ic->ic_crypto.cs_nw_keys; 1958 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) { 1959 if (k->wk_keylen == 0) 1960 continue; 1961 1962 wepkey.idx = i; 1963 wepkey.len = k->wk_keylen; 1964 bzero(wepkey.key, sizeof wepkey.key); 1965 bcopy(k->wk_key, wepkey.key, k->wk_keylen); 1966 DPRINTF(("Setting wep key index %u len %u\n", 1967 wepkey.idx, wepkey.len)); 1968 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey, 1969 sizeof wepkey); 1970 if (error != 0) 1971 return error; 1972 } 1973 1974 data = htole32(ic->ic_crypto.cs_def_txkey); 1975 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data))); 1976 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data, 1977 sizeof data); 1978 if (error != 0) 1979 return error; 1980 } 1981 1982 data = htole32((ic->ic_flags & IEEE80211_F_PRIVACY) ? IPW_WEPON : 0); 1983 DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data))); 1984 error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data); 1985 if (error != 0) 1986 return error; 1987 1988 #if 0 1989 struct ipw_wpa_ie ie; 1990 1991 bzero(&ie, sizeof ie); 1992 ie.len = htole32(sizeof (struct ieee80211_ie_wpa)); 1993 DPRINTF(("Setting wpa ie\n")); 1994 error = ipw_cmd(sc, IPW_CMD_SET_WPA_IE, &ie, sizeof ie); 1995 if (error != 0) 1996 return error; 1997 #endif 1998 1999 if (ic->ic_opmode == IEEE80211_M_IBSS) { 2000 data = htole32(ic->ic_bintval); 2001 DPRINTF(("Setting beacon interval to %u\n", le32toh(data))); 2002 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data, 2003 sizeof data); 2004 if (error != 0) 2005 return error; 2006 } 2007 2008 options.flags = 0; 2009 options.channels = htole32(0x3fff); /* scan channels 1-14 */ 2010 DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags))); 2011 error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options); 2012 if (error != 0) 2013 return error; 2014 2015 /* finally, enable adapter (start scanning for an access point) */ 2016 DPRINTF(("Enabling adapter\n")); 2017 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0); 2018 } 2019 2020 static void 2021 ipw_init(void *priv) 2022 { 2023 struct ipw_softc *sc = priv; 2024 struct ieee80211com *ic = &sc->sc_ic; 2025 struct ifnet *ifp = ic->ic_ifp; 2026 struct ipw_firmware *fw = &sc->fw; 2027 2028 /* exit immediately if firmware has not been ioctl'd */ 2029 if (!(sc->flags & IPW_FLAG_FW_CACHED)) { 2030 if (!(sc->flags & IPW_FLAG_FW_WARNED)) 2031 device_printf(sc->sc_dev, "Please load firmware\n"); 2032 sc->flags |= IPW_FLAG_FW_WARNED; 2033 ifp->if_flags &= ~IFF_UP; 2034 return; 2035 } 2036 2037 ipw_stop(sc); 2038 2039 if (ipw_reset(sc) != 0) { 2040 device_printf(sc->sc_dev, "could not reset adapter\n"); 2041 goto fail; 2042 } 2043 2044 if (ipw_load_ucode(sc, fw->ucode, fw->ucode_size) != 0) { 2045 device_printf(sc->sc_dev, "could not load microcode\n"); 2046 goto fail; 2047 } 2048 2049 ipw_stop_master(sc); 2050 2051 /* 2052 * Setup tx, rx and status rings. 2053 */ 2054 sc->txold = IPW_NTBD - 1; 2055 sc->txcur = 0; 2056 sc->txfree = IPW_NTBD - 2; 2057 sc->rxcur = IPW_NRBD - 1; 2058 2059 CSR_WRITE_4(sc, IPW_CSR_TX_BASE, sc->tbd_phys); 2060 CSR_WRITE_4(sc, IPW_CSR_TX_SIZE, IPW_NTBD); 2061 CSR_WRITE_4(sc, IPW_CSR_TX_READ, 0); 2062 CSR_WRITE_4(sc, IPW_CSR_TX_WRITE, sc->txcur); 2063 2064 CSR_WRITE_4(sc, IPW_CSR_RX_BASE, sc->rbd_phys); 2065 CSR_WRITE_4(sc, IPW_CSR_RX_SIZE, IPW_NRBD); 2066 CSR_WRITE_4(sc, IPW_CSR_RX_READ, 0); 2067 CSR_WRITE_4(sc, IPW_CSR_RX_WRITE, sc->rxcur); 2068 2069 CSR_WRITE_4(sc, IPW_CSR_STATUS_BASE, sc->status_phys); 2070 2071 if (ipw_load_firmware(sc, fw->main, fw->main_size) != 0) { 2072 device_printf(sc->sc_dev, "could not load firmware\n"); 2073 goto fail; 2074 } 2075 2076 sc->flags |= IPW_FLAG_FW_INITED; 2077 2078 /* retrieve information tables base addresses */ 2079 sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE); 2080 sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE); 2081 2082 ipw_write_table1(sc, IPW_INFO_LOCK, 0); 2083 2084 if (ipw_config(sc) != 0) { 2085 device_printf(sc->sc_dev, "device configuration failed\n"); 2086 goto fail; 2087 } 2088 2089 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2090 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2091 2092 return; 2093 2094 fail: ifp->if_flags &= ~IFF_UP; 2095 ipw_stop(sc); 2096 } 2097 2098 static void 2099 ipw_stop(void *priv) 2100 { 2101 struct ipw_softc *sc = priv; 2102 struct ieee80211com *ic = &sc->sc_ic; 2103 struct ifnet *ifp = ic->ic_ifp; 2104 int i; 2105 2106 ipw_stop_master(sc); 2107 2108 CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET); 2109 2110 /* 2111 * Release tx buffers. 2112 */ 2113 for (i = 0; i < IPW_NTBD; i++) 2114 ipw_release_sbd(sc, &sc->stbd_list[i]); 2115 2116 sc->sc_tx_timer = 0; 2117 ifp->if_timer = 0; 2118 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2119 2120 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2121 } 2122 2123 static int 2124 ipw_sysctl_stats(SYSCTL_HANDLER_ARGS) 2125 { 2126 struct ipw_softc *sc = arg1; 2127 uint32_t i, size, buf[256]; 2128 2129 if (!(sc->flags & IPW_FLAG_FW_INITED)) { 2130 bzero(buf, sizeof buf); 2131 return SYSCTL_OUT(req, buf, sizeof buf); 2132 } 2133 2134 CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base); 2135 2136 size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256); 2137 for (i = 1; i < size; i++) 2138 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA)); 2139 2140 return SYSCTL_OUT(req, buf, sizeof buf); 2141 } 2142 2143 static int 2144 ipw_sysctl_radio(SYSCTL_HANDLER_ARGS) 2145 { 2146 struct ipw_softc *sc = arg1; 2147 int val; 2148 2149 val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) && 2150 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED)); 2151 2152 return SYSCTL_OUT(req, &val, sizeof val); 2153 } 2154 2155 static uint32_t 2156 ipw_read_table1(struct ipw_softc *sc, uint32_t off) 2157 { 2158 return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off)); 2159 } 2160 2161 static void 2162 ipw_write_table1(struct ipw_softc *sc, uint32_t off, uint32_t info) 2163 { 2164 MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info); 2165 } 2166 2167 static int 2168 ipw_read_table2(struct ipw_softc *sc, uint32_t off, void *buf, uint32_t *len) 2169 { 2170 uint32_t addr, info; 2171 uint16_t count, size; 2172 uint32_t total; 2173 2174 /* addr[4] + count[2] + size[2] */ 2175 addr = MEM_READ_4(sc, sc->table2_base + off); 2176 info = MEM_READ_4(sc, sc->table2_base + off + 4); 2177 2178 count = info >> 16; 2179 size = info & 0xffff; 2180 total = count * size; 2181 2182 if (total > *len) { 2183 *len = total; 2184 return EINVAL; 2185 } 2186 2187 *len = total; 2188 ipw_read_mem_1(sc, addr, buf, total); 2189 2190 return 0; 2191 } 2192 2193 static void 2194 ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap, 2195 bus_size_t count) 2196 { 2197 for (; count > 0; offset++, datap++, count--) { 2198 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3); 2199 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3)); 2200 } 2201 } 2202 2203 static void 2204 ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap, 2205 bus_size_t count) 2206 { 2207 for (; count > 0; offset++, datap++, count--) { 2208 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3); 2209 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap); 2210 } 2211 } 2212