1 /*- 2 * Copyright (c) 2002 Adaptec Inc. 3 * All rights reserved. 4 * 5 * Written by: David Jeffery 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/bus.h> 36 #include <sys/conf.h> 37 #include <sys/types.h> 38 #include <sys/queue.h> 39 #include <sys/bio.h> 40 #include <sys/malloc.h> 41 #include <sys/mutex.h> 42 #include <sys/sema.h> 43 #include <sys/time.h> 44 45 #include <machine/bus_memio.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 #include <machine/resource.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 /* 54 * IPS CONSTANTS 55 */ 56 #define IPS_VENDOR_ID 0x1014 57 #define IPS_VENDOR_ID_ADAPTEC 0x9005 58 #define IPS_MORPHEUS_DEVICE_ID 0x01BD 59 #define IPS_COPPERHEAD_DEVICE_ID 0x002E 60 #define IPS_MARCO_DEVICE_ID 0x0250 61 #define IPS_CSL 0xff 62 #define IPS_POCL 0x30 63 64 /* amounts of memory to allocate for certain commands */ 65 #define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t)) 66 #define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t)) 67 #define IPS_COMMAND_LEN 24 68 #define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS) 69 #define IPS_NVRAM_PAGE_SIZE 128 70 /* various flags */ 71 #define IPS_NOWAIT_FLAG 1 72 73 /* states for the card to be in */ 74 #define IPS_DEV_OPEN 0x01 75 #define IPS_TIMEOUT 0x02 /* command time out, need reset */ 76 #define IPS_OFFLINE 0x04 /* can't reset card/card failure */ 77 78 /* max number of commands set to something low for now */ 79 #define IPS_MAX_CMD_NUM 128 80 #define IPS_MAX_NUM_DRIVES 8 81 #define IPS_MAX_SG_ELEMENTS 32 82 #define IPS_MAX_IOBUF_SIZE (64 * 1024) 83 #define IPS_BLKSIZE 512 84 85 /* logical drive states */ 86 87 #define IPS_LD_OFFLINE 0x02 88 #define IPS_LD_OKAY 0x03 89 #define IPS_LD_DEGRADED 0x04 90 #define IPS_LD_FREE 0x00 91 #define IPS_LD_SYS 0x06 92 #define IPS_LD_CRS 0x24 93 94 /* register offsets */ 95 #define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */ 96 #define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */ 97 #define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */ 98 #define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */ 99 #define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */ 100 #define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */ 101 #define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */ 102 #define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */ 103 #define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */ 104 105 #define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */ 106 #define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */ 107 #define COPPER_REG_CBSP 0x07 /* ? Reg. */ 108 #define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */ 109 #define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/ 110 #define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */ 111 #define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */ 112 #define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */ 113 #define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */ 114 #define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */ 115 116 /* bit definitions */ 117 #define MORPHEUS_BIT_POST1 0x01 118 #define MORPHEUS_BIT_POST2 0x02 119 #define MORPHEUS_BIT_CMD_IRQ 0x08 120 121 #define COPPER_CMD_START 0x101A 122 #define COPPER_SEM_BIT 0x08 123 #define COPPER_EI_BIT 0x80 124 #define COPPER_EBM_BIT 0x02 125 #define COPPER_RESET_BIT 0x80 126 #define COPPER_GHI_BIT 0x04 127 #define COPPER_SCE_BIT 0x01 128 #define COPPER_OP_BIT 0x01 129 #define COPPER_ILE_BIT 0x10 130 131 /* status defines */ 132 #define IPS_POST1_OK 0x8000 133 #define IPS_POST2_OK 0x000f 134 135 /* command op codes */ 136 #define IPS_READ_CMD 0x02 137 #define IPS_WRITE_CMD 0x03 138 #define IPS_ADAPTER_INFO_CMD 0x05 139 #define IPS_CACHE_FLUSH_CMD 0x0A 140 #define IPS_REBUILD_STATUS_CMD 0x0C 141 #define IPS_ERROR_TABLE_CMD 0x17 142 #define IPS_DRIVE_INFO_CMD 0x19 143 #define IPS_SUBSYS_PARAM_CMD 0x40 144 #define IPS_CONFIG_SYNC_CMD 0x58 145 #define IPS_SG_READ_CMD 0x82 146 #define IPS_SG_WRITE_CMD 0x83 147 #define IPS_RW_NVRAM_CMD 0xBC 148 #define IPS_FFDC_CMD 0xD7 149 150 /* error information returned by the adapter */ 151 #define IPS_MIN_ERROR 0x02 152 #define IPS_ERROR_STATUS 0x13000200 /* ahh, magic numbers */ 153 154 #define IPS_OS_FREEBSD 8 155 #define IPS_VERSION_MAJOR "0.90" 156 #define IPS_VERSION_MINOR ".10" 157 158 /* Adapter Types */ 159 #define IPS_ADAPTER_COPPERHEAD 0x01 160 #define IPS_ADAPTER_COPPERHEAD2 0x02 161 #define IPS_ADAPTER_COPPERHEADOB1 0x03 162 #define IPS_ADAPTER_COPPERHEADOB2 0x04 163 #define IPS_ADAPTER_CLARINET 0x05 164 #define IPS_ADAPTER_CLARINETLITE 0x06 165 #define IPS_ADAPTER_TROMBONE 0x07 166 #define IPS_ADAPTER_MORPHEUS 0x08 167 #define IPS_ADAPTER_MORPHEUSLITE 0x09 168 #define IPS_ADAPTER_NEO 0x0A 169 #define IPS_ADAPTER_NEOLITE 0x0B 170 #define IPS_ADAPTER_SARASOTA2 0x0C 171 #define IPS_ADAPTER_SARASOTA1 0x0D 172 #define IPS_ADAPTER_MARCO 0x0E 173 #define IPS_ADAPTER_SEBRING 0x0F 174 #define IPS_ADAPTER_MAX_T IPS_ADAPTER_SEBRING 175 176 /* values for ffdc_settime (from gmtime) */ 177 #define IPS_SECSPERMIN 60 178 #define IPS_MINSPERHOUR 60 179 #define IPS_HOURSPERDAY 24 180 #define IPS_DAYSPERWEEK 7 181 #define IPS_DAYSPERNYEAR 365 182 #define IPS_DAYSPERLYEAR 366 183 #define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR) 184 #define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY) 185 #define IPS_MONSPERYEAR 12 186 #define IPS_EPOCH_YEAR 1970 187 #define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400) 188 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0)) 189 190 /* 191 * IPS MACROS 192 */ 193 194 #define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset) 195 #define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset) 196 #define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset) 197 198 #define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value) 199 #define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value) 200 #define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value) 201 202 /* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */ 203 #define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status)) 204 205 #define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ) 206 207 #define COMMAND_ERROR(status) (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR) 208 209 #ifndef IPS_DEBUG 210 #define DEVICE_PRINTF(x...) 211 #define PRINTF(x...) 212 #else 213 #define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x) 214 #define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x) 215 #endif 216 /* 217 * IPS STRUCTS 218 */ 219 220 struct ips_softc; 221 222 typedef struct{ 223 u_int8_t command; 224 u_int8_t id; 225 u_int8_t drivenum; 226 u_int8_t reserve2; 227 u_int32_t lba; 228 u_int32_t buffaddr; 229 u_int32_t reserve3; 230 } __attribute__ ((packed)) ips_generic_cmd; 231 232 typedef struct{ 233 u_int8_t command; 234 u_int8_t id; 235 u_int8_t drivenum; 236 u_int8_t segnum; 237 u_int32_t lba; 238 u_int32_t buffaddr; 239 u_int16_t length; 240 u_int16_t reserve1; 241 } __attribute__ ((packed)) ips_io_cmd; 242 243 typedef struct{ 244 u_int8_t command; 245 u_int8_t id; 246 u_int8_t pagenum; 247 u_int8_t rw; 248 u_int32_t reserve1; 249 u_int32_t buffaddr; 250 u_int32_t reserve3; 251 } __attribute__ ((packed)) ips_rw_nvram_cmd; 252 253 typedef struct{ 254 u_int8_t command; 255 u_int8_t id; 256 u_int8_t drivenum; 257 u_int8_t reserve1; 258 u_int32_t reserve2; 259 u_int32_t buffaddr; 260 u_int32_t reserve3; 261 } __attribute__ ((packed)) ips_drive_cmd; 262 263 typedef struct{ 264 u_int8_t command; 265 u_int8_t id; 266 u_int8_t reserve1; 267 u_int8_t commandtype; 268 u_int32_t reserve2; 269 u_int32_t buffaddr; 270 u_int32_t reserve3; 271 } __attribute__((packed)) ips_adapter_info_cmd; 272 273 typedef struct{ 274 u_int8_t command; 275 u_int8_t id; 276 u_int8_t reset_count; 277 u_int8_t reset_type; 278 u_int8_t second; 279 u_int8_t minute; 280 u_int8_t hour; 281 u_int8_t day; 282 u_int8_t reserve1[4]; 283 u_int8_t month; 284 u_int8_t yearH; 285 u_int8_t yearL; 286 u_int8_t reserve2; 287 } __attribute__((packed)) ips_adapter_ffdc_cmd; 288 289 typedef union{ 290 ips_generic_cmd generic_cmd; 291 ips_drive_cmd drive_cmd; 292 ips_adapter_info_cmd adapter_info_cmd; 293 } ips_cmd_buff_t; 294 295 typedef struct { 296 u_int32_t signature; 297 u_int8_t reserved; 298 u_int8_t adapter_slot; 299 u_int16_t adapter_type; 300 u_int8_t bios_high[4]; 301 u_int8_t bios_low[4]; 302 u_int16_t reserve2; 303 u_int8_t reserve3; 304 u_int8_t operating_system; 305 u_int8_t driver_high[4]; 306 u_int8_t driver_low[4]; 307 u_int8_t reserve4[100]; 308 }__attribute__((packed)) ips_nvram_page5; 309 310 typedef struct{ 311 u_int32_t addr; 312 u_int32_t len; 313 } ips_sg_element_t; 314 315 typedef struct{ 316 u_int8_t drivenum; 317 u_int8_t merge_id; 318 u_int8_t raid_lvl; 319 u_int8_t state; 320 u_int32_t sector_count; 321 } __attribute__((packed)) ips_drive_t; 322 323 typedef struct{ 324 u_int8_t drivecount; 325 u_int8_t reserve1; 326 u_int16_t reserve2; 327 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 328 }__attribute__((packed)) ips_drive_info_t; 329 330 typedef struct{ 331 u_int8_t drivecount; 332 u_int8_t miscflags; 333 u_int8_t SLTflags; 334 u_int8_t BSTflags; 335 u_int8_t pwr_chg_count; 336 u_int8_t wrong_addr_count; 337 u_int8_t unident_count; 338 u_int8_t nvram_dev_chg_count; 339 u_int8_t codeblock_version[8]; 340 u_int8_t bootblock_version[8]; 341 u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES]; 342 u_int8_t max_concurrent_cmds; 343 u_int8_t max_phys_devices; 344 u_int16_t flash_prog_count; 345 u_int8_t defunct_disks; 346 u_int8_t rebuildflags; 347 u_int8_t offline_drivecount; 348 u_int8_t critical_drivecount; 349 u_int16_t config_update_count; 350 u_int8_t blockedflags; 351 u_int8_t psdn_error; 352 u_int16_t addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */ 353 }__attribute__((packed)) ips_adapter_info_t; 354 355 typedef struct { 356 u_int32_t status[IPS_MAX_CMD_NUM]; 357 u_int32_t base_phys_addr; 358 int nextstatus; 359 bus_dma_tag_t dmatag; 360 bus_dmamap_t dmamap; 361 } ips_copper_queue_t; 362 363 typedef union { 364 struct { 365 u_int8_t reserved; 366 u_int8_t command_id; 367 u_int8_t basic_status; 368 u_int8_t extended_status; 369 } fields; 370 volatile u_int32_t value; 371 } ips_cmd_status_t; 372 373 /* used to keep track of current commands to the card */ 374 typedef struct ips_command{ 375 u_int8_t command_number; 376 u_int8_t id; 377 u_int8_t timeout; 378 struct ips_softc * sc; 379 bus_dmamap_t command_dmamap; 380 void * command_buffer; 381 u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/ 382 struct sema cmd_sema; 383 ips_cmd_status_t status; 384 SLIST_ENTRY(ips_command) next; 385 bus_dma_tag_t data_dmatag; 386 bus_dmamap_t data_dmamap; 387 void * data_buffer; 388 void * arg; 389 void (* callback)(struct ips_command *command); 390 }ips_command_t; 391 392 typedef struct ips_wait_list{ 393 STAILQ_ENTRY(ips_wait_list) next; 394 void *data; 395 int (* callback)(ips_command_t *command); 396 }ips_wait_list_t; 397 398 typedef struct ips_softc{ 399 struct resource * iores; 400 struct resource * irqres; 401 struct intr_config_hook ips_ich; 402 int configured; 403 int state; 404 int iotype; 405 int rid; 406 int irqrid; 407 void * irqcookie; 408 bus_space_tag_t bustag; 409 bus_space_handle_t bushandle; 410 bus_dma_tag_t adapter_dmatag; 411 bus_dma_tag_t command_dmatag; 412 bus_dma_tag_t sg_dmatag; 413 device_t dev; 414 dev_t device_file; 415 struct callout_handle timer; 416 u_int16_t adapter_type; 417 ips_adapter_info_t adapter_info; 418 device_t diskdev[IPS_MAX_NUM_DRIVES]; 419 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 420 u_int8_t drivecount; 421 u_int16_t ffdc_resetcount; 422 struct timeval ffdc_resettime; 423 u_int8_t next_drive; 424 u_int8_t max_cmds; 425 volatile u_int8_t used_commands; 426 ips_command_t commandarray[IPS_MAX_CMD_NUM]; 427 SLIST_HEAD(command_list, ips_command) free_cmd_list; 428 STAILQ_HEAD(command_wait_list,ips_wait_list) cmd_wait_list; 429 int (* ips_adapter_reinit)(struct ips_softc *sc, 430 int force); 431 void (* ips_adapter_intr)(void *sc); 432 void (* ips_issue_cmd)(ips_command_t *command); 433 ips_copper_queue_t * copper_queue; 434 struct mtx queue_mtx; 435 struct bio_queue_head queue; 436 437 }ips_softc_t; 438 439 /* function defines from ips_ioctl.c */ 440 extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr, 441 int32_t flags); 442 /* function defines from ips_disk.c */ 443 extern void ipsd_finish(struct bio *iobuf); 444 445 /* function defines from ips_commands.c */ 446 extern int ips_flush_cache(ips_softc_t *sc); 447 extern void ips_start_io_request(ips_softc_t *sc); 448 extern int ips_get_drive_info(ips_softc_t *sc); 449 extern int ips_get_adapter_info(ips_softc_t *sc); 450 extern int ips_ffdc_reset(ips_softc_t *sc); 451 extern int ips_update_nvram(ips_softc_t *sc); 452 extern int ips_clear_adapter(ips_softc_t *sc); 453 454 /* function defines from ips.c */ 455 extern int ips_get_free_cmd(ips_softc_t *sc, int (*callback)(ips_command_t *), 456 void *data, unsigned long flags); 457 extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command); 458 extern int ips_adapter_init(ips_softc_t *sc); 459 extern int ips_morpheus_reinit(ips_softc_t *sc, int force); 460 extern int ips_adapter_free(ips_softc_t *sc); 461 extern void ips_morpheus_intr(void *sc); 462 extern void ips_issue_morpheus_cmd(ips_command_t *command); 463 extern int ips_copperhead_reinit(ips_softc_t *sc, int force); 464 extern void ips_copperhead_intr(void *sc); 465 extern void ips_issue_copperhead_cmd(ips_command_t *command); 466 467