1 /*- 2 * Copyright (c) 2002 Adaptec Inc. 3 * All rights reserved. 4 * 5 * Written by: David Jeffery 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/bus.h> 36 #include <sys/conf.h> 37 #include <sys/types.h> 38 #include <sys/queue.h> 39 #include <sys/bio.h> 40 #include <sys/malloc.h> 41 #include <sys/mutex.h> 42 #include <sys/sema.h> 43 #include <sys/time.h> 44 45 #include <machine/bus_memio.h> 46 #include <machine/bus.h> 47 #include <sys/rman.h> 48 #include <machine/resource.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 /* 54 * IPS CONSTANTS 55 */ 56 #define IPS_VENDOR_ID 0x1014 57 #define IPS_MORPHEUS_DEVICE_ID 0x01BD 58 #define IPS_COPPERHEAD_DEVICE_ID 0x002E 59 #define IPS_CSL 0xff 60 #define IPS_POCL 0x30 61 62 /* amounts of memory to allocate for certain commands */ 63 #define IPS_ADAPTER_INFO_LEN (sizeof(ips_adapter_info_t)) 64 #define IPS_DRIVE_INFO_LEN (sizeof(ips_drive_info_t)) 65 #define IPS_COMMAND_LEN 24 66 #define IPS_MAX_SG_LEN (sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS) 67 #define IPS_NVRAM_PAGE_SIZE 128 68 /* various flags */ 69 #define IPS_NOWAIT_FLAG 1 70 71 /* states for the card to be in */ 72 #define IPS_DEV_OPEN 0x01 73 #define IPS_TIMEOUT 0x02 /* command time out, need reset */ 74 #define IPS_OFFLINE 0x04 /* can't reset card/card failure */ 75 76 /* max number of commands set to something low for now */ 77 #define IPS_MAX_CMD_NUM 128 78 #define IPS_MAX_NUM_DRIVES 8 79 #define IPS_MAX_SG_ELEMENTS 32 80 #define IPS_MAX_IOBUF_SIZE (64 * 1024) 81 #define IPS_BLKSIZE 512 82 83 /* logical drive states */ 84 85 #define IPS_LD_OFFLINE 0x02 86 #define IPS_LD_OKAY 0x03 87 #define IPS_LD_DEGRADED 0x04 88 #define IPS_LD_FREE 0x00 89 #define IPS_LD_SYS 0x06 90 #define IPS_LD_CRS 0x24 91 92 /* register offsets */ 93 #define MORPHEUS_REG_OMR0 0x0018 /* Outbound Msg. Reg. 0 */ 94 #define MORPHEUS_REG_OMR1 0x001C /* Outbound Msg. Reg. 1 */ 95 #define MORPHEUS_REG_IDR 0x0020 /* Inbound Doorbell Reg. */ 96 #define MORPHEUS_REG_IISR 0x0024 /* Inbound IRQ Status Reg. */ 97 #define MORPHEUS_REG_IIMR 0x0028 /* Inbound IRQ Mask Reg. */ 98 #define MORPHEUS_REG_OISR 0x0030 /* Outbound IRQ Status Reg. */ 99 #define MORPHEUS_REG_OIMR 0x0034 /* Outbound IRQ Status Reg. */ 100 #define MORPHEUS_REG_IQPR 0x0040 /* Inbound Queue Port Reg. */ 101 #define MORPHEUS_REG_OQPR 0x0044 /* Outbound Queue Port Reg. */ 102 103 #define COPPER_REG_SCPR 0x05 /* Subsystem Ctrl. Port Reg. */ 104 #define COPPER_REG_ISPR 0x06 /* IRQ Status Port Reg. */ 105 #define COPPER_REG_CBSP 0x07 /* ? Reg. */ 106 #define COPPER_REG_HISR 0x08 /* Host IRQ Status Reg. */ 107 #define COPPER_REG_CCSAR 0x10 /* Cmd. Channel Sys Addr Reg.*/ 108 #define COPPER_REG_CCCR 0x14 /* Cmd. Channel Ctrl. Reg. */ 109 #define COPPER_REG_SQHR 0x20 /* Status Queue Head Reg. */ 110 #define COPPER_REG_SQTR 0x24 /* Status Queue Tail Reg. */ 111 #define COPPER_REG_SQER 0x28 /* Status Queue End Reg. */ 112 #define COPPER_REG_SQSR 0x2C /* Status Queue Start Reg. */ 113 114 /* bit definitions */ 115 #define MORPHEUS_BIT_POST1 0x01 116 #define MORPHEUS_BIT_POST2 0x02 117 #define MORPHEUS_BIT_CMD_IRQ 0x08 118 119 #define COPPER_CMD_START 0x101A 120 #define COPPER_SEM_BIT 0x08 121 #define COPPER_EI_BIT 0x80 122 #define COPPER_EBM_BIT 0x02 123 #define COPPER_RESET_BIT 0x80 124 #define COPPER_GHI_BIT 0x04 125 #define COPPER_SCE_BIT 0x01 126 #define COPPER_OP_BIT 0x01 127 #define COPPER_ILE_BIT 0x10 128 129 /* status defines */ 130 #define IPS_POST1_OK 0x8000 131 #define IPS_POST2_OK 0x000f 132 133 /* command op codes */ 134 #define IPS_READ_CMD 0x02 135 #define IPS_WRITE_CMD 0x03 136 #define IPS_ADAPTER_INFO_CMD 0x05 137 #define IPS_CACHE_FLUSH_CMD 0x0A 138 #define IPS_REBUILD_STATUS_CMD 0x0C 139 #define IPS_ERROR_TABLE_CMD 0x17 140 #define IPS_DRIVE_INFO_CMD 0x19 141 #define IPS_SUBSYS_PARAM_CMD 0x40 142 #define IPS_CONFIG_SYNC_CMD 0x58 143 #define IPS_SG_READ_CMD 0x82 144 #define IPS_SG_WRITE_CMD 0x83 145 #define IPS_RW_NVRAM_CMD 0xBC 146 #define IPS_FFDC_CMD 0xD7 147 148 /* error information returned by the adapter */ 149 #define IPS_MIN_ERROR 0x02 150 #define IPS_ERROR_STATUS 0x13000200 /* ahh, magic numbers */ 151 152 #define IPS_OS_FREEBSD 8 153 #define IPS_VERSION_MAJOR "0.90" 154 #define IPS_VERSION_MINOR ".10" 155 156 /* Adapter Types */ 157 #define IPS_ADAPTER_COPPERHEAD 0x01 158 #define IPS_ADAPTER_COPPERHEAD2 0x02 159 #define IPS_ADAPTER_COPPERHEADOB1 0x03 160 #define IPS_ADAPTER_COPPERHEADOB2 0x04 161 #define IPS_ADAPTER_CLARINET 0x05 162 #define IPS_ADAPTER_CLARINETLITE 0x06 163 #define IPS_ADAPTER_TROMBONE 0x07 164 #define IPS_ADAPTER_MORPHEUS 0x08 165 #define IPS_ADAPTER_MORPHEUSLITE 0x09 166 #define IPS_ADAPTER_NEO 0x0A 167 #define IPS_ADAPTER_NEOLITE 0x0B 168 #define IPS_ADAPTER_SARASOTA2 0x0C 169 #define IPS_ADAPTER_SARASOTA1 0x0D 170 #define IPS_ADAPTER_MARCO 0x0E 171 #define IPS_ADAPTER_SEBRING 0x0F 172 #define IPS_ADAPTER_MAX_T IPS_ADAPTER_SEBRING 173 174 /* values for ffdc_settime (from gmtime) */ 175 #define IPS_SECSPERMIN 60 176 #define IPS_MINSPERHOUR 60 177 #define IPS_HOURSPERDAY 24 178 #define IPS_DAYSPERWEEK 7 179 #define IPS_DAYSPERNYEAR 365 180 #define IPS_DAYSPERLYEAR 366 181 #define IPS_SECSPERHOUR (IPS_SECSPERMIN * IPS_MINSPERHOUR) 182 #define IPS_SECSPERDAY ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY) 183 #define IPS_MONSPERYEAR 12 184 #define IPS_EPOCH_YEAR 1970 185 #define IPS_LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400) 186 #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0)) 187 188 /* 189 * IPS MACROS 190 */ 191 192 #define ips_read_1(sc,offset) bus_space_read_1(sc->bustag, sc->bushandle, offset) 193 #define ips_read_2(sc,offset) bus_space_read_2(sc->bustag, sc->bushandle, offset) 194 #define ips_read_4(sc,offset) bus_space_read_4(sc->bustag, sc->bushandle, offset) 195 196 #define ips_write_1(sc,offset,value) bus_space_write_1(sc->bustag, sc->bushandle, offset, value) 197 #define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value) 198 #define ips_write_4(sc,offset,value) bus_space_write_4(sc->bustag, sc->bushandle, offset, value) 199 200 /* this is ugly. It zeros the end elements in an ips_command_t struct starting with the status element */ 201 #define clear_ips_command(command) bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status)) 202 203 #define ips_read_request(iobuf) ((iobuf)->bio_cmd == BIO_READ) 204 205 #define COMMAND_ERROR(status) (((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR) 206 207 #ifndef IPS_DEBUG 208 #define DEVICE_PRINTF(x...) 209 #define PRINTF(x...) 210 #else 211 #define DEVICE_PRINTF(level,x...) if(IPS_DEBUG >= level)device_printf(x) 212 #define PRINTF(level,x...) if(IPS_DEBUG >= level)printf(x) 213 #endif 214 /* 215 * IPS STRUCTS 216 */ 217 218 struct ips_softc; 219 220 typedef struct{ 221 u_int8_t command; 222 u_int8_t id; 223 u_int8_t drivenum; 224 u_int8_t reserve2; 225 u_int32_t lba; 226 u_int32_t buffaddr; 227 u_int32_t reserve3; 228 } __attribute__ ((packed)) ips_generic_cmd; 229 230 typedef struct{ 231 u_int8_t command; 232 u_int8_t id; 233 u_int8_t drivenum; 234 u_int8_t segnum; 235 u_int32_t lba; 236 u_int32_t buffaddr; 237 u_int16_t length; 238 u_int16_t reserve1; 239 } __attribute__ ((packed)) ips_io_cmd; 240 241 typedef struct{ 242 u_int8_t command; 243 u_int8_t id; 244 u_int8_t pagenum; 245 u_int8_t rw; 246 u_int32_t reserve1; 247 u_int32_t buffaddr; 248 u_int32_t reserve3; 249 } __attribute__ ((packed)) ips_rw_nvram_cmd; 250 251 typedef struct{ 252 u_int8_t command; 253 u_int8_t id; 254 u_int8_t drivenum; 255 u_int8_t reserve1; 256 u_int32_t reserve2; 257 u_int32_t buffaddr; 258 u_int32_t reserve3; 259 } __attribute__ ((packed)) ips_drive_cmd; 260 261 typedef struct{ 262 u_int8_t command; 263 u_int8_t id; 264 u_int8_t reserve1; 265 u_int8_t commandtype; 266 u_int32_t reserve2; 267 u_int32_t buffaddr; 268 u_int32_t reserve3; 269 } __attribute__((packed)) ips_adapter_info_cmd; 270 271 typedef struct{ 272 u_int8_t command; 273 u_int8_t id; 274 u_int8_t reset_count; 275 u_int8_t reset_type; 276 u_int8_t second; 277 u_int8_t minute; 278 u_int8_t hour; 279 u_int8_t day; 280 u_int8_t reserve1[4]; 281 u_int8_t month; 282 u_int8_t yearH; 283 u_int8_t yearL; 284 u_int8_t reserve2; 285 } __attribute__((packed)) ips_adapter_ffdc_cmd; 286 287 typedef union{ 288 ips_generic_cmd generic_cmd; 289 ips_drive_cmd drive_cmd; 290 ips_adapter_info_cmd adapter_info_cmd; 291 } ips_cmd_buff_t; 292 293 typedef struct { 294 u_int32_t signature; 295 u_int8_t reserved; 296 u_int8_t adapter_slot; 297 u_int16_t adapter_type; 298 u_int8_t bios_high[4]; 299 u_int8_t bios_low[4]; 300 u_int16_t reserve2; 301 u_int8_t reserve3; 302 u_int8_t operating_system; 303 u_int8_t driver_high[4]; 304 u_int8_t driver_low[4]; 305 u_int8_t reserve4[100]; 306 }__attribute__((packed)) ips_nvram_page5; 307 308 typedef struct{ 309 u_int32_t addr; 310 u_int32_t len; 311 } ips_sg_element_t; 312 313 typedef struct{ 314 u_int8_t drivenum; 315 u_int8_t merge_id; 316 u_int8_t raid_lvl; 317 u_int8_t state; 318 u_int32_t sector_count; 319 } __attribute__((packed)) ips_drive_t; 320 321 typedef struct{ 322 u_int8_t drivecount; 323 u_int8_t reserve1; 324 u_int16_t reserve2; 325 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 326 }__attribute__((packed)) ips_drive_info_t; 327 328 typedef struct{ 329 u_int8_t drivecount; 330 u_int8_t miscflags; 331 u_int8_t SLTflags; 332 u_int8_t BSTflags; 333 u_int8_t pwr_chg_count; 334 u_int8_t wrong_addr_count; 335 u_int8_t unident_count; 336 u_int8_t nvram_dev_chg_count; 337 u_int8_t codeblock_version[8]; 338 u_int8_t bootblock_version[8]; 339 u_int32_t drive_sector_count[IPS_MAX_NUM_DRIVES]; 340 u_int8_t max_concurrent_cmds; 341 u_int8_t max_phys_devices; 342 u_int16_t flash_prog_count; 343 u_int8_t defunct_disks; 344 u_int8_t rebuildflags; 345 u_int8_t offline_drivecount; 346 u_int8_t critical_drivecount; 347 u_int16_t config_update_count; 348 u_int8_t blockedflags; 349 u_int8_t psdn_error; 350 u_int16_t addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */ 351 }__attribute__((packed)) ips_adapter_info_t; 352 353 typedef struct { 354 u_int32_t status[IPS_MAX_CMD_NUM]; 355 u_int32_t base_phys_addr; 356 int nextstatus; 357 bus_dma_tag_t dmatag; 358 bus_dmamap_t dmamap; 359 } ips_copper_queue_t; 360 361 typedef union { 362 struct { 363 u_int8_t reserved; 364 u_int8_t command_id; 365 u_int8_t basic_status; 366 u_int8_t extended_status; 367 } fields; 368 volatile u_int32_t value; 369 } ips_cmd_status_t; 370 371 /* used to keep track of current commands to the card */ 372 typedef struct ips_command{ 373 u_int8_t command_number; 374 u_int8_t id; 375 u_int8_t timeout; 376 struct ips_softc * sc; 377 bus_dmamap_t command_dmamap; 378 void * command_buffer; 379 u_int32_t command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/ 380 struct sema cmd_sema; 381 ips_cmd_status_t status; 382 SLIST_ENTRY(ips_command) next; 383 bus_dma_tag_t data_dmatag; 384 bus_dmamap_t data_dmamap; 385 void * data_buffer; 386 void * arg; 387 void (* callback)(struct ips_command *command); 388 }ips_command_t; 389 390 typedef struct ips_wait_list{ 391 STAILQ_ENTRY(ips_wait_list) next; 392 void *data; 393 int (* callback)(ips_command_t *command); 394 }ips_wait_list_t; 395 396 typedef struct ips_softc{ 397 struct resource * iores; 398 struct resource * irqres; 399 struct intr_config_hook ips_ich; 400 int configured; 401 int state; 402 int iotype; 403 int rid; 404 int irqrid; 405 void * irqcookie; 406 bus_space_tag_t bustag; 407 bus_space_handle_t bushandle; 408 bus_dma_tag_t adapter_dmatag; 409 bus_dma_tag_t command_dmatag; 410 bus_dma_tag_t sg_dmatag; 411 device_t dev; 412 dev_t device_file; 413 struct callout_handle timer; 414 u_int16_t adapter_type; 415 ips_adapter_info_t adapter_info; 416 device_t diskdev[IPS_MAX_NUM_DRIVES]; 417 ips_drive_t drives[IPS_MAX_NUM_DRIVES]; 418 u_int8_t drivecount; 419 u_int16_t ffdc_resetcount; 420 struct timeval ffdc_resettime; 421 u_int8_t next_drive; 422 u_int8_t max_cmds; 423 volatile u_int8_t used_commands; 424 ips_command_t commandarray[IPS_MAX_CMD_NUM]; 425 SLIST_HEAD(command_list, ips_command) free_cmd_list; 426 STAILQ_HEAD(command_wait_list,ips_wait_list) cmd_wait_list; 427 int (* ips_adapter_reinit)(struct ips_softc *sc, 428 int force); 429 void (* ips_adapter_intr)(void *sc); 430 void (* ips_issue_cmd)(ips_command_t *command); 431 ips_copper_queue_t * copper_queue; 432 struct mtx queue_mtx; 433 struct bio_queue_head queue; 434 435 }ips_softc_t; 436 437 /* function defines from ips_ioctl.c */ 438 extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr, 439 int32_t flags); 440 /* function defines from ips_disk.c */ 441 extern void ipsd_finish(struct bio *iobuf); 442 443 /* function defines from ips_commands.c */ 444 extern int ips_flush_cache(ips_softc_t *sc); 445 extern void ips_start_io_request(ips_softc_t *sc); 446 extern int ips_get_drive_info(ips_softc_t *sc); 447 extern int ips_get_adapter_info(ips_softc_t *sc); 448 extern int ips_ffdc_reset(ips_softc_t *sc); 449 extern int ips_update_nvram(ips_softc_t *sc); 450 extern int ips_clear_adapter(ips_softc_t *sc); 451 452 /* function defines from ips.c */ 453 extern int ips_get_free_cmd(ips_softc_t *sc, int (*callback)(ips_command_t *), 454 void *data, unsigned long flags); 455 extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command); 456 extern int ips_adapter_init(ips_softc_t *sc); 457 extern int ips_morpheus_reinit(ips_softc_t *sc, int force); 458 extern int ips_adapter_free(ips_softc_t *sc); 459 extern void ips_morpheus_intr(void *sc); 460 extern void ips_issue_morpheus_cmd(ips_command_t *command); 461 extern int ips_copperhead_reinit(ips_softc_t *sc, int force); 462 extern void ips_copperhead_intr(void *sc); 463 extern void ips_issue_copperhead_cmd(ips_command_t *command); 464 465