xref: /freebsd/sys/dev/ips/ips.h (revision dd83a01e81b7f4729a40700faf8ae29b254878b4)
12aedd662SScott Long /*-
22aedd662SScott Long  * Copyright (c) 2002 Adaptec Inc.
32aedd662SScott Long  * All rights reserved.
42aedd662SScott Long  *
52aedd662SScott Long  * Written by: David Jeffery
62aedd662SScott Long  *
72aedd662SScott Long  * Redistribution and use in source and binary forms, with or without
82aedd662SScott Long  * modification, are permitted provided that the following conditions
92aedd662SScott Long  * are met:
102aedd662SScott Long  * 1. Redistributions of source code must retain the above copyright
112aedd662SScott Long  *    notice, this list of conditions and the following disclaimer.
122aedd662SScott Long  * 2. Redistributions in binary form must reproduce the above copyright
132aedd662SScott Long  *    notice, this list of conditions and the following disclaimer in the
142aedd662SScott Long  *    documentation and/or other materials provided with the distribution.
152aedd662SScott Long  *
162aedd662SScott Long  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
172aedd662SScott Long  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
182aedd662SScott Long  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
192aedd662SScott Long  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
202aedd662SScott Long  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
212aedd662SScott Long  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
222aedd662SScott Long  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
232aedd662SScott Long  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
242aedd662SScott Long  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
252aedd662SScott Long  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
262aedd662SScott Long  * SUCH DAMAGE.
272aedd662SScott Long  *
282aedd662SScott Long  * $FreeBSD$
292aedd662SScott Long  */
302aedd662SScott Long 
312aedd662SScott Long 
322aedd662SScott Long #include <sys/param.h>
332aedd662SScott Long #include <sys/systm.h>
342aedd662SScott Long #include <sys/kernel.h>
352aedd662SScott Long #include <sys/bus.h>
362aedd662SScott Long #include <sys/conf.h>
372aedd662SScott Long #include <sys/types.h>
382aedd662SScott Long #include <sys/queue.h>
392aedd662SScott Long #include <sys/bio.h>
402aedd662SScott Long #include <sys/malloc.h>
412aedd662SScott Long #include <sys/mutex.h>
42b234a120SScott Long #include <sys/sema.h>
437633e7f1SMartin Blapp #include <sys/time.h>
442aedd662SScott Long 
452aedd662SScott Long #include <machine/bus_memio.h>
462aedd662SScott Long #include <machine/bus.h>
472aedd662SScott Long #include <sys/rman.h>
482aedd662SScott Long #include <machine/resource.h>
492aedd662SScott Long 
5077e6a3b2SWarner Losh #include <dev/pci/pcireg.h>
5177e6a3b2SWarner Losh #include <dev/pci/pcivar.h>
522aedd662SScott Long 
53dd83a01eSScott Long MALLOC_DECLARE(M_IPSBUF);
54dd83a01eSScott Long 
552aedd662SScott Long /*
562aedd662SScott Long  *   IPS CONSTANTS
572aedd662SScott Long  */
582aedd662SScott Long #define IPS_VENDOR_ID                   0x1014
5933ad16c0SScott Long #define IPS_VENDOR_ID_ADAPTEC		0x9005
602aedd662SScott Long #define IPS_MORPHEUS_DEVICE_ID          0x01BD
612aedd662SScott Long #define IPS_COPPERHEAD_DEVICE_ID        0x002E
62dd851eccSScott Long #define IPS_MARCO_DEVICE_ID		0x0250
632aedd662SScott Long #define IPS_CSL				0xff
642aedd662SScott Long #define IPS_POCL			0x30
652aedd662SScott Long 
662aedd662SScott Long /* amounts of memory to allocate for certain commands */
672aedd662SScott Long #define IPS_ADAPTER_INFO_LEN		(sizeof(ips_adapter_info_t))
682aedd662SScott Long #define IPS_DRIVE_INFO_LEN		(sizeof(ips_drive_info_t))
692aedd662SScott Long #define IPS_COMMAND_LEN			24
702aedd662SScott Long #define IPS_MAX_SG_LEN			(sizeof(ips_sg_element_t) * IPS_MAX_SG_ELEMENTS)
712aedd662SScott Long #define IPS_NVRAM_PAGE_SIZE		128
722aedd662SScott Long /* various flags */
732aedd662SScott Long #define IPS_NOWAIT_FLAG			1
742aedd662SScott Long 
752aedd662SScott Long /* states for the card to be in */
762aedd662SScott Long #define IPS_DEV_OPEN			0x01
772aedd662SScott Long #define IPS_TIMEOUT			0x02 /* command time out, need reset */
782aedd662SScott Long #define IPS_OFFLINE			0x04 /* can't reset card/card failure */
792aedd662SScott Long 
802aedd662SScott Long /* max number of commands set to something low for now */
812aedd662SScott Long #define IPS_MAX_CMD_NUM			128
822aedd662SScott Long #define IPS_MAX_NUM_DRIVES		8
832aedd662SScott Long #define IPS_MAX_SG_ELEMENTS		32
842aedd662SScott Long #define IPS_MAX_IOBUF_SIZE		(64 * 1024)
852aedd662SScott Long #define IPS_BLKSIZE			512
862aedd662SScott Long 
872aedd662SScott Long /* logical drive states */
882aedd662SScott Long 
892aedd662SScott Long #define IPS_LD_OFFLINE               	0x02
902aedd662SScott Long #define IPS_LD_OKAY                  	0x03
917633e7f1SMartin Blapp #define IPS_LD_DEGRADED			0x04
922aedd662SScott Long #define IPS_LD_FREE                  	0x00
932aedd662SScott Long #define IPS_LD_SYS                   	0x06
942aedd662SScott Long #define IPS_LD_CRS                   	0x24
952aedd662SScott Long 
962aedd662SScott Long /* register offsets */
972aedd662SScott Long #define MORPHEUS_REG_OMR0               0x0018 /* Outbound Msg. Reg. 0 */
982aedd662SScott Long #define MORPHEUS_REG_OMR1               0x001C /* Outbound Msg. Reg. 1 */
992aedd662SScott Long #define MORPHEUS_REG_IDR		0x0020 /* Inbound Doorbell Reg. */
1002aedd662SScott Long #define MORPHEUS_REG_IISR               0x0024 /* Inbound IRQ Status Reg. */
1012aedd662SScott Long #define MORPHEUS_REG_IIMR               0x0028 /* Inbound IRQ Mask Reg. */
1022aedd662SScott Long #define MORPHEUS_REG_OISR               0x0030 /* Outbound IRQ Status Reg. */
1032aedd662SScott Long #define MORPHEUS_REG_OIMR               0x0034 /* Outbound IRQ Status Reg. */
1042aedd662SScott Long #define MORPHEUS_REG_IQPR               0x0040 /* Inbound Queue Port Reg. */
1052aedd662SScott Long #define MORPHEUS_REG_OQPR               0x0044 /* Outbound Queue Port Reg. */
1062aedd662SScott Long 
1072aedd662SScott Long #define COPPER_REG_SCPR			0x05	/* Subsystem Ctrl. Port Reg. */
1082aedd662SScott Long #define COPPER_REG_ISPR			0x06	/* IRQ Status Port Reg. */
1092aedd662SScott Long #define COPPER_REG_CBSP			0x07	/* ? Reg. */
1102aedd662SScott Long #define COPPER_REG_HISR			0x08	/* Host IRQ Status Reg.    */
1112aedd662SScott Long #define COPPER_REG_CCSAR		0x10	/* Cmd. Channel Sys Addr Reg.*/
1122aedd662SScott Long #define COPPER_REG_CCCR			0x14	/* Cmd. Channel Ctrl. Reg. */
1132aedd662SScott Long #define COPPER_REG_SQHR                	0x20    /* Status Queue Head Reg.  */
1142aedd662SScott Long #define COPPER_REG_SQTR                	0x24    /* Status Queue Tail Reg.  */
1152aedd662SScott Long #define COPPER_REG_SQER                	0x28    /* Status Queue End Reg.   */
1162aedd662SScott Long #define COPPER_REG_SQSR                	0x2C    /* Status Queue Start Reg. */
1172aedd662SScott Long 
1182aedd662SScott Long /* bit definitions */
1192aedd662SScott Long #define MORPHEUS_BIT_POST1              0x01
1202aedd662SScott Long #define MORPHEUS_BIT_POST2              0x02
1212aedd662SScott Long #define MORPHEUS_BIT_CMD_IRQ		0x08
1222aedd662SScott Long 
1232aedd662SScott Long #define COPPER_CMD_START		0x101A
1242aedd662SScott Long #define COPPER_SEM_BIT			0x08
1252aedd662SScott Long #define COPPER_EI_BIT			0x80
1262aedd662SScott Long #define COPPER_EBM_BIT			0x02
1272aedd662SScott Long #define COPPER_RESET_BIT		0x80
1282aedd662SScott Long #define COPPER_GHI_BIT			0x04
1292aedd662SScott Long #define COPPER_SCE_BIT			0x01
1302aedd662SScott Long #define COPPER_OP_BIT			0x01
1312aedd662SScott Long #define COPPER_ILE_BIT			0x10
1322aedd662SScott Long 
1332aedd662SScott Long /* status defines */
1342aedd662SScott Long #define IPS_POST1_OK                    0x8000
1352aedd662SScott Long #define IPS_POST2_OK                    0x000f
1362aedd662SScott Long 
1372aedd662SScott Long /* command op codes */
1382aedd662SScott Long #define IPS_READ_CMD			0x02
1392aedd662SScott Long #define IPS_WRITE_CMD			0x03
1402aedd662SScott Long #define IPS_ADAPTER_INFO_CMD		0x05
1412aedd662SScott Long #define IPS_CACHE_FLUSH_CMD		0x0A
1422aedd662SScott Long #define IPS_REBUILD_STATUS_CMD		0x0C
1432aedd662SScott Long #define IPS_ERROR_TABLE_CMD		0x17
1442aedd662SScott Long #define IPS_DRIVE_INFO_CMD		0x19
1452aedd662SScott Long #define IPS_SUBSYS_PARAM_CMD		0x40
1462aedd662SScott Long #define IPS_CONFIG_SYNC_CMD		0x58
1472aedd662SScott Long #define IPS_SG_READ_CMD			0x82
1482aedd662SScott Long #define IPS_SG_WRITE_CMD		0x83
1492aedd662SScott Long #define IPS_RW_NVRAM_CMD		0xBC
1507633e7f1SMartin Blapp #define IPS_FFDC_CMD			0xD7
1512aedd662SScott Long 
1522aedd662SScott Long /* error information returned by the adapter */
1532aedd662SScott Long #define IPS_MIN_ERROR			0x02
1542aedd662SScott Long #define IPS_ERROR_STATUS		0x13000200 /* ahh, magic numbers */
1552aedd662SScott Long 
1567633e7f1SMartin Blapp #define IPS_OS_FREEBSD			8
1572aedd662SScott Long #define IPS_VERSION_MAJOR		"0.90"
1587633e7f1SMartin Blapp #define IPS_VERSION_MINOR		".10"
1597633e7f1SMartin Blapp 
1607633e7f1SMartin Blapp /* Adapter Types */
1617633e7f1SMartin Blapp #define IPS_ADAPTER_COPPERHEAD		0x01
1627633e7f1SMartin Blapp #define IPS_ADAPTER_COPPERHEAD2		0x02
1637633e7f1SMartin Blapp #define IPS_ADAPTER_COPPERHEADOB1	0x03
1647633e7f1SMartin Blapp #define IPS_ADAPTER_COPPERHEADOB2	0x04
1657633e7f1SMartin Blapp #define IPS_ADAPTER_CLARINET		0x05
1667633e7f1SMartin Blapp #define IPS_ADAPTER_CLARINETLITE	0x06
1677633e7f1SMartin Blapp #define IPS_ADAPTER_TROMBONE		0x07
1687633e7f1SMartin Blapp #define IPS_ADAPTER_MORPHEUS		0x08
1697633e7f1SMartin Blapp #define IPS_ADAPTER_MORPHEUSLITE	0x09
1707633e7f1SMartin Blapp #define IPS_ADAPTER_NEO			0x0A
1717633e7f1SMartin Blapp #define IPS_ADAPTER_NEOLITE		0x0B
1727633e7f1SMartin Blapp #define IPS_ADAPTER_SARASOTA2		0x0C
1737633e7f1SMartin Blapp #define IPS_ADAPTER_SARASOTA1		0x0D
1747633e7f1SMartin Blapp #define IPS_ADAPTER_MARCO		0x0E
1757633e7f1SMartin Blapp #define IPS_ADAPTER_SEBRING		0x0F
1767633e7f1SMartin Blapp #define IPS_ADAPTER_MAX_T		IPS_ADAPTER_SEBRING
1777633e7f1SMartin Blapp 
1787633e7f1SMartin Blapp /* values for ffdc_settime (from gmtime) */
1797633e7f1SMartin Blapp #define IPS_SECSPERMIN      60
1807633e7f1SMartin Blapp #define IPS_MINSPERHOUR     60
1817633e7f1SMartin Blapp #define IPS_HOURSPERDAY     24
1827633e7f1SMartin Blapp #define IPS_DAYSPERWEEK     7
1837633e7f1SMartin Blapp #define IPS_DAYSPERNYEAR    365
1847633e7f1SMartin Blapp #define IPS_DAYSPERLYEAR    366
1857633e7f1SMartin Blapp #define IPS_SECSPERHOUR     (IPS_SECSPERMIN * IPS_MINSPERHOUR)
1867633e7f1SMartin Blapp #define IPS_SECSPERDAY      ((long) IPS_SECSPERHOUR * IPS_HOURSPERDAY)
1877633e7f1SMartin Blapp #define IPS_MONSPERYEAR     12
1887633e7f1SMartin Blapp #define IPS_EPOCH_YEAR      1970
1897633e7f1SMartin Blapp #define IPS_LEAPS_THRU_END_OF(y)    ((y) / 4 - (y) / 100 + (y) / 400)
1907633e7f1SMartin Blapp #define ips_isleap(y) (((y) % 4) == 0 && (((y) % 100) != 0 || ((y) % 400) == 0))
1912aedd662SScott Long 
1922aedd662SScott Long /*
1932aedd662SScott Long  *  IPS MACROS
1942aedd662SScott Long  */
1952aedd662SScott Long 
1962aedd662SScott Long #define ips_read_1(sc,offset)		bus_space_read_1(sc->bustag, sc->bushandle, offset)
1972aedd662SScott Long #define ips_read_2(sc,offset) 		bus_space_read_2(sc->bustag, sc->bushandle, offset)
1982aedd662SScott Long #define ips_read_4(sc,offset)		bus_space_read_4(sc->bustag, sc->bushandle, offset)
1992aedd662SScott Long 
2002aedd662SScott Long #define ips_write_1(sc,offset,value)	bus_space_write_1(sc->bustag, sc->bushandle, offset, value)
2012aedd662SScott Long #define ips_write_2(sc,offset,value) 	bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
2022aedd662SScott Long #define ips_write_4(sc,offset,value)	bus_space_write_4(sc->bustag, sc->bushandle, offset, value)
2032aedd662SScott Long 
2042aedd662SScott Long /* this is ugly.  It zeros the end elements in an ips_command_t struct starting with the status element */
2052aedd662SScott Long #define clear_ips_command(command)	bzero(&((command)->status), (unsigned long)(&(command)[1])-(unsigned long)&((command)->status))
2062aedd662SScott Long 
2072aedd662SScott Long #define ips_read_request(iobuf)		((iobuf)->bio_cmd == BIO_READ)
2082aedd662SScott Long 
2092aedd662SScott Long #define COMMAND_ERROR(status)		(((status)->fields.basic_status & 0x0f) >= IPS_MIN_ERROR)
2102aedd662SScott Long 
2112aedd662SScott Long #ifndef IPS_DEBUG
2122aedd662SScott Long #define DEVICE_PRINTF(x...)
2132aedd662SScott Long #define PRINTF(x...)
2142aedd662SScott Long #else
2152aedd662SScott Long #define DEVICE_PRINTF(level,x...)	if(IPS_DEBUG >= level)device_printf(x)
2162aedd662SScott Long #define PRINTF(level,x...)		if(IPS_DEBUG >= level)printf(x)
2172aedd662SScott Long #endif
2182aedd662SScott Long /*
2192aedd662SScott Long  *   IPS STRUCTS
2202aedd662SScott Long  */
2212aedd662SScott Long 
2222aedd662SScott Long struct ips_softc;
2232aedd662SScott Long 
2242aedd662SScott Long typedef struct{
2252aedd662SScott Long 	u_int8_t	command;
2262aedd662SScott Long 	u_int8_t	id;
2272aedd662SScott Long 	u_int8_t	drivenum;
2282aedd662SScott Long 	u_int8_t	reserve2;
2292aedd662SScott Long 	u_int32_t	lba;
2302aedd662SScott Long 	u_int32_t	buffaddr;
2312aedd662SScott Long 	u_int32_t	reserve3;
2322aedd662SScott Long } __attribute__ ((packed)) ips_generic_cmd;
2332aedd662SScott Long 
2342aedd662SScott Long typedef struct{
2352aedd662SScott Long 	u_int8_t	command;
2362aedd662SScott Long 	u_int8_t	id;
2372aedd662SScott Long 	u_int8_t	drivenum;
2382aedd662SScott Long 	u_int8_t	segnum;
2392aedd662SScott Long 	u_int32_t	lba;
2402aedd662SScott Long 	u_int32_t	buffaddr;
2412aedd662SScott Long 	u_int16_t	length;
2422aedd662SScott Long 	u_int16_t	reserve1;
2432aedd662SScott Long } __attribute__ ((packed)) ips_io_cmd;
2442aedd662SScott Long 
2452aedd662SScott Long typedef struct{
2462aedd662SScott Long 	u_int8_t	command;
2472aedd662SScott Long 	u_int8_t	id;
2482aedd662SScott Long 	u_int8_t	pagenum;
2492aedd662SScott Long 	u_int8_t	rw;
2502aedd662SScott Long 	u_int32_t	reserve1;
2512aedd662SScott Long 	u_int32_t	buffaddr;
2522aedd662SScott Long 	u_int32_t	reserve3;
2532aedd662SScott Long } __attribute__ ((packed)) ips_rw_nvram_cmd;
2542aedd662SScott Long 
2552aedd662SScott Long typedef struct{
2562aedd662SScott Long 	u_int8_t	command;
2572aedd662SScott Long 	u_int8_t	id;
2582aedd662SScott Long 	u_int8_t	drivenum;
2592aedd662SScott Long 	u_int8_t	reserve1;
2602aedd662SScott Long 	u_int32_t	reserve2;
2612aedd662SScott Long 	u_int32_t	buffaddr;
2622aedd662SScott Long 	u_int32_t	reserve3;
2632aedd662SScott Long } __attribute__ ((packed)) ips_drive_cmd;
2642aedd662SScott Long 
2652aedd662SScott Long typedef struct{
2662aedd662SScott Long 	u_int8_t	command;
2672aedd662SScott Long 	u_int8_t	id;
2682aedd662SScott Long 	u_int8_t	reserve1;
2692aedd662SScott Long 	u_int8_t	commandtype;
2702aedd662SScott Long 	u_int32_t	reserve2;
2712aedd662SScott Long 	u_int32_t	buffaddr;
2722aedd662SScott Long 	u_int32_t	reserve3;
2732aedd662SScott Long } __attribute__((packed)) ips_adapter_info_cmd;
2742aedd662SScott Long 
2757633e7f1SMartin Blapp typedef struct{
2767633e7f1SMartin Blapp 	u_int8_t	command;
2777633e7f1SMartin Blapp 	u_int8_t	id;
2787633e7f1SMartin Blapp 	u_int8_t	reset_count;
2797633e7f1SMartin Blapp 	u_int8_t	reset_type;
2807633e7f1SMartin Blapp 	u_int8_t	second;
2817633e7f1SMartin Blapp 	u_int8_t	minute;
2827633e7f1SMartin Blapp 	u_int8_t	hour;
2837633e7f1SMartin Blapp 	u_int8_t	day;
2847633e7f1SMartin Blapp 	u_int8_t	reserve1[4];
2857633e7f1SMartin Blapp 	u_int8_t	month;
2867633e7f1SMartin Blapp 	u_int8_t	yearH;
2877633e7f1SMartin Blapp 	u_int8_t	yearL;
2887633e7f1SMartin Blapp 	u_int8_t	reserve2;
2897633e7f1SMartin Blapp } __attribute__((packed)) ips_adapter_ffdc_cmd;
2907633e7f1SMartin Blapp 
2912aedd662SScott Long typedef union{
2922aedd662SScott Long 	ips_generic_cmd		generic_cmd;
2932aedd662SScott Long 	ips_drive_cmd 		drive_cmd;
2942aedd662SScott Long 	ips_adapter_info_cmd 	adapter_info_cmd;
2952aedd662SScott Long } ips_cmd_buff_t;
2962aedd662SScott Long 
2972aedd662SScott Long typedef struct {
2982aedd662SScott Long    u_int32_t  signature;
2992aedd662SScott Long    u_int8_t   reserved;
3002aedd662SScott Long    u_int8_t   adapter_slot;
3012aedd662SScott Long    u_int16_t  adapter_type;
3022aedd662SScott Long    u_int8_t   bios_high[4];
3032aedd662SScott Long    u_int8_t   bios_low[4];
3042aedd662SScott Long    u_int16_t  reserve2;
3052aedd662SScott Long    u_int8_t   reserve3;
3062aedd662SScott Long    u_int8_t   operating_system;
3072aedd662SScott Long    u_int8_t   driver_high[4];
3082aedd662SScott Long    u_int8_t   driver_low[4];
3092aedd662SScott Long    u_int8_t   reserve4[100];
3102aedd662SScott Long }__attribute__((packed)) ips_nvram_page5;
3112aedd662SScott Long 
3122aedd662SScott Long typedef struct{
3132aedd662SScott Long 	u_int32_t	addr;
3142aedd662SScott Long 	u_int32_t	len;
3152aedd662SScott Long } ips_sg_element_t;
3162aedd662SScott Long 
3172aedd662SScott Long typedef struct{
3182aedd662SScott Long 	u_int8_t	drivenum;
3192aedd662SScott Long 	u_int8_t	merge_id;
3202aedd662SScott Long 	u_int8_t	raid_lvl;
3212aedd662SScott Long 	u_int8_t	state;
3222aedd662SScott Long 	u_int32_t	sector_count;
3232aedd662SScott Long } __attribute__((packed)) ips_drive_t;
3242aedd662SScott Long 
3252aedd662SScott Long typedef struct{
3262aedd662SScott Long 	u_int8_t	drivecount;
3272aedd662SScott Long 	u_int8_t	reserve1;
3282aedd662SScott Long 	u_int16_t	reserve2;
3292aedd662SScott Long 	ips_drive_t drives[IPS_MAX_NUM_DRIVES];
3302aedd662SScott Long }__attribute__((packed)) ips_drive_info_t;
3312aedd662SScott Long 
3322aedd662SScott Long typedef struct{
3332aedd662SScott Long 	u_int8_t	drivecount;
3342aedd662SScott Long 	u_int8_t	miscflags;
3352aedd662SScott Long 	u_int8_t	SLTflags;
3362aedd662SScott Long 	u_int8_t	BSTflags;
3372aedd662SScott Long 	u_int8_t	pwr_chg_count;
3382aedd662SScott Long 	u_int8_t	wrong_addr_count;
3392aedd662SScott Long 	u_int8_t	unident_count;
3402aedd662SScott Long 	u_int8_t	nvram_dev_chg_count;
3412aedd662SScott Long 	u_int8_t	codeblock_version[8];
3422aedd662SScott Long 	u_int8_t	bootblock_version[8];
3432aedd662SScott Long 	u_int32_t	drive_sector_count[IPS_MAX_NUM_DRIVES];
3442aedd662SScott Long 	u_int8_t	max_concurrent_cmds;
3452aedd662SScott Long 	u_int8_t	max_phys_devices;
3462aedd662SScott Long 	u_int16_t	flash_prog_count;
3472aedd662SScott Long 	u_int8_t	defunct_disks;
3482aedd662SScott Long 	u_int8_t	rebuildflags;
3492aedd662SScott Long 	u_int8_t	offline_drivecount;
3502aedd662SScott Long 	u_int8_t	critical_drivecount;
3512aedd662SScott Long 	u_int16_t	config_update_count;
3522aedd662SScott Long 	u_int8_t	blockedflags;
3532aedd662SScott Long 	u_int8_t	psdn_error;
3542aedd662SScott Long 	u_int16_t	addr_dead_disk[4*16];/* ugly, max # channels * max # scsi devices per channel */
3552aedd662SScott Long }__attribute__((packed)) ips_adapter_info_t;
3562aedd662SScott Long 
3572aedd662SScott Long typedef struct {
3582aedd662SScott Long 	u_int32_t 	status[IPS_MAX_CMD_NUM];
3592aedd662SScott Long 	u_int32_t 	base_phys_addr;
3602aedd662SScott Long 	int 		nextstatus;
3612aedd662SScott Long 	bus_dma_tag_t	dmatag;
3622aedd662SScott Long 	bus_dmamap_t	dmamap;
3632aedd662SScott Long } ips_copper_queue_t;
3642aedd662SScott Long 
3652aedd662SScott Long typedef union {
3662aedd662SScott Long    struct {
3672aedd662SScott Long       u_int8_t  reserved;
3682aedd662SScott Long       u_int8_t  command_id;
3692aedd662SScott Long       u_int8_t  basic_status;
3702aedd662SScott Long       u_int8_t  extended_status;
3712aedd662SScott Long    } fields;
3722aedd662SScott Long    volatile u_int32_t    value;
3732aedd662SScott Long } ips_cmd_status_t;
3742aedd662SScott Long 
3752aedd662SScott Long /* used to keep track of current commands to the card */
3762aedd662SScott Long typedef struct ips_command{
3772aedd662SScott Long 	u_int8_t		command_number;
3782aedd662SScott Long 	u_int8_t 		id;
3792aedd662SScott Long 	u_int8_t		timeout;
3802aedd662SScott Long 	struct ips_softc *	sc;
3812aedd662SScott Long 	bus_dmamap_t		command_dmamap;
3822aedd662SScott Long 	void *			command_buffer;
3832aedd662SScott Long 	u_int32_t		command_phys_addr;/*WARNING! must be changed if 64bit addressing ever used*/
384b234a120SScott Long 	struct sema		cmd_sema;
3852aedd662SScott Long 	ips_cmd_status_t	status;
3862aedd662SScott Long 	SLIST_ENTRY(ips_command)	next;
3872aedd662SScott Long 	bus_dma_tag_t		data_dmatag;
3882aedd662SScott Long 	bus_dmamap_t		data_dmamap;
3892aedd662SScott Long 	void *			data_buffer;
3902aedd662SScott Long 	void * 			arg;
3912aedd662SScott Long 	void			(* callback)(struct ips_command *command);
3922aedd662SScott Long }ips_command_t;
3932aedd662SScott Long 
3942aedd662SScott Long typedef struct ips_wait_list{
3952aedd662SScott Long 	STAILQ_ENTRY(ips_wait_list) next;
3962aedd662SScott Long 	void 			*data;
3972aedd662SScott Long 	int			(* callback)(ips_command_t *command);
3982aedd662SScott Long }ips_wait_list_t;
3992aedd662SScott Long 
4002aedd662SScott Long typedef struct ips_softc{
4012aedd662SScott Long         struct resource *       iores;
4022aedd662SScott Long         struct resource *       irqres;
403faf13262SPaul Saab         struct intr_config_hook ips_ich;
404dea4622dSScott Long         int                     configured;
4052aedd662SScott Long         int                     state;
4062aedd662SScott Long         int                     iotype;
4072aedd662SScott Long         int                     rid;
4082aedd662SScott Long         int                     irqrid;
4092aedd662SScott Long         void *                  irqcookie;
4102aedd662SScott Long         bus_space_tag_t	        bustag;
4112aedd662SScott Long 	bus_space_handle_t      bushandle;
4122aedd662SScott Long 	bus_dma_tag_t	        adapter_dmatag;
4132aedd662SScott Long 	bus_dma_tag_t		command_dmatag;
4142aedd662SScott Long 	bus_dma_tag_t		sg_dmatag;
4152aedd662SScott Long         device_t                dev;
4162aedd662SScott Long         dev_t                   device_file;
4172aedd662SScott Long 	struct callout_handle	timer;
4187633e7f1SMartin Blapp 	u_int16_t		adapter_type;
4192aedd662SScott Long 	ips_adapter_info_t	adapter_info;
4202aedd662SScott Long 	device_t		diskdev[IPS_MAX_NUM_DRIVES];
4212aedd662SScott Long 	ips_drive_t		drives[IPS_MAX_NUM_DRIVES];
4222aedd662SScott Long 	u_int8_t		drivecount;
4237633e7f1SMartin Blapp 	u_int16_t		ffdc_resetcount;
4247633e7f1SMartin Blapp 	struct timeval		ffdc_resettime;
4252aedd662SScott Long 	u_int8_t		next_drive;
4262aedd662SScott Long 	u_int8_t		max_cmds;
4272aedd662SScott Long 	volatile u_int8_t	used_commands;
4282aedd662SScott Long 	ips_command_t		commandarray[IPS_MAX_CMD_NUM];
4292aedd662SScott Long 	SLIST_HEAD(command_list, ips_command) free_cmd_list;
4302aedd662SScott Long 	STAILQ_HEAD(command_wait_list,ips_wait_list)  cmd_wait_list;
4312aedd662SScott Long 	int			(* ips_adapter_reinit)(struct ips_softc *sc,
4322aedd662SScott Long 						       int force);
4332aedd662SScott Long         void                    (* ips_adapter_intr)(void *sc);
4342aedd662SScott Long 	void			(* ips_issue_cmd)(ips_command_t *command);
4352aedd662SScott Long 	ips_copper_queue_t *	copper_queue;
436b234a120SScott Long 	struct mtx		queue_mtx;
437b234a120SScott Long 	struct bio_queue_head	queue;
438b234a120SScott Long 
4392aedd662SScott Long }ips_softc_t;
4402aedd662SScott Long 
4412aedd662SScott Long /* function defines from ips_ioctl.c */
4422aedd662SScott Long extern int ips_ioctl_request(ips_softc_t *sc, u_long ioctl_cmd, caddr_t addr,
4432aedd662SScott Long 				int32_t flags);
4442aedd662SScott Long /* function defines from ips_disk.c */
4452aedd662SScott Long extern void ipsd_finish(struct bio *iobuf);
4462aedd662SScott Long 
4472aedd662SScott Long /* function defines from ips_commands.c */
4482aedd662SScott Long extern int ips_flush_cache(ips_softc_t *sc);
449b234a120SScott Long extern void ips_start_io_request(ips_softc_t *sc);
4502aedd662SScott Long extern int ips_get_drive_info(ips_softc_t *sc);
4512aedd662SScott Long extern int ips_get_adapter_info(ips_softc_t *sc);
4527633e7f1SMartin Blapp extern int ips_ffdc_reset(ips_softc_t *sc);
4532aedd662SScott Long extern int ips_update_nvram(ips_softc_t *sc);
4542aedd662SScott Long extern int ips_clear_adapter(ips_softc_t *sc);
4552aedd662SScott Long 
4562aedd662SScott Long /* function defines from ips.c */
4572aedd662SScott Long extern int ips_get_free_cmd(ips_softc_t *sc, int (*callback)(ips_command_t *),
4582aedd662SScott Long 				void *data, unsigned long flags);
4592aedd662SScott Long extern void ips_insert_free_cmd(ips_softc_t *sc, ips_command_t *command);
4602aedd662SScott Long extern int ips_adapter_init(ips_softc_t *sc);
4612aedd662SScott Long extern int ips_morpheus_reinit(ips_softc_t *sc, int force);
4622aedd662SScott Long extern int ips_adapter_free(ips_softc_t *sc);
4632aedd662SScott Long extern void ips_morpheus_intr(void *sc);
4642aedd662SScott Long extern void ips_issue_morpheus_cmd(ips_command_t *command);
4652aedd662SScott Long extern int ips_copperhead_reinit(ips_softc_t *sc, int force);
4662aedd662SScott Long extern void ips_copperhead_intr(void *sc);
4672aedd662SScott Long extern void ips_issue_copperhead_cmd(ips_command_t *command);
4682aedd662SScott Long 
469