1 /*- 2 * Copyright (c) 2006 IronPort Systems Inc. <ambrisko@ironport.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef __IPMIVARS_H__ 30 #define __IPMIVARS_H__ 31 32 struct ipmi_get_info { 33 int iface_type; 34 uint64_t address; 35 int offset; 36 int io_mode; 37 int irq; 38 }; 39 40 struct ipmi_device; 41 42 struct ipmi_request { 43 TAILQ_ENTRY(ipmi_request) ir_link; 44 struct ipmi_device *ir_owner; /* Driver uses NULL. */ 45 u_char *ir_request; /* Request is data to send to BMC. */ 46 size_t ir_requestlen; 47 u_char *ir_reply; /* Reply is data read from BMC. */ 48 size_t ir_replybuflen; /* Length of ir_reply[] buffer. */ 49 int ir_replylen; /* Length of reply from BMC. */ 50 int ir_error; 51 long ir_msgid; 52 uint8_t ir_addr; 53 uint8_t ir_command; 54 uint8_t ir_compcode; 55 }; 56 57 #define MAX_RES 3 58 #define KCS_DATA 0 59 #define KCS_CTL_STS 1 60 #define SMIC_DATA 0 61 #define SMIC_CTL_STS 1 62 #define SMIC_FLAGS 2 63 64 struct ipmi_softc; 65 66 /* Per file descriptor data. */ 67 struct ipmi_device { 68 TAILQ_ENTRY(ipmi_device) ipmi_link; 69 TAILQ_HEAD(,ipmi_request) ipmi_completed_requests; 70 struct selinfo ipmi_select; 71 struct ipmi_softc *ipmi_softc; 72 int ipmi_closing; 73 int ipmi_requests; 74 u_char ipmi_address; /* IPMB address. */ 75 u_char ipmi_lun; 76 }; 77 78 struct ipmi_kcs { 79 }; 80 81 struct ipmi_smic { 82 }; 83 84 struct ipmi_ssif { 85 device_t smbus; 86 int smbus_address; 87 }; 88 89 struct ipmi_softc { 90 device_t ipmi_dev; 91 union { 92 struct ipmi_kcs kcs; 93 struct ipmi_smic smic; 94 struct ipmi_ssif ssif; 95 } _iface; 96 int ipmi_io_rid; 97 int ipmi_io_type; 98 struct mtx ipmi_io_lock; 99 struct resource *ipmi_io_res[MAX_RES]; 100 int ipmi_io_spacing; 101 int ipmi_irq_rid; 102 struct resource *ipmi_irq_res; 103 void *ipmi_irq; 104 int ipmi_detaching; 105 int ipmi_opened; 106 uint8_t ipmi_dev_support; /* IPMI_ADS_* */ 107 struct cdev *ipmi_cdev; 108 TAILQ_HEAD(,ipmi_request) ipmi_pending_requests; 109 int ipmi_driver_requests_polled; 110 eventhandler_tag ipmi_power_cycle_tag; 111 eventhandler_tag ipmi_watchdog_tag; 112 eventhandler_tag ipmi_shutdown_tag; 113 int ipmi_watchdog_active; 114 int ipmi_watchdog_actions; 115 int ipmi_watchdog_pretimeout; 116 struct intr_config_hook ipmi_ich; 117 struct mtx ipmi_requests_lock; 118 struct cv ipmi_request_added; 119 struct proc *ipmi_kthread; 120 driver_intr_t *ipmi_intr; 121 int (*ipmi_startup)(struct ipmi_softc *); 122 int (*ipmi_enqueue_request)(struct ipmi_softc *, struct ipmi_request *); 123 int (*ipmi_driver_request)(struct ipmi_softc *, struct ipmi_request *, int); 124 }; 125 126 #define ipmi_ssif_smbus_address _iface.ssif.smbus_address 127 #define ipmi_ssif_smbus _iface.ssif.smbus 128 129 struct ipmi_ipmb { 130 u_char foo; 131 }; 132 133 #define KCS_MODE 0x01 134 #define SMIC_MODE 0x02 135 #define BT_MODE 0x03 136 #define SSIF_MODE 0x04 137 138 /* KCS status flags */ 139 #define KCS_STATUS_OBF 0x01 /* Data Out ready from BMC */ 140 #define KCS_STATUS_IBF 0x02 /* Data In from System */ 141 #define KCS_STATUS_SMS_ATN 0x04 /* Ready in RX queue */ 142 #define KCS_STATUS_C_D 0x08 /* Command/Data register write*/ 143 #define KCS_STATUS_OEM1 0x10 144 #define KCS_STATUS_OEM2 0x20 145 #define KCS_STATUS_S0 0x40 146 #define KCS_STATUS_S1 0x80 147 #define KCS_STATUS_STATE(x) ((x)>>6) 148 #define KCS_STATUS_STATE_IDLE 0x0 149 #define KCS_STATUS_STATE_READ 0x1 150 #define KCS_STATUS_STATE_WRITE 0x2 151 #define KCS_STATUS_STATE_ERROR 0x3 152 #define KCS_IFACE_STATUS_OK 0x00 153 #define KCS_IFACE_STATUS_ABORT 0x01 154 #define KCS_IFACE_STATUS_ILLEGAL 0x02 155 #define KCS_IFACE_STATUS_LENGTH_ERR 0x06 156 #define KCS_IFACE_STATUS_UNKNOWN_ERR 0xff 157 158 /* KCS control codes */ 159 #define KCS_CONTROL_GET_STATUS_ABORT 0x60 160 #define KCS_CONTROL_WRITE_START 0x61 161 #define KCS_CONTROL_WRITE_END 0x62 162 #define KCS_DATA_IN_READ 0x68 163 164 /* SMIC status flags */ 165 #define SMIC_STATUS_BUSY 0x01 /* System set and BMC clears it */ 166 #define SMIC_STATUS_SMS_ATN 0x04 /* BMC has a message */ 167 #define SMIC_STATUS_EVT_ATN 0x08 /* Event has been RX */ 168 #define SMIC_STATUS_SMI 0x10 /* asserted SMI */ 169 #define SMIC_STATUS_TX_RDY 0x40 /* Ready to accept WRITE */ 170 #define SMIC_STATUS_RX_RDY 0x80 /* Ready to read */ 171 #define SMIC_STATUS_RESERVED 0x22 172 173 /* SMIC control codes */ 174 #define SMIC_CC_SMS_GET_STATUS 0x40 175 #define SMIC_CC_SMS_WR_START 0x41 176 #define SMIC_CC_SMS_WR_NEXT 0x42 177 #define SMIC_CC_SMS_WR_END 0x43 178 #define SMIC_CC_SMS_RD_START 0x44 179 #define SMIC_CC_SMS_RD_NEXT 0x45 180 #define SMIC_CC_SMS_RD_END 0x46 181 182 /* SMIC status codes */ 183 #define SMIC_SC_SMS_RDY 0xc0 184 #define SMIC_SC_SMS_WR_START 0xc1 185 #define SMIC_SC_SMS_WR_NEXT 0xc2 186 #define SMIC_SC_SMS_WR_END 0xc3 187 #define SMIC_SC_SMS_RD_START 0xc4 188 #define SMIC_SC_SMS_RD_NEXT 0xc5 189 #define SMIC_SC_SMS_RD_END 0xc6 190 191 #define IPMI_ADDR(netfn, lun) ((netfn) << 2 | (lun)) 192 #define IPMI_REPLY_ADDR(addr) ((addr) + 0x4) 193 194 #define IPMI_LOCK(sc) mtx_lock(&(sc)->ipmi_requests_lock) 195 #define IPMI_UNLOCK(sc) mtx_unlock(&(sc)->ipmi_requests_lock) 196 #define IPMI_LOCK_ASSERT(sc) mtx_assert(&(sc)->ipmi_requests_lock, MA_OWNED) 197 198 #define IPMI_IO_LOCK(sc) mtx_lock(&(sc)->ipmi_io_lock) 199 #define IPMI_IO_UNLOCK(sc) mtx_unlock(&(sc)->ipmi_io_lock) 200 #define IPMI_IO_LOCK_ASSERT(sc) mtx_assert(&(sc)->ipmi_io_lock, MA_OWNED) 201 202 /* I/O to a single I/O resource. */ 203 #define INB_SINGLE(sc, x) \ 204 bus_read_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x)) 205 #define OUTB_SINGLE(sc, x, value) \ 206 bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value) 207 208 /* I/O with each register in its in I/O resource. */ 209 #define INB_MULTIPLE(sc, x) \ 210 bus_read_1((sc)->ipmi_io_res[(x)], 0) 211 #define OUTB_MULTIPLE(sc, x, value) \ 212 bus_write_1((sc)->ipmi_io_res[(x)], 0, value) 213 214 /* 215 * Determine I/O method based on whether or not we have more than one I/O 216 * resource. 217 */ 218 #define INB(sc, x) \ 219 ((sc)->ipmi_io_res[1] != NULL ? INB_MULTIPLE(sc, x) : INB_SINGLE(sc, x)) 220 #define OUTB(sc, x, value) \ 221 ((sc)->ipmi_io_res[1] != NULL ? OUTB_MULTIPLE(sc, x, value) : \ 222 OUTB_SINGLE(sc, x, value)) 223 224 #define MAX_TIMEOUT 6 * hz 225 226 int ipmi_attach(device_t); 227 int ipmi_detach(device_t); 228 void ipmi_release_resources(device_t); 229 230 /* Manage requests. */ 231 struct ipmi_request *ipmi_alloc_request(struct ipmi_device *, long, uint8_t, 232 uint8_t, size_t, size_t); 233 void ipmi_complete_request(struct ipmi_softc *, struct ipmi_request *); 234 struct ipmi_request *ipmi_dequeue_request(struct ipmi_softc *); 235 void ipmi_free_request(struct ipmi_request *); 236 int ipmi_polled_enqueue_request(struct ipmi_softc *, struct ipmi_request *); 237 int ipmi_submit_driver_request(struct ipmi_softc *, struct ipmi_request *, 238 int); 239 240 /* Identify BMC interface via SMBIOS. */ 241 int ipmi_smbios_identify(struct ipmi_get_info *); 242 243 /* Match BMC PCI device listed in SMBIOS. */ 244 const char *ipmi_pci_match(uint16_t, uint16_t); 245 246 /* Interface attach routines. */ 247 int ipmi_kcs_attach(struct ipmi_softc *); 248 int ipmi_kcs_probe_align(struct ipmi_softc *); 249 int ipmi_smic_attach(struct ipmi_softc *); 250 int ipmi_ssif_attach(struct ipmi_softc *, device_t, int); 251 252 #ifdef IPMB 253 int ipmi_handle_attn(struct ipmi_softc *); 254 #endif 255 256 extern devclass_t ipmi_devclass; 257 extern int ipmi_attached; 258 259 #endif /* !__IPMIVARS_H__ */ 260