xref: /freebsd/sys/dev/ioat/ioat.h (revision d9f0ce31900a48d1a2bfc1c8c86f79d1e831451a)
1 /*-
2  * Copyright (C) 2012 Intel Corporation
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 __FBSDID("$FreeBSD$");
28 
29 #ifndef __IOAT_H__
30 #define __IOAT_H__
31 
32 #include <sys/param.h>
33 #include <machine/bus.h>
34 
35 /*
36  * This file defines the public interface to the IOAT driver.
37  */
38 
39 /*
40  * Enables an interrupt for this operation. Typically, you would only enable
41  * this on the last operation in a group
42  */
43 #define	DMA_INT_EN	0x1
44 /*
45  * Like M_NOWAIT.  Operations will return NULL if they cannot allocate a
46  * descriptor without blocking.
47  */
48 #define	DMA_NO_WAIT	0x2
49 /*
50  * Disallow prefetching the source of the following operation.  Ordinarily, DMA
51  * operations can be pipelined on some hardware.  E.g., operation 2's source
52  * may be prefetched before operation 1 completes.
53  */
54 #define	DMA_FENCE	0x4
55 #define	DMA_ALL_FLAGS	(DMA_INT_EN | DMA_NO_WAIT | DMA_FENCE)
56 
57 /*
58  * Hardware revision number.  Different hardware revisions support different
59  * features.  For example, 3.2 cannot read from MMIO space, while 3.3 can.
60  */
61 #define	IOAT_VER_3_0			0x30
62 #define	IOAT_VER_3_2			0x32
63 #define	IOAT_VER_3_3			0x33
64 
65 typedef void *bus_dmaengine_t;
66 struct bus_dmadesc;
67 typedef void (*bus_dmaengine_callback_t)(void *arg, int error);
68 
69 /*
70  * Called first to acquire a reference to the DMA channel
71  *
72  * Flags may be M_WAITOK or M_NOWAIT.
73  */
74 bus_dmaengine_t ioat_get_dmaengine(uint32_t channel_index, int flags);
75 
76 /* Release the DMA channel */
77 void ioat_put_dmaengine(bus_dmaengine_t dmaengine);
78 
79 /* Check the DMA engine's HW version */
80 int ioat_get_hwversion(bus_dmaengine_t dmaengine);
81 size_t ioat_get_max_io_size(bus_dmaengine_t dmaengine);
82 
83 /*
84  * Set interrupt coalescing on a DMA channel.
85  *
86  * The argument is in microseconds.  A zero value disables coalescing.  Any
87  * other value delays interrupt generation for N microseconds to provide
88  * opportunity to coalesce multiple operations into a single interrupt.
89  *
90  * Returns an error status, or zero on success.
91  *
92  * - ERANGE if the given value exceeds the delay supported by the hardware.
93  *   (All current hardware supports a maximum of 0x3fff microseconds delay.)
94  * - ENODEV if the hardware does not support interrupt coalescing.
95  */
96 int ioat_set_interrupt_coalesce(bus_dmaengine_t dmaengine, uint16_t delay);
97 
98 /*
99  * Return the maximum supported coalescing period, for use in
100  * ioat_set_interrupt_coalesce().  If the hardware does not support coalescing,
101  * returns zero.
102  */
103 uint16_t ioat_get_max_coalesce_period(bus_dmaengine_t dmaengine);
104 
105 /*
106  * Acquire must be called before issuing an operation to perform. Release is
107  * called after.  Multiple operations can be issued within the context of one
108  * acquire and release
109  */
110 void ioat_acquire(bus_dmaengine_t dmaengine);
111 void ioat_release(bus_dmaengine_t dmaengine);
112 
113 /*
114  * Acquire_reserve can be called to ensure there is room for N descriptors.  If
115  * it succeeds, the next N valid operations will successfully enqueue.
116  *
117  * It may fail with:
118  *   - ENXIO if the channel is in an errored state, or the driver is being
119  *     unloaded
120  *   - EAGAIN if mflags included M_NOWAIT
121  *
122  * On failure, the caller does not hold the dmaengine.
123  */
124 int ioat_acquire_reserve(bus_dmaengine_t dmaengine, unsigned n, int mflags);
125 
126 /*
127  * Issue a blockfill operation.  The 64-bit pattern 'fillpattern' is written to
128  * 'len' physically contiguous bytes at 'dst'.
129  *
130  * Only supported on devices with the BFILL capability.
131  */
132 struct bus_dmadesc *ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst,
133     uint64_t fillpattern, bus_size_t len, bus_dmaengine_callback_t callback_fn,
134     void *callback_arg, uint32_t flags);
135 
136 /* Issues the copy data operation */
137 struct bus_dmadesc *ioat_copy(bus_dmaengine_t dmaengine, bus_addr_t dst,
138     bus_addr_t src, bus_size_t len, bus_dmaengine_callback_t callback_fn,
139     void *callback_arg, uint32_t flags);
140 
141 /*
142  * Issue a copy data operation, with constraints:
143  *  - src1, src2, dst1, dst2 are all page-aligned addresses
144  *  - The quantity to copy is exactly 2 pages;
145  *  - src1 -> dst1, src2 -> dst2
146  *
147  * Why use this instead of normal _copy()?  You can copy two non-contiguous
148  * pages (src, dst, or both) with one descriptor.
149  */
150 struct bus_dmadesc *ioat_copy_8k_aligned(bus_dmaengine_t dmaengine,
151     bus_addr_t dst1, bus_addr_t dst2, bus_addr_t src1, bus_addr_t src2,
152     bus_dmaengine_callback_t callback_fn, void *callback_arg, uint32_t flags);
153 
154 /*
155  * Issues a null operation. This issues the operation to the hardware, but the
156  * hardware doesn't do anything with it.
157  */
158 struct bus_dmadesc *ioat_null(bus_dmaengine_t dmaengine,
159     bus_dmaengine_callback_t callback_fn, void *callback_arg, uint32_t flags);
160 
161 
162 #endif /* __IOAT_H__ */
163 
164