1 /*- 2 * Copyright (C) 2012 Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 __FBSDID("$FreeBSD$"); 28 29 #ifndef __IOAT_H__ 30 #define __IOAT_H__ 31 32 #include <sys/param.h> 33 #include <machine/bus.h> 34 35 /* 36 * This file defines the public interface to the IOAT driver. 37 */ 38 39 /* 40 * Enables an interrupt for this operation. Typically, you would only enable 41 * this on the last operation in a group 42 */ 43 #define DMA_INT_EN 0x1 44 /* 45 * Like M_NOWAIT. Operations will return NULL if they cannot allocate a 46 * descriptor without blocking. 47 */ 48 #define DMA_NO_WAIT 0x2 49 #define DMA_ALL_FLAGS (DMA_INT_EN | DMA_NO_WAIT) 50 51 /* 52 * Hardware revision number. Different hardware revisions support different 53 * features. For example, 3.2 cannot read from MMIO space, while 3.3 can. 54 */ 55 #define IOAT_VER_3_0 0x30 56 #define IOAT_VER_3_2 0x32 57 #define IOAT_VER_3_3 0x33 58 59 typedef void *bus_dmaengine_t; 60 struct bus_dmadesc; 61 typedef void (*bus_dmaengine_callback_t)(void *arg, int error); 62 63 /* 64 * Called first to acquire a reference to the DMA channel 65 */ 66 bus_dmaengine_t ioat_get_dmaengine(uint32_t channel_index); 67 68 /* Release the DMA channel */ 69 void ioat_put_dmaengine(bus_dmaengine_t dmaengine); 70 71 /* Check the DMA engine's HW version */ 72 int ioat_get_hwversion(bus_dmaengine_t dmaengine); 73 size_t ioat_get_max_io_size(bus_dmaengine_t dmaengine); 74 75 /* 76 * Set interrupt coalescing on a DMA channel. 77 * 78 * The argument is in microseconds. A zero value disables coalescing. Any 79 * other value delays interrupt generation for N microseconds to provide 80 * opportunity to coalesce multiple operations into a single interrupt. 81 * 82 * Returns an error status, or zero on success. 83 * 84 * - ERANGE if the given value exceeds the delay supported by the hardware. 85 * (All current hardware supports a maximum of 0x3fff microseconds delay.) 86 * - ENODEV if the hardware does not support interrupt coalescing. 87 */ 88 int ioat_set_interrupt_coalesce(bus_dmaengine_t dmaengine, uint16_t delay); 89 90 /* 91 * Return the maximum supported coalescing period, for use in 92 * ioat_set_interrupt_coalesce(). If the hardware does not support coalescing, 93 * returns zero. 94 */ 95 uint16_t ioat_get_max_coalesce_period(bus_dmaengine_t dmaengine); 96 97 /* 98 * Acquire must be called before issuing an operation to perform. Release is 99 * called after. Multiple operations can be issued within the context of one 100 * acquire and release 101 */ 102 void ioat_acquire(bus_dmaengine_t dmaengine); 103 void ioat_release(bus_dmaengine_t dmaengine); 104 105 /* 106 * Acquire_reserve can be called to ensure there is room for N descriptors. If 107 * it succeeds, the next N valid operations will successfully enqueue. 108 * 109 * It may fail with: 110 * - ENXIO if the channel is in an errored state, or the driver is being 111 * unloaded 112 * - EAGAIN if mflags included M_NOWAIT 113 * 114 * On failure, the caller does not hold the dmaengine. 115 */ 116 int ioat_acquire_reserve(bus_dmaengine_t dmaengine, unsigned n, int mflags); 117 118 /* 119 * Issue a blockfill operation. The 64-bit pattern 'fillpattern' is written to 120 * 'len' physically contiguous bytes at 'dst'. 121 * 122 * Only supported on devices with the BFILL capability. 123 */ 124 struct bus_dmadesc *ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst, 125 uint64_t fillpattern, bus_size_t len, bus_dmaengine_callback_t callback_fn, 126 void *callback_arg, uint32_t flags); 127 128 /* Issues the copy data operation */ 129 struct bus_dmadesc *ioat_copy(bus_dmaengine_t dmaengine, bus_addr_t dst, 130 bus_addr_t src, bus_size_t len, bus_dmaengine_callback_t callback_fn, 131 void *callback_arg, uint32_t flags); 132 133 /* 134 * Issue a copy data operation, with constraints: 135 * - src1, src2, dst1, dst2 are all page-aligned addresses 136 * - The quantity to copy is exactly 2 pages; 137 * - src1 -> dst1, src2 -> dst2 138 * 139 * Why use this instead of normal _copy()? You can copy two non-contiguous 140 * pages (src, dst, or both) with one descriptor. 141 */ 142 struct bus_dmadesc *ioat_copy_8k_aligned(bus_dmaengine_t dmaengine, 143 bus_addr_t dst1, bus_addr_t dst2, bus_addr_t src1, bus_addr_t src2, 144 bus_dmaengine_callback_t callback_fn, void *callback_arg, uint32_t flags); 145 146 /* 147 * Issues a null operation. This issues the operation to the hardware, but the 148 * hardware doesn't do anything with it. 149 */ 150 struct bus_dmadesc *ioat_null(bus_dmaengine_t dmaengine, 151 bus_dmaengine_callback_t callback_fn, void *callback_arg, uint32_t flags); 152 153 154 #endif /* __IOAT_H__ */ 155 156