xref: /freebsd/sys/dev/iicbus/pmic/rockchip/rk8xx_clocks.c (revision 5e3190f700637fcfc1a52daeaa4a031fdd2557c7)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2018-2021 Emmanuel Vadot <manu@FreeBSD.org>
5  * Copyright (c) 2021 Bjoern A. Zeeb <bz@FreeBSD.org>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/systm.h>
33 #include <sys/clock.h>
34 
35 #include <dev/ofw/ofw_bus.h>
36 #include <dev/ofw/ofw_bus_subr.h>
37 
38 #include <dev/extres/clk/clk.h>
39 
40 #include <dev/iicbus/pmic/rockchip/rk8xx.h>
41 
42 /* Clock class and method */
43 struct rk8xx_clk_sc {
44 	device_t		base_dev;
45 };
46 
47 #define	CLK32OUT_REG		0x20
48 #define	CLK32OUT_CLKOUT2_EN	1
49 
50 static int
51 rk8xx_clk_set_gate_1(struct clknode *clk, bool enable)
52 {
53 	struct rk8xx_clk_sc *sc;
54 	uint8_t val;
55 
56 	sc = clknode_get_softc(clk);
57 
58 	rk8xx_read(sc->base_dev, CLK32OUT_REG, &val, sizeof(val));
59 	if (enable)
60 		val |= CLK32OUT_CLKOUT2_EN;
61 	else
62 		val &= ~CLK32OUT_CLKOUT2_EN;
63 	rk8xx_write(sc->base_dev, CLK32OUT_REG, &val, 1);
64 
65 	return (0);
66 }
67 
68 static int
69 rk8xx_clk_recalc(struct clknode *clk, uint64_t *freq)
70 {
71 
72 	*freq = 32768;
73 	return (0);
74 }
75 
76 static clknode_method_t rk8xx_clk_clknode_methods_0[] = {
77 	CLKNODEMETHOD(clknode_recalc_freq,	rk8xx_clk_recalc),
78 	CLKNODEMETHOD_END
79 };
80 
81 DEFINE_CLASS_1(rk8xx_clk_clknode_0, rk8xx_clk_clknode_class_0,
82     rk8xx_clk_clknode_methods_0, sizeof(struct rk8xx_clk_sc),
83     clknode_class);
84 
85 static clknode_method_t rk8xx_clk_clknode_methods_1[] = {
86 	CLKNODEMETHOD(clknode_set_gate,		rk8xx_clk_set_gate_1),
87 	CLKNODEMETHOD_END
88 };
89 
90 DEFINE_CLASS_1(rk8xx_clk_clknode_1, rk8xx_clk_clknode_class_1,
91     rk8xx_clk_clknode_methods_1, sizeof(struct rk8xx_clk_sc),
92     rk8xx_clk_clknode_class_0);
93 
94 int
95 rk8xx_attach_clocks(struct rk8xx_softc *sc)
96 {
97 	struct clkdom *clkdom;
98 	struct clknode_init_def clkidef;
99 	struct clknode *clk;
100 	struct rk8xx_clk_sc *clksc;
101 	const char **clknames;
102 	phandle_t node;
103 	int nclks, rv;
104 
105 	node = ofw_bus_get_node(sc->dev);
106 
107 	/* clock-output-names are optional. Could use them for clkidef.name. */
108 	nclks = ofw_bus_string_list_to_array(node, "clock-output-names",
109 	    &clknames);
110 
111 	clkdom = clkdom_create(sc->dev);
112 
113 	memset(&clkidef, 0, sizeof(clkidef));
114 	clkidef.id = 0;
115 	clkidef.name = (nclks == 2) ? clknames[0] : "clk32kout1";
116 	clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_0, &clkidef);
117 	if (clk == NULL) {
118 		device_printf(sc->dev, "Cannot create '%s'.\n", clkidef.name);
119 		return (ENXIO);
120 	}
121 	clksc = clknode_get_softc(clk);
122 	clksc->base_dev = sc->dev;
123 	clknode_register(clkdom, clk);
124 
125 	memset(&clkidef, 0, sizeof(clkidef));
126 	clkidef.id = 1;
127 	clkidef.name = (nclks == 2) ? clknames[1] : "clk32kout2";
128 	clk = clknode_create(clkdom, &rk8xx_clk_clknode_class_1, &clkidef);
129 	if (clk == NULL) {
130 		device_printf(sc->dev, "Cannot create '%s'.\n", clkidef.name);
131 		return (ENXIO);
132 	}
133 	clksc = clknode_get_softc(clk);
134 	clksc->base_dev = sc->dev;
135 	clknode_register(clkdom, clk);
136 
137 	rv = clkdom_finit(clkdom);
138 	if (rv != 0) {
139 		device_printf(sc->dev, "Cannot finalize clkdom initialization: "
140 		    "%d\n", rv);
141 		return (ENXIO);
142 	}
143 
144 	if (bootverbose)
145 		clkdom_dump(clkdom);
146 
147 	return (0);
148 }
149