xref: /freebsd/sys/dev/iicbus/pmic/rockchip/rk817.c (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2021, 2022 Soren Schmidt <sos@deepcore.dk>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  */
28 
29 #include <sys/param.h>
30 #include <sys/bus.h>
31 #include <sys/clock.h>
32 #include <sys/kernel.h>
33 #include <sys/module.h>
34 #include <sys/mutex.h>
35 #include <sys/rman.h>
36 #include <machine/bus.h>
37 
38 #include <dev/iicbus/iiconf.h>
39 #include <dev/iicbus/iicbus.h>
40 
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
43 
44 #include <dev/iicbus/pmic/rockchip/rk817reg.h>
45 #include <dev/iicbus/pmic/rockchip/rk8xx.h>
46 
47 
48 static struct ofw_compat_data compat_data[] = {
49 	{"rockchip,rk809",	RK809},
50 	{"rockchip,rk817",	RK817},
51 	{NULL,			0}
52 };
53 
54 static struct rk8xx_regdef rk809_regdefs[] = {
55 	{
56 		.id = RK809_DCDC1,
57 		.name = "DCDC_REG1",
58 		.enable_reg = RK817_DCDC_EN,
59 		.enable_mask = 0x11,
60 		.voltage_reg = RK817_DCDC1_ON_VSEL,
61 		.voltage_mask = 0x7f,
62 		.voltage_min = 500000,
63 		.voltage_max = 1487500,
64 		.voltage_min2 = 1500000,
65 		.voltage_max2 = 2400000,
66 		.voltage_step = 12500,
67 		.voltage_step2 = 100000,
68 		.voltage_nstep = 177,
69 	},
70 	{
71 		.id = RK809_DCDC2,
72 		.name = "DCDC_REG2",
73 		.enable_reg = RK817_DCDC_EN,
74 		.enable_mask = 0x22,
75 		.voltage_reg = RK817_DCDC2_ON_VSEL,
76 		.voltage_mask = 0x7f,
77 		.voltage_min = 500000,
78 		.voltage_max = 1487500,
79 		.voltage_min2 = 1500000,
80 		.voltage_max2 = 2400000,
81 		.voltage_step = 12500,
82 		.voltage_step2 = 100000,
83 		.voltage_nstep = 177,
84 	},
85 	{
86 		.id = RK809_DCDC3,
87 		.name = "DCDC_REG3",
88 		.enable_reg = RK817_DCDC_EN,
89 		.enable_mask = 0x44,
90 		.voltage_reg = RK817_DCDC3_ON_VSEL,
91 		.voltage_mask = 0x7f,
92 		.voltage_min = 500000,
93 		.voltage_max = 1487500,
94 		.voltage_min2 = 1500000,
95 		.voltage_max2 = 2400000,
96 		.voltage_step = 12500,
97 		.voltage_step2 = 100000,
98 		.voltage_nstep = 177,
99 	},
100 	{
101 		.id = RK809_DCDC4,
102 		.name = "DCDC_REG4",
103 		.enable_reg = RK817_DCDC_EN,
104 		.enable_mask = 0x88,
105 		.voltage_reg = RK817_DCDC4_ON_VSEL,
106 		.voltage_mask = 0x7f,
107 		.voltage_min = 500000,
108 		.voltage_max = 1487500,
109 		.voltage_min2 = 1500000,
110 		.voltage_max2 = 3400000,
111 		.voltage_step = 12500,
112 		.voltage_step2 = 100000,
113 		.voltage_nstep = 195,
114 	},
115 	{
116 		.id = RK809_DCDC5,
117 		.name = "DCDC_REG5",
118 		.enable_reg = RK817_LDO_EN3,
119 		.enable_mask = 0x22,
120 		.voltage_reg = RK817_BOOST_ON_VSEL,
121 		.voltage_mask = 0x07,
122 		.voltage_min = 1600000,	/* cheat is 1.5V */
123 		.voltage_max = 3400000,
124 		.voltage_min2 = 3500000,
125 		.voltage_max2 = 3600000,
126 		.voltage_step = 200000,
127 		.voltage_step2 = 300000,
128 		.voltage_nstep = 8,
129 	},
130 	{
131 		.id = RK809_LDO1,
132 		.name = "LDO_REG1",
133 		.enable_reg = RK817_LDO_EN1,
134 		.enable_mask = 0x11,
135 		.voltage_reg = RK817_LDO1_ON_VSEL,
136 		.voltage_mask = 0x7f,
137 		.voltage_min = 600000,
138 		.voltage_max = 3400000,
139 		.voltage_step = 25000,
140 		.voltage_nstep = 112,
141 	},
142 	{
143 		.id = RK809_LDO2,
144 		.name = "LDO_REG2",
145 		.enable_reg = RK817_LDO_EN1,
146 		.enable_mask = 0x22,
147 		.voltage_reg = RK817_LDO2_ON_VSEL,
148 		.voltage_mask = 0x7f,
149 		.voltage_min = 600000,
150 		.voltage_max = 3400000,
151 		.voltage_step = 25000,
152 		.voltage_nstep = 112,
153 	},
154 	{
155 		.id = RK809_LDO3,
156 		.name = "LDO_REG3",
157 		.enable_reg = RK817_LDO_EN1,
158 		.enable_mask = 0x44,
159 		.voltage_reg = RK817_LDO3_ON_VSEL,
160 		.voltage_mask = 0x7f,
161 		.voltage_min = 600000,
162 		.voltage_max = 3400000,
163 		.voltage_step = 25000,
164 		.voltage_nstep = 112,
165 	},
166 	{
167 		.id = RK809_LDO4,
168 		.name = "LDO_REG4",
169 		.enable_reg = RK817_LDO_EN1,
170 		.enable_mask = 0x88,
171 		.voltage_reg = RK817_LDO4_ON_VSEL,
172 		.voltage_mask = 0x7f,
173 		.voltage_min = 600000,
174 		.voltage_max = 3400000,
175 		.voltage_step = 25000,
176 		.voltage_nstep = 112,
177 	},
178 	{
179 		.id = RK809_LDO5,
180 		.name = "LDO_REG5",
181 		.enable_reg = RK817_LDO_EN2,
182 		.enable_mask = 0x11,
183 		.voltage_reg = RK817_LDO5_ON_VSEL,
184 		.voltage_mask = 0x7f,
185 		.voltage_min = 600000,
186 		.voltage_max = 3400000,
187 		.voltage_step = 25000,
188 		.voltage_nstep = 112,
189 	},
190 	{
191 		.id = RK809_LDO6,
192 		.name = "LDO_REG6",
193 		.enable_reg = RK817_LDO_EN2,
194 		.enable_mask = 0x22,
195 		.voltage_reg = RK817_LDO6_ON_VSEL,
196 		.voltage_mask = 0x7f,
197 		.voltage_min = 600000,
198 		.voltage_max = 3400000,
199 		.voltage_step = 25000,
200 		.voltage_nstep = 112,
201 	},
202 	{
203 		.id = RK809_LDO7,
204 		.name = "LDO_REG7",
205 		.enable_reg = RK817_LDO_EN2,
206 		.enable_mask = 0x44,
207 		.voltage_reg = RK817_LDO7_ON_VSEL,
208 		.voltage_mask = 0x7f,
209 		.voltage_min = 600000,
210 		.voltage_max = 3400000,
211 		.voltage_step = 25000,
212 		.voltage_nstep = 112,
213 	},
214 	{
215 		.id = RK809_LDO8,
216 		.name = "LDO_REG8",
217 		.enable_reg = RK817_LDO_EN2,
218 		.enable_mask = 0x88,
219 		.voltage_reg = RK817_LDO8_ON_VSEL,
220 		.voltage_mask = 0x7f,
221 		.voltage_min = 600000,
222 		.voltage_max = 3400000,
223 		.voltage_step = 25000,
224 		.voltage_nstep = 112,
225 	},
226 	{
227 		.id = RK809_LDO9,
228 		.name = "LDO_REG9",
229 		.enable_reg = RK817_LDO_EN3,
230 		.enable_mask = 0x11,
231 		.voltage_reg = RK817_LDO9_ON_VSEL,
232 		.voltage_mask = 0x7f,
233 		.voltage_min = 600000,
234 		.voltage_max = 3400000,
235 		.voltage_step = 25000,
236 		.voltage_nstep = 112,
237 	},
238 	{
239 		.id = RK809_SWITCH1,
240 		.name = "SWITCH_REG1",
241 		.enable_reg = RK817_LDO_EN3,
242 		.enable_mask = 0x44,
243 		.voltage_min = 3300000,
244 		.voltage_max = 3300000,
245 		.voltage_nstep = 0,
246 	},
247 	{
248 		.id = RK809_SWITCH2,
249 		.name = "SWITCH_REG2",
250 		.enable_reg = RK817_LDO_EN3,
251 		.enable_mask = 0x88,
252 		.voltage_min = 3300000,
253 		.voltage_max = 3300000,
254 		.voltage_nstep = 0,
255 	},
256 };
257 
258 static struct rk8xx_regdef rk817_regdefs[] = {
259 	{
260 		.id = RK817_DCDC1,
261 		.name = "DCDC_REG1",
262 		.enable_reg = RK817_DCDC_EN,
263 		.enable_mask = 0x11,
264 		.voltage_reg = RK817_DCDC1_ON_VSEL,
265 		.voltage_mask = 0x7f,
266 		.voltage_min = 500000,
267 		.voltage_max = 1487500,
268 		.voltage_min2 = 1500000,
269 		.voltage_max2 = 2400000,
270 		.voltage_step = 12500,
271 		.voltage_step2 = 100000,
272 		.voltage_nstep = 177,
273 	},
274 	{
275 		.id = RK817_DCDC2,
276 		.name = "DCDC_REG2",
277 		.enable_reg = RK817_DCDC_EN,
278 		.enable_mask = 0x22,
279 		.voltage_reg = RK817_DCDC2_ON_VSEL,
280 		.voltage_mask = 0x7f,
281 		.voltage_min = 500000,
282 		.voltage_max = 1487500,
283 		.voltage_min2 = 1500000,
284 		.voltage_max2 = 2400000,
285 		.voltage_step = 12500,
286 		.voltage_step2 = 100000,
287 		.voltage_nstep = 177,
288 	},
289 	{
290 		.id = RK817_DCDC3,
291 		.name = "DCDC_REG3",
292 		.enable_reg = RK817_DCDC_EN,
293 		.enable_mask = 0x44,
294 		.voltage_reg = RK817_DCDC3_ON_VSEL,
295 		.voltage_mask = 0x7f,
296 		.voltage_min = 500000,
297 		.voltage_max = 1487500,
298 		.voltage_min2 = 1500000,
299 		.voltage_max2 = 2400000,
300 		.voltage_step = 12500,
301 		.voltage_step2 = 100000,
302 		.voltage_nstep = 177,
303 	},
304 	{
305 		.id = RK817_DCDC4,
306 		.name = "DCDC_REG4",
307 		.enable_reg = RK817_DCDC_EN,
308 		.enable_mask = 0x88,
309 		.voltage_reg = RK817_DCDC4_ON_VSEL,
310 		.voltage_mask = 0x7f,
311 		.voltage_min = 500000,
312 		.voltage_max = 1487500,
313 		.voltage_min2 = 1500000,
314 		.voltage_max2 = 3400000,
315 		.voltage_step = 12500,
316 		.voltage_step2 = 100000,
317 		.voltage_nstep = 195,
318 	},
319 	{
320 		.id = RK817_LDO1,
321 		.name = "LDO_REG1",
322 		.enable_reg = RK817_LDO_EN1,
323 		.enable_mask = 0x11,
324 		.voltage_reg = RK817_LDO1_ON_VSEL,
325 		.voltage_mask = 0x7f,
326 		.voltage_min = 600000,
327 		.voltage_max = 3400000,
328 		.voltage_step = 25000,
329 		.voltage_nstep = 112,
330 	},
331 	{
332 		.id = RK817_LDO2,
333 		.name = "LDO_REG2",
334 		.enable_reg = RK817_LDO_EN1,
335 		.enable_mask = 0x22,
336 		.voltage_reg = RK817_LDO2_ON_VSEL,
337 		.voltage_mask = 0x7f,
338 		.voltage_min = 600000,
339 		.voltage_max = 3400000,
340 		.voltage_step = 25000,
341 		.voltage_nstep = 112,
342 	},
343 	{
344 		.id = RK817_LDO3,
345 		.name = "LDO_REG3",
346 		.enable_reg = RK817_LDO_EN1,
347 		.enable_mask = 0x44,
348 		.voltage_reg = RK817_LDO3_ON_VSEL,
349 		.voltage_mask = 0x7f,
350 		.voltage_min = 600000,
351 		.voltage_max = 3400000,
352 		.voltage_step = 25000,
353 		.voltage_nstep = 112,
354 	},
355 	{
356 		.id = RK817_LDO4,
357 		.name = "LDO_REG4",
358 		.enable_reg = RK817_LDO_EN1,
359 		.enable_mask = 0x88,
360 		.voltage_reg = RK817_LDO4_ON_VSEL,
361 		.voltage_mask = 0x7f,
362 		.voltage_min = 600000,
363 		.voltage_max = 3400000,
364 		.voltage_step = 25000,
365 		.voltage_nstep = 112,
366 	},
367 	{
368 		.id = RK817_LDO5,
369 		.name = "LDO_REG5",
370 		.enable_reg = RK817_LDO_EN2,
371 		.enable_mask = 0x11,
372 		.voltage_reg = RK817_LDO5_ON_VSEL,
373 		.voltage_mask = 0x7f,
374 		.voltage_min = 600000,
375 		.voltage_max = 3400000,
376 		.voltage_step = 25000,
377 		.voltage_nstep = 112,
378 	},
379 	{
380 		.id = RK817_LDO6,
381 		.name = "LDO_REG6",
382 		.enable_reg = RK817_LDO_EN2,
383 		.enable_mask = 0x22,
384 		.voltage_reg = RK817_LDO6_ON_VSEL,
385 		.voltage_mask = 0x7f,
386 		.voltage_min = 600000,
387 		.voltage_max = 3400000,
388 		.voltage_step = 25000,
389 		.voltage_nstep = 112,
390 	},
391 	{
392 		.id = RK817_LDO7,
393 		.name = "LDO_REG7",
394 		.enable_reg = RK817_LDO_EN2,
395 		.enable_mask = 0x44,
396 		.voltage_reg = RK817_LDO7_ON_VSEL,
397 		.voltage_mask = 0x7f,
398 		.voltage_min = 600000,
399 		.voltage_max = 3400000,
400 		.voltage_step = 25000,
401 		.voltage_nstep = 112,
402 	},
403 	{
404 		.id = RK817_LDO8,
405 		.name = "LDO_REG8",
406 		.enable_reg = RK817_LDO_EN2,
407 		.enable_mask = 0x88,
408 		.voltage_reg = RK817_LDO8_ON_VSEL,
409 		.voltage_mask = 0x7f,
410 		.voltage_min = 600000,
411 		.voltage_max = 3400000,
412 		.voltage_step = 25000,
413 		.voltage_nstep = 112,
414 	},
415 	{
416 		.id = RK817_LDO9,
417 		.name = "LDO_REG9",
418 		.enable_reg = RK817_LDO_EN3,
419 		.enable_mask = 0x11,
420 		.voltage_reg = RK817_LDO9_ON_VSEL,
421 		.voltage_mask = 0x7f,
422 		.voltage_min = 600000,
423 		.voltage_max = 3400000,
424 		.voltage_step = 25000,
425 		.voltage_nstep = 112,
426 	},
427 	{
428 		.id = RK817_BOOST,
429 		.name = "BOOST",
430 		.enable_reg = RK817_LDO_EN3,
431 		.enable_mask = 0x22,
432 		.voltage_reg = RK817_BOOST_ON_VSEL,
433 		.voltage_mask = 0x07,
434 		.voltage_min = 4700000,
435 		.voltage_max = 5400000,
436 		.voltage_step = 100000,
437 		.voltage_nstep = 8,
438 	},
439 	{
440 		.id = RK817_OTG_SWITCH,
441 		.name = "OTG_SWITCH",
442 		.enable_reg = RK817_LDO_EN3,
443 		.enable_mask = 0x44,
444 		.voltage_nstep = 0,
445 	},
446 };
447 
448 static int
449 rk817_probe(device_t dev)
450 {
451 	if (!ofw_bus_status_okay(dev))
452 		return (ENXIO);
453 
454 	switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) {
455 	case RK809:
456 		device_set_desc(dev, "RockChip RK809 PMIC");
457 		break;
458 	case RK817:
459 		device_set_desc(dev, "RockChip RK817 PMIC");
460 		break;
461 	default:
462 		return (ENXIO);
463 	}
464 
465 	return (BUS_PROBE_DEFAULT);
466 }
467 
468 static int
469 rk817_attach(device_t dev)
470 {
471 	struct rk8xx_softc *sc;
472 
473 	sc = device_get_softc(dev);
474 	sc->dev = dev;
475 
476 	sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
477 	switch (sc->type) {
478 	case RK809:
479 		sc->regdefs = rk809_regdefs;
480 		sc->nregs = nitems(rk809_regdefs);
481 		break;
482 	case RK817:
483 		sc->regdefs = rk817_regdefs;
484 		sc->nregs = nitems(rk817_regdefs);
485 		break;
486 	default:
487 		device_printf(dev, "Unknown type %d\n", sc->type);
488 		return (ENXIO);
489 	}
490 	sc->rtc_regs.secs = RK817_RTC_SECONDS;
491 	sc->rtc_regs.secs_mask = RK817_RTC_SECONDS_MASK;
492 	sc->rtc_regs.minutes = RK817_RTC_MINUTES;
493 	sc->rtc_regs.minutes_mask = RK817_RTC_MINUTES_MASK;
494 	sc->rtc_regs.hours = RK817_RTC_HOURS;
495 	sc->rtc_regs.hours_mask = RK817_RTC_HOURS_MASK;
496 	sc->rtc_regs.days = RK817_RTC_DAYS;
497 	sc->rtc_regs.days_mask = RK817_RTC_DAYS_MASK;
498 	sc->rtc_regs.months = RK817_RTC_MONTHS;
499 	sc->rtc_regs.months_mask = RK817_RTC_MONTHS_MASK;
500 	sc->rtc_regs.years = RK817_RTC_YEARS;
501 	sc->rtc_regs.weeks = RK817_RTC_WEEKS_MASK;
502 	sc->rtc_regs.ctrl = RK817_RTC_CTRL;
503 	sc->rtc_regs.ctrl_stop_mask = RK817_RTC_CTRL_STOP;
504 	sc->rtc_regs.ctrl_ampm_mask = RK817_RTC_AMPM_MODE;
505 	sc->rtc_regs.ctrl_gettime_mask = RK817_RTC_GET_TIME;
506 	sc->rtc_regs.ctrl_readsel_mask = RK817_RTC_READSEL;
507 	sc->dev_ctrl.dev_ctrl_reg = RK817_SYS_CFG3;
508 	sc->dev_ctrl.pwr_off_mask = RK817_SYS_CFG3_OFF;
509 	sc->dev_ctrl.pwr_rst_mask = RK817_SYS_CFG3_RST;
510 
511 	return (rk8xx_attach(sc));
512 }
513 
514 static device_method_t rk817_methods[] = {
515 	DEVMETHOD(device_probe,		rk817_probe),
516 	DEVMETHOD(device_attach,	rk817_attach),
517 
518 	DEVMETHOD_END
519 };
520 
521 DEFINE_CLASS_1(rk817_pmu, rk817_driver, rk817_methods,
522     sizeof(struct rk8xx_softc), rk8xx_driver);
523 
524 EARLY_DRIVER_MODULE(rk817_pmu, iicbus, rk817_driver, 0, 0,
525     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
526 EARLY_DRIVER_MODULE(iicbus, rk817_pmu, iicbus_driver, 0, 0,
527     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
528 MODULE_DEPEND(rk817_pmu, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER);
529 MODULE_VERSION(rk817_pmu, 1);
530