1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2021, 2022 Soren Schmidt <sos@deepcore.dk> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 #include <sys/cdefs.h> 30 #include <sys/param.h> 31 #include <sys/bus.h> 32 #include <sys/clock.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/mutex.h> 36 #include <sys/rman.h> 37 #include <machine/bus.h> 38 39 #include <dev/iicbus/iiconf.h> 40 #include <dev/iicbus/iicbus.h> 41 42 #include <dev/ofw/ofw_bus.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 45 #include <dev/iicbus/pmic/rockchip/rk817reg.h> 46 #include <dev/iicbus/pmic/rockchip/rk8xx.h> 47 48 49 static struct ofw_compat_data compat_data[] = { 50 {"rockchip,rk809", RK809}, 51 {"rockchip,rk817", RK817}, 52 {NULL, 0} 53 }; 54 55 static struct rk8xx_regdef rk809_regdefs[] = { 56 { 57 .id = RK809_DCDC1, 58 .name = "DCDC_REG1", 59 .enable_reg = RK817_DCDC_EN, 60 .enable_mask = 0x11, 61 .voltage_reg = RK817_DCDC1_ON_VSEL, 62 .voltage_mask = 0x7f, 63 .voltage_min = 500000, 64 .voltage_max = 1487500, 65 .voltage_min2 = 1500000, 66 .voltage_max2 = 2400000, 67 .voltage_step = 12500, 68 .voltage_step2 = 100000, 69 .voltage_nstep = 177, 70 }, 71 { 72 .id = RK809_DCDC2, 73 .name = "DCDC_REG2", 74 .enable_reg = RK817_DCDC_EN, 75 .enable_mask = 0x22, 76 .voltage_reg = RK817_DCDC2_ON_VSEL, 77 .voltage_mask = 0x7f, 78 .voltage_min = 500000, 79 .voltage_max = 1487500, 80 .voltage_min2 = 1500000, 81 .voltage_max2 = 2400000, 82 .voltage_step = 12500, 83 .voltage_step2 = 100000, 84 .voltage_nstep = 177, 85 }, 86 { 87 .id = RK809_DCDC3, 88 .name = "DCDC_REG3", 89 .enable_reg = RK817_DCDC_EN, 90 .enable_mask = 0x44, 91 .voltage_reg = RK817_DCDC3_ON_VSEL, 92 .voltage_mask = 0x7f, 93 .voltage_min = 500000, 94 .voltage_max = 1487500, 95 .voltage_min2 = 1500000, 96 .voltage_max2 = 2400000, 97 .voltage_step = 12500, 98 .voltage_step2 = 100000, 99 .voltage_nstep = 177, 100 }, 101 { 102 .id = RK809_DCDC4, 103 .name = "DCDC_REG4", 104 .enable_reg = RK817_DCDC_EN, 105 .enable_mask = 0x88, 106 .voltage_reg = RK817_DCDC4_ON_VSEL, 107 .voltage_mask = 0x7f, 108 .voltage_min = 500000, 109 .voltage_max = 1487500, 110 .voltage_min2 = 1500000, 111 .voltage_max2 = 3400000, 112 .voltage_step = 12500, 113 .voltage_step2 = 100000, 114 .voltage_nstep = 195, 115 }, 116 { 117 .id = RK809_DCDC5, 118 .name = "DCDC_REG5", 119 .enable_reg = RK817_LDO_EN3, 120 .enable_mask = 0x22, 121 .voltage_reg = RK817_BOOST_ON_VSEL, 122 .voltage_mask = 0x07, 123 .voltage_min = 1600000, /* cheat is 1.5V */ 124 .voltage_max = 3400000, 125 .voltage_min2 = 3500000, 126 .voltage_max2 = 3600000, 127 .voltage_step = 200000, 128 .voltage_step2 = 300000, 129 .voltage_nstep = 8, 130 }, 131 { 132 .id = RK809_LDO1, 133 .name = "LDO_REG1", 134 .enable_reg = RK817_LDO_EN1, 135 .enable_mask = 0x11, 136 .voltage_reg = RK817_LDO1_ON_VSEL, 137 .voltage_mask = 0x7f, 138 .voltage_min = 600000, 139 .voltage_max = 3400000, 140 .voltage_step = 25000, 141 .voltage_nstep = 112, 142 }, 143 { 144 .id = RK809_LDO2, 145 .name = "LDO_REG2", 146 .enable_reg = RK817_LDO_EN1, 147 .enable_mask = 0x22, 148 .voltage_reg = RK817_LDO2_ON_VSEL, 149 .voltage_mask = 0x7f, 150 .voltage_min = 600000, 151 .voltage_max = 3400000, 152 .voltage_step = 25000, 153 .voltage_nstep = 112, 154 }, 155 { 156 .id = RK809_LDO3, 157 .name = "LDO_REG3", 158 .enable_reg = RK817_LDO_EN1, 159 .enable_mask = 0x44, 160 .voltage_reg = RK817_LDO3_ON_VSEL, 161 .voltage_mask = 0x7f, 162 .voltage_min = 600000, 163 .voltage_max = 3400000, 164 .voltage_step = 25000, 165 .voltage_nstep = 112, 166 }, 167 { 168 .id = RK809_LDO4, 169 .name = "LDO_REG4", 170 .enable_reg = RK817_LDO_EN1, 171 .enable_mask = 0x88, 172 .voltage_reg = RK817_LDO4_ON_VSEL, 173 .voltage_mask = 0x7f, 174 .voltage_min = 600000, 175 .voltage_max = 3400000, 176 .voltage_step = 25000, 177 .voltage_nstep = 112, 178 }, 179 { 180 .id = RK809_LDO5, 181 .name = "LDO_REG5", 182 .enable_reg = RK817_LDO_EN2, 183 .enable_mask = 0x11, 184 .voltage_reg = RK817_LDO5_ON_VSEL, 185 .voltage_mask = 0x7f, 186 .voltage_min = 600000, 187 .voltage_max = 3400000, 188 .voltage_step = 25000, 189 .voltage_nstep = 112, 190 }, 191 { 192 .id = RK809_LDO6, 193 .name = "LDO_REG6", 194 .enable_reg = RK817_LDO_EN2, 195 .enable_mask = 0x22, 196 .voltage_reg = RK817_LDO6_ON_VSEL, 197 .voltage_mask = 0x7f, 198 .voltage_min = 600000, 199 .voltage_max = 3400000, 200 .voltage_step = 25000, 201 .voltage_nstep = 112, 202 }, 203 { 204 .id = RK809_LDO7, 205 .name = "LDO_REG7", 206 .enable_reg = RK817_LDO_EN2, 207 .enable_mask = 0x44, 208 .voltage_reg = RK817_LDO7_ON_VSEL, 209 .voltage_mask = 0x7f, 210 .voltage_min = 600000, 211 .voltage_max = 3400000, 212 .voltage_step = 25000, 213 .voltage_nstep = 112, 214 }, 215 { 216 .id = RK809_LDO8, 217 .name = "LDO_REG8", 218 .enable_reg = RK817_LDO_EN2, 219 .enable_mask = 0x88, 220 .voltage_reg = RK817_LDO8_ON_VSEL, 221 .voltage_mask = 0x7f, 222 .voltage_min = 600000, 223 .voltage_max = 3400000, 224 .voltage_step = 25000, 225 .voltage_nstep = 112, 226 }, 227 { 228 .id = RK809_LDO9, 229 .name = "LDO_REG9", 230 .enable_reg = RK817_LDO_EN3, 231 .enable_mask = 0x11, 232 .voltage_reg = RK817_LDO9_ON_VSEL, 233 .voltage_mask = 0x7f, 234 .voltage_min = 600000, 235 .voltage_max = 3400000, 236 .voltage_step = 25000, 237 .voltage_nstep = 112, 238 }, 239 { 240 .id = RK809_SWITCH1, 241 .name = "SWITCH_REG1", 242 .enable_reg = RK817_LDO_EN3, 243 .enable_mask = 0x44, 244 .voltage_min = 3300000, 245 .voltage_max = 3300000, 246 .voltage_nstep = 0, 247 }, 248 { 249 .id = RK809_SWITCH2, 250 .name = "SWITCH_REG2", 251 .enable_reg = RK817_LDO_EN3, 252 .enable_mask = 0x88, 253 .voltage_min = 3300000, 254 .voltage_max = 3300000, 255 .voltage_nstep = 0, 256 }, 257 }; 258 259 static struct rk8xx_regdef rk817_regdefs[] = { 260 { 261 .id = RK817_DCDC1, 262 .name = "DCDC_REG1", 263 .enable_reg = RK817_DCDC_EN, 264 .enable_mask = 0x11, 265 .voltage_reg = RK817_DCDC1_ON_VSEL, 266 .voltage_mask = 0x7f, 267 .voltage_min = 500000, 268 .voltage_max = 1487500, 269 .voltage_min2 = 1500000, 270 .voltage_max2 = 2400000, 271 .voltage_step = 12500, 272 .voltage_step2 = 100000, 273 .voltage_nstep = 177, 274 }, 275 { 276 .id = RK817_DCDC2, 277 .name = "DCDC_REG2", 278 .enable_reg = RK817_DCDC_EN, 279 .enable_mask = 0x22, 280 .voltage_reg = RK817_DCDC2_ON_VSEL, 281 .voltage_mask = 0x7f, 282 .voltage_min = 500000, 283 .voltage_max = 1487500, 284 .voltage_min2 = 1500000, 285 .voltage_max2 = 2400000, 286 .voltage_step = 12500, 287 .voltage_step2 = 100000, 288 .voltage_nstep = 177, 289 }, 290 { 291 .id = RK817_DCDC3, 292 .name = "DCDC_REG3", 293 .enable_reg = RK817_DCDC_EN, 294 .enable_mask = 0x44, 295 .voltage_reg = RK817_DCDC3_ON_VSEL, 296 .voltage_mask = 0x7f, 297 .voltage_min = 500000, 298 .voltage_max = 1487500, 299 .voltage_min2 = 1500000, 300 .voltage_max2 = 2400000, 301 .voltage_step = 12500, 302 .voltage_step2 = 100000, 303 .voltage_nstep = 177, 304 }, 305 { 306 .id = RK817_DCDC4, 307 .name = "DCDC_REG4", 308 .enable_reg = RK817_DCDC_EN, 309 .enable_mask = 0x88, 310 .voltage_reg = RK817_DCDC4_ON_VSEL, 311 .voltage_mask = 0x7f, 312 .voltage_min = 500000, 313 .voltage_max = 1487500, 314 .voltage_min2 = 1500000, 315 .voltage_max2 = 3400000, 316 .voltage_step = 12500, 317 .voltage_step2 = 100000, 318 .voltage_nstep = 195, 319 }, 320 { 321 .id = RK817_LDO1, 322 .name = "LDO_REG1", 323 .enable_reg = RK817_LDO_EN1, 324 .enable_mask = 0x11, 325 .voltage_reg = RK817_LDO1_ON_VSEL, 326 .voltage_mask = 0x7f, 327 .voltage_min = 600000, 328 .voltage_max = 3400000, 329 .voltage_step = 25000, 330 .voltage_nstep = 112, 331 }, 332 { 333 .id = RK817_LDO2, 334 .name = "LDO_REG2", 335 .enable_reg = RK817_LDO_EN1, 336 .enable_mask = 0x22, 337 .voltage_reg = RK817_LDO2_ON_VSEL, 338 .voltage_mask = 0x7f, 339 .voltage_min = 600000, 340 .voltage_max = 3400000, 341 .voltage_step = 25000, 342 .voltage_nstep = 112, 343 }, 344 { 345 .id = RK817_LDO3, 346 .name = "LDO_REG3", 347 .enable_reg = RK817_LDO_EN1, 348 .enable_mask = 0x44, 349 .voltage_reg = RK817_LDO3_ON_VSEL, 350 .voltage_mask = 0x7f, 351 .voltage_min = 600000, 352 .voltage_max = 3400000, 353 .voltage_step = 25000, 354 .voltage_nstep = 112, 355 }, 356 { 357 .id = RK817_LDO4, 358 .name = "LDO_REG4", 359 .enable_reg = RK817_LDO_EN1, 360 .enable_mask = 0x88, 361 .voltage_reg = RK817_LDO4_ON_VSEL, 362 .voltage_mask = 0x7f, 363 .voltage_min = 600000, 364 .voltage_max = 3400000, 365 .voltage_step = 25000, 366 .voltage_nstep = 112, 367 }, 368 { 369 .id = RK817_LDO5, 370 .name = "LDO_REG5", 371 .enable_reg = RK817_LDO_EN2, 372 .enable_mask = 0x11, 373 .voltage_reg = RK817_LDO5_ON_VSEL, 374 .voltage_mask = 0x7f, 375 .voltage_min = 600000, 376 .voltage_max = 3400000, 377 .voltage_step = 25000, 378 .voltage_nstep = 112, 379 }, 380 { 381 .id = RK817_LDO6, 382 .name = "LDO_REG6", 383 .enable_reg = RK817_LDO_EN2, 384 .enable_mask = 0x22, 385 .voltage_reg = RK817_LDO6_ON_VSEL, 386 .voltage_mask = 0x7f, 387 .voltage_min = 600000, 388 .voltage_max = 3400000, 389 .voltage_step = 25000, 390 .voltage_nstep = 112, 391 }, 392 { 393 .id = RK817_LDO7, 394 .name = "LDO_REG7", 395 .enable_reg = RK817_LDO_EN2, 396 .enable_mask = 0x44, 397 .voltage_reg = RK817_LDO7_ON_VSEL, 398 .voltage_mask = 0x7f, 399 .voltage_min = 600000, 400 .voltage_max = 3400000, 401 .voltage_step = 25000, 402 .voltage_nstep = 112, 403 }, 404 { 405 .id = RK817_LDO8, 406 .name = "LDO_REG8", 407 .enable_reg = RK817_LDO_EN2, 408 .enable_mask = 0x88, 409 .voltage_reg = RK817_LDO8_ON_VSEL, 410 .voltage_mask = 0x7f, 411 .voltage_min = 600000, 412 .voltage_max = 3400000, 413 .voltage_step = 25000, 414 .voltage_nstep = 112, 415 }, 416 { 417 .id = RK817_LDO9, 418 .name = "LDO_REG9", 419 .enable_reg = RK817_LDO_EN3, 420 .enable_mask = 0x11, 421 .voltage_reg = RK817_LDO9_ON_VSEL, 422 .voltage_mask = 0x7f, 423 .voltage_min = 600000, 424 .voltage_max = 3400000, 425 .voltage_step = 25000, 426 .voltage_nstep = 112, 427 }, 428 { 429 .id = RK817_BOOST, 430 .name = "BOOST", 431 .enable_reg = RK817_LDO_EN3, 432 .enable_mask = 0x22, 433 .voltage_reg = RK817_BOOST_ON_VSEL, 434 .voltage_mask = 0x07, 435 .voltage_min = 4700000, 436 .voltage_max = 5400000, 437 .voltage_step = 100000, 438 .voltage_nstep = 8, 439 }, 440 { 441 .id = RK817_OTG_SWITCH, 442 .name = "OTG_SWITCH", 443 .enable_reg = RK817_LDO_EN3, 444 .enable_mask = 0x44, 445 .voltage_nstep = 0, 446 }, 447 }; 448 449 static int 450 rk817_probe(device_t dev) 451 { 452 if (!ofw_bus_status_okay(dev)) 453 return (ENXIO); 454 455 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) { 456 case RK809: 457 device_set_desc(dev, "RockChip RK809 PMIC"); 458 break; 459 case RK817: 460 device_set_desc(dev, "RockChip RK817 PMIC"); 461 break; 462 default: 463 return (ENXIO); 464 } 465 466 return (BUS_PROBE_DEFAULT); 467 } 468 469 static int 470 rk817_attach(device_t dev) 471 { 472 struct rk8xx_softc *sc; 473 474 sc = device_get_softc(dev); 475 sc->dev = dev; 476 477 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 478 switch (sc->type) { 479 case RK809: 480 sc->regdefs = rk809_regdefs; 481 sc->nregs = nitems(rk809_regdefs); 482 break; 483 case RK817: 484 sc->regdefs = rk817_regdefs; 485 sc->nregs = nitems(rk817_regdefs); 486 break; 487 default: 488 device_printf(dev, "Unknown type %d\n", sc->type); 489 return (ENXIO); 490 } 491 sc->rtc_regs.secs = RK817_RTC_SECONDS; 492 sc->rtc_regs.secs_mask = RK817_RTC_SECONDS_MASK; 493 sc->rtc_regs.minutes = RK817_RTC_MINUTES; 494 sc->rtc_regs.minutes_mask = RK817_RTC_MINUTES_MASK; 495 sc->rtc_regs.hours = RK817_RTC_HOURS; 496 sc->rtc_regs.hours_mask = RK817_RTC_HOURS_MASK; 497 sc->rtc_regs.days = RK817_RTC_DAYS; 498 sc->rtc_regs.days_mask = RK817_RTC_DAYS_MASK; 499 sc->rtc_regs.months = RK817_RTC_MONTHS; 500 sc->rtc_regs.months_mask = RK817_RTC_MONTHS_MASK; 501 sc->rtc_regs.years = RK817_RTC_YEARS; 502 sc->rtc_regs.weeks = RK817_RTC_WEEKS_MASK; 503 sc->rtc_regs.ctrl = RK817_RTC_CTRL; 504 sc->rtc_regs.ctrl_stop_mask = RK817_RTC_CTRL_STOP; 505 sc->rtc_regs.ctrl_ampm_mask = RK817_RTC_AMPM_MODE; 506 sc->rtc_regs.ctrl_gettime_mask = RK817_RTC_GET_TIME; 507 sc->rtc_regs.ctrl_readsel_mask = RK817_RTC_READSEL; 508 sc->dev_ctrl.dev_ctrl_reg = RK817_SYS_CFG3; 509 sc->dev_ctrl.pwr_off_mask = RK817_SYS_CFG3_OFF; 510 sc->dev_ctrl.pwr_rst_mask = RK817_SYS_CFG3_RST; 511 512 return (rk8xx_attach(sc)); 513 } 514 515 static device_method_t rk817_methods[] = { 516 DEVMETHOD(device_probe, rk817_probe), 517 DEVMETHOD(device_attach, rk817_attach), 518 519 DEVMETHOD_END 520 }; 521 522 DEFINE_CLASS_1(rk817_pmu, rk817_driver, rk817_methods, 523 sizeof(struct rk8xx_softc), rk8xx_driver); 524 525 EARLY_DRIVER_MODULE(rk817_pmu, iicbus, rk817_driver, 0, 0, 526 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); 527 EARLY_DRIVER_MODULE(iicbus, rk817_pmu, iicbus_driver, 0, 0, 528 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); 529 MODULE_DEPEND(rk817_pmu, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER); 530 MODULE_VERSION(rk817_pmu, 1); 531