1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 1998, 2001 Nicolas Souchu 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 #ifndef __IICONF_H 31 #define __IICONF_H 32 33 #include <sys/queue.h> 34 #include <dev/iicbus/iic.h> 35 36 37 #define IICPRI (PZERO+8) /* XXX sleep/wakeup queue priority */ 38 39 #define LSB 0x1 40 41 /* 42 * Options affecting iicbus_request_bus() 43 */ 44 #define IIC_DONTWAIT 0 45 #define IIC_NOINTR 0 46 #define IIC_WAIT 0x1 47 #define IIC_INTR 0x2 48 #define IIC_INTRWAIT (IIC_INTR | IIC_WAIT) 49 #define IIC_RECURSIVE 0x4 50 51 /* 52 * i2c modes 53 */ 54 #define IIC_MASTER 0x1 55 #define IIC_SLAVE 0x2 56 #define IIC_POLLED 0x4 57 58 /* 59 * i2c speed 60 */ 61 #define IIC_UNKNOWN 0x0 62 #define IIC_SLOW 0x1 63 #define IIC_FAST 0x2 64 #define IIC_FASTEST 0x3 65 66 #define IIC_LAST_READ 0x1 67 68 /* 69 * callback index 70 */ 71 #define IIC_REQUEST_BUS 0x1 72 #define IIC_RELEASE_BUS 0x2 73 74 /* 75 * interrupt events 76 */ 77 #define INTR_GENERAL 0x1 /* general call received */ 78 #define INTR_START 0x2 /* the I2C interface is addressed */ 79 #define INTR_STOP 0x3 /* stop condition received */ 80 #define INTR_RECEIVE 0x4 /* character received */ 81 #define INTR_TRANSMIT 0x5 /* character to transmit */ 82 #define INTR_ERROR 0x6 /* error */ 83 #define INTR_NOACK 0x7 /* no ack from master receiver */ 84 85 /* 86 * adapter layer errors 87 */ 88 #define IIC_NOERR 0x0 /* no error occurred */ 89 #define IIC_EBUSERR 0x1 /* bus error (hardware not in expected state) */ 90 #define IIC_ENOACK 0x2 /* ack not received until timeout */ 91 #define IIC_ETIMEOUT 0x3 /* timeout */ 92 #define IIC_EBUSBSY 0x4 /* bus busy (reserved by another client) */ 93 #define IIC_ESTATUS 0x5 /* status error */ 94 #define IIC_EUNDERFLOW 0x6 /* slave ready for more data */ 95 #define IIC_EOVERFLOW 0x7 /* too much data */ 96 #define IIC_ENOTSUPP 0x8 /* request not supported */ 97 #define IIC_ENOADDR 0x9 /* no address assigned to the interface */ 98 #define IIC_ERESOURCE 0xa /* resources (memory, whatever) unavailable */ 99 100 /* 101 * Note that all iicbus functions return IIC_Exxxxx status values, 102 * except iic2errno() (obviously) and iicbus_started() (returns bool). 103 */ 104 extern int iic2errno(int); 105 extern int iicbus_request_bus(device_t, device_t, int); 106 extern int iicbus_release_bus(device_t, device_t); 107 extern device_t iicbus_alloc_bus(device_t); 108 109 extern void iicbus_intr(device_t, int, char *); 110 111 extern int iicbus_null_repeated_start(device_t, u_char); 112 extern int iicbus_null_callback(device_t, int, caddr_t); 113 114 #define iicbus_reset(bus,speed,addr,oldaddr) \ 115 (IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr)) 116 117 /* basic I2C operations */ 118 extern int iicbus_started(device_t); 119 extern int iicbus_start(device_t, u_char, int); 120 extern int iicbus_stop(device_t); 121 extern int iicbus_repeated_start(device_t, u_char, int); 122 extern int iicbus_write(device_t, const char *, int, int *, int); 123 extern int iicbus_read(device_t, char *, int, int *, int, int); 124 125 /* single byte read/write functions, start/stop not managed */ 126 extern int iicbus_write_byte(device_t, char, int); 127 extern int iicbus_read_byte(device_t, char *, int); 128 129 /* Read/write operations with start/stop conditions managed */ 130 extern int iicbus_block_write(device_t, u_char, char *, int, int *); 131 extern int iicbus_block_read(device_t, u_char, char *, int, int *); 132 133 /* vectors of iic operations to pass to bridge */ 134 int iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs); 135 int iicbus_transfer_excl(device_t bus, struct iic_msg *msgs, uint32_t nmsgs, 136 int how); 137 int iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs); 138 139 /* 140 * Simple register read/write routines, but the "register" can be any size. 141 * The transfers are done with iicbus_transfer_excl(). Reads use a repeat-start 142 * between sending the address and reading; writes use a single start/stop. 143 */ 144 int iicdev_readfrom(device_t _slavedev, uint8_t _regaddr, void *_buffer, 145 uint16_t _buflen, int _waithow); 146 int iicdev_writeto(device_t _slavedev, uint8_t _regaddr, void *_buffer, 147 uint16_t _buflen, int _waithow); 148 149 #define IICBUS_MODVER 1 150 #define IICBUS_MINVER 1 151 #define IICBUS_MAXVER 1 152 #define IICBUS_PREFVER IICBUS_MODVER 153 154 extern driver_t iicbb_driver; 155 extern devclass_t iicbb_devclass; 156 157 #define IICBB_MODVER 1 158 #define IICBB_MINVER 1 159 #define IICBB_MAXVER 1 160 #define IICBB_PREFVER IICBB_MODVER 161 162 #endif 163