1 /*- 2 * Copyright (c) 1998 Nicolas Souchu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $Id: iiconf.c,v 1.1.1.1 1998/09/03 20:51:50 nsouch Exp $ 27 * 28 */ 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/kernel.h> 32 #include <sys/malloc.h> 33 #include <sys/module.h> 34 #include <sys/bus.h> 35 36 #include <dev/iicbus/iiconf.h> 37 #include <dev/iicbus/iicbus.h> 38 #include "iicbus_if.h" 39 40 /* 41 * iicbus_intr() 42 */ 43 void 44 iicbus_intr(device_t bus, int event, char *buf) 45 { 46 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus); 47 48 /* call owner's intr routine */ 49 if (sc->owner) 50 IICBUS_INTR(sc->owner, event, buf); 51 52 return; 53 } 54 55 /* 56 * iicbus_alloc_bus() 57 * 58 * Allocate a new bus connected to the given parent device 59 */ 60 device_t 61 iicbus_alloc_bus(device_t parent) 62 { 63 device_t child; 64 65 /* add the bus to the parent */ 66 child = device_add_child(parent, "iicbus", -1, NULL); 67 68 if (child) 69 device_set_desc(child, "Philips I2C bus"); 70 71 return (child); 72 } 73 74 static int 75 iicbus_poll(struct iicbus_softc *sc, int how) 76 { 77 int error; 78 79 switch (how) { 80 case (IIC_WAIT | IIC_INTR): 81 error = tsleep(sc, IICPRI|PCATCH, "iicreq", 0); 82 break; 83 84 case (IIC_WAIT | IIC_NOINTR): 85 error = tsleep(sc, IICPRI, "iicreq", 0); 86 break; 87 88 default: 89 return (EWOULDBLOCK); 90 break; 91 } 92 93 return (error); 94 } 95 96 /* 97 * iicbus_request_bus() 98 * 99 * Allocate the device to perform transfers. 100 * 101 * how : IIC_WAIT or IIC_DONTWAIT 102 */ 103 int 104 iicbus_request_bus(device_t bus, device_t dev, int how) 105 { 106 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus); 107 int s, error = 0; 108 109 /* first, ask the underlying layers if the request is ok */ 110 do { 111 error = IICBUS_CALLBACK(device_get_parent(bus), 112 IIC_REQUEST_BUS, (caddr_t)&how); 113 if (error) 114 error = iicbus_poll(sc, how); 115 } while (error); 116 117 while (!error) { 118 s = splhigh(); 119 if (sc->owner) { 120 splx(s); 121 122 error = iicbus_poll(sc, how); 123 } else { 124 sc->owner = dev; 125 126 splx(s); 127 return (0); 128 } 129 } 130 131 return (error); 132 } 133 134 /* 135 * iicbus_release_bus() 136 * 137 * Release the device allocated with iicbus_request_dev() 138 */ 139 int 140 iicbus_release_bus(device_t bus, device_t dev) 141 { 142 struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus); 143 int s, error; 144 145 /* first, ask the underlying layers if the release is ok */ 146 error = IICBUS_CALLBACK(device_get_parent(bus), IIC_RELEASE_BUS, NULL); 147 148 if (error) 149 return (error); 150 151 s = splhigh(); 152 if (sc->owner != dev) { 153 splx(s); 154 return (EACCES); 155 } 156 157 sc->owner = 0; 158 splx(s); 159 160 /* wakeup waiting processes */ 161 wakeup(sc); 162 163 return (0); 164 } 165 166 /* 167 * iicbus_block_write() 168 * 169 * Write a block of data to slave ; start/stop protocol managed 170 */ 171 int 172 iicbus_block_write(device_t bus, u_char slave, char *buf, int len, int *sent) 173 { 174 u_char addr = slave & ~LSB; 175 int error; 176 177 if ((error = iicbus_start(bus, addr, 0))) 178 return (error); 179 180 error = iicbus_write(bus, buf, len, sent, 0); 181 182 iicbus_stop(bus); 183 184 return (error); 185 } 186 187 /* 188 * iicbus_block_read() 189 * 190 * Read a block of data from slave ; start/stop protocol managed 191 */ 192 int 193 iicbus_block_read(device_t bus, u_char slave, char *buf, int len, int *read) 194 { 195 u_char addr = slave | LSB; 196 int error; 197 198 if ((error = iicbus_start(bus, addr, 0))) 199 return (error); 200 201 error = iicbus_read(bus, buf, len, read, IIC_LAST_READ, 0); 202 203 iicbus_stop(bus); 204 205 return (error); 206 } 207 208 /* 209 * iicbus_get_addr() 210 * 211 * Get the I2C 7 bits address of the device 212 */ 213 u_char 214 iicbus_get_addr(device_t dev) 215 { 216 u_long addr; 217 device_t parent = device_get_parent(dev); 218 219 BUS_READ_IVAR(parent, dev, IICBUS_IVAR_ADDR, &addr); 220 221 return ((u_char)addr); 222 } 223