1 /*- 2 * Copyright (c) 1998 Nicolas Souchu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 #ifndef __IICBUS_H 30 #define __IICBUS_H 31 32 #include <sys/_lock.h> 33 #include <sys/_mutex.h> 34 35 #define IICBUS_IVAR(d) (struct iicbus_ivar *) device_get_ivars(d) 36 #define IICBUS_SOFTC(d) (struct iicbus_softc *) device_get_softc(d) 37 38 struct iicbus_softc 39 { 40 device_t dev; /* Myself */ 41 device_t owner; /* iicbus owner device structure */ 42 u_char started; /* address of the 'started' slave 43 * 0 if no start condition succeeded */ 44 u_char strict; /* deny operations that violate the 45 * I2C protocol */ 46 struct mtx lock; 47 }; 48 49 struct iicbus_ivar 50 { 51 uint32_t addr; 52 }; 53 54 enum { 55 IICBUS_IVAR_ADDR /* Address or base address */ 56 }; 57 58 #define IICBUS_ACCESSOR(A, B, T) \ 59 __BUS_ACCESSOR(iicbus, A, IICBUS, B, T) 60 61 IICBUS_ACCESSOR(addr, ADDR, uint32_t) 62 63 #define IICBUS_LOCK(sc) mtx_lock(&(sc)->lock) 64 #define IICBUS_UNLOCK(sc) mtx_unlock(&(sc)->lock) 65 #define IICBUS_ASSERT_LOCKED(sc) mtx_assert(&(sc)->lock, MA_OWNED) 66 67 extern int iicbus_generic_intr(device_t dev, int event, char *buf); 68 69 extern driver_t iicbus_driver; 70 extern devclass_t iicbus_devclass; 71 72 #endif 73