1 /*- 2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD. 3 * All rights reserved. 4 * 5 * Developed by Semihalf. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of MARVELL nor the names of contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell 34 * and Allwinner SoCs. Supports master operation only. 35 * 36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software 37 * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices". 38 */ 39 40 #include <sys/cdefs.h> 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/bus.h> 44 #include <sys/kernel.h> 45 #include <sys/lock.h> 46 #include <sys/mutex.h> 47 #include <sys/module.h> 48 #include <sys/resource.h> 49 #include <sys/rman.h> 50 #include <sys/sysctl.h> 51 52 #include <machine/_inttypes.h> 53 #include <machine/bus.h> 54 #include <machine/resource.h> 55 56 #include <dev/iicbus/iiconf.h> 57 #include <dev/iicbus/iicbus.h> 58 59 #include <dev/iicbus/controller/twsi/twsi.h> 60 61 #include "iicbus_if.h" 62 63 #define TWSI_CONTROL_ACK (1 << 2) 64 #define TWSI_CONTROL_IFLG (1 << 3) 65 #define TWSI_CONTROL_STOP (1 << 4) 66 #define TWSI_CONTROL_START (1 << 5) 67 #define TWSI_CONTROL_TWSIEN (1 << 6) 68 #define TWSI_CONTROL_INTEN (1 << 7) 69 70 #define TWSI_STATUS_BUS_ERROR 0x00 71 #define TWSI_STATUS_START 0x08 72 #define TWSI_STATUS_RPTD_START 0x10 73 #define TWSI_STATUS_ADDR_W_ACK 0x18 74 #define TWSI_STATUS_ADDR_W_NACK 0x20 75 #define TWSI_STATUS_DATA_WR_ACK 0x28 76 #define TWSI_STATUS_DATA_WR_NACK 0x30 77 #define TWSI_STATUS_ARBITRATION_LOST 0x38 78 #define TWSI_STATUS_ADDR_R_ACK 0x40 79 #define TWSI_STATUS_ADDR_R_NACK 0x48 80 #define TWSI_STATUS_DATA_RD_ACK 0x50 81 #define TWSI_STATUS_DATA_RD_NOACK 0x58 82 #define TWSI_STATUS_IDLE 0xf8 83 84 #define TWSI_DEBUG 85 #undef TWSI_DEBUG 86 87 #define debugf(sc, fmt, args...) if ((sc)->debug) \ 88 device_printf((sc)->dev, "%s: " fmt, __func__, ##args) 89 90 static struct resource_spec res_spec[] = { 91 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 92 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE}, 93 { -1, 0 } 94 }; 95 96 static __inline uint32_t 97 TWSI_READ(struct twsi_softc *sc, bus_size_t off) 98 { 99 uint32_t val; 100 101 val = bus_read_4(sc->res[0], off); 102 if (sc->debug > 1) 103 debugf(sc, "read %x from %lx\n", val, off); 104 return (val); 105 } 106 107 static __inline void 108 TWSI_WRITE(struct twsi_softc *sc, bus_size_t off, uint32_t val) 109 { 110 111 if (sc->debug > 1) 112 debugf(sc, "Writing %x to %lx\n", val, off); 113 bus_write_4(sc->res[0], off, val); 114 } 115 116 static __inline void 117 twsi_control_clear(struct twsi_softc *sc, uint32_t mask) 118 { 119 uint32_t val; 120 121 val = TWSI_READ(sc, sc->reg_control); 122 debugf(sc, "read val=%x\n", val); 123 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START); 124 val &= ~mask; 125 debugf(sc, "write val=%x\n", val); 126 TWSI_WRITE(sc, sc->reg_control, val); 127 } 128 129 static __inline void 130 twsi_control_set(struct twsi_softc *sc, uint32_t mask) 131 { 132 uint32_t val; 133 134 val = TWSI_READ(sc, sc->reg_control); 135 debugf(sc, "read val=%x\n", val); 136 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START); 137 val |= mask; 138 debugf(sc, "write val=%x\n", val); 139 TWSI_WRITE(sc, sc->reg_control, val); 140 } 141 142 static __inline void 143 twsi_clear_iflg(struct twsi_softc *sc) 144 { 145 146 DELAY(1000); 147 /* There are two ways of clearing IFLAG. */ 148 if (sc->iflag_w1c) 149 twsi_control_set(sc, TWSI_CONTROL_IFLG); 150 else 151 twsi_control_clear(sc, TWSI_CONTROL_IFLG); 152 DELAY(1000); 153 } 154 155 156 /* 157 * timeout given in us 158 * returns 159 * 0 on successful mask change 160 * non-zero on timeout 161 */ 162 static int 163 twsi_poll_ctrl(struct twsi_softc *sc, int timeout, uint32_t mask) 164 { 165 166 timeout /= 10; 167 debugf(sc, "Waiting for ctrl reg to match mask %x\n", mask); 168 while (!(TWSI_READ(sc, sc->reg_control) & mask)) { 169 DELAY(10); 170 if (--timeout < 0) 171 return (timeout); 172 } 173 debugf(sc, "done\n"); 174 return (0); 175 } 176 177 178 /* 179 * 'timeout' is given in us. Note also that timeout handling is not exact -- 180 * twsi_locked_start() total wait can be more than 2 x timeout 181 * (twsi_poll_ctrl() is called twice). 'mask' can be either TWSI_STATUS_START 182 * or TWSI_STATUS_RPTD_START 183 */ 184 static int 185 twsi_locked_start(device_t dev, struct twsi_softc *sc, int32_t mask, 186 u_char slave, int timeout) 187 { 188 int read_access, iflg_set = 0; 189 uint32_t status; 190 191 mtx_assert(&sc->mutex, MA_OWNED); 192 193 if (mask == TWSI_STATUS_RPTD_START) 194 /* read IFLG to know if it should be cleared later; from NBSD */ 195 iflg_set = TWSI_READ(sc, sc->reg_control) & TWSI_CONTROL_IFLG; 196 197 debugf(sc, "send start\n"); 198 twsi_control_set(sc, TWSI_CONTROL_START); 199 200 if (mask == TWSI_STATUS_RPTD_START && iflg_set) { 201 debugf(sc, "IFLG set, clearing (mask=%x)\n", mask); 202 twsi_clear_iflg(sc); 203 } 204 205 /* 206 * Without this delay we timeout checking IFLG if the timeout is 0. 207 * NBSD driver always waits here too. 208 */ 209 DELAY(1000); 210 211 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) { 212 debugf(sc, "timeout sending %sSTART condition\n", 213 mask == TWSI_STATUS_START ? "" : "repeated "); 214 return (IIC_ETIMEOUT); 215 } 216 217 status = TWSI_READ(sc, sc->reg_status); 218 debugf(sc, "status=%x\n", status); 219 220 if (status != mask) { 221 debugf(sc, "wrong status (%02x) after sending %sSTART condition\n", 222 status, mask == TWSI_STATUS_START ? "" : "repeated "); 223 return (IIC_ESTATUS); 224 } 225 226 TWSI_WRITE(sc, sc->reg_data, slave); 227 twsi_clear_iflg(sc); 228 DELAY(1000); 229 230 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) { 231 debugf(sc, "timeout sending slave address (timeout=%d)\n", timeout); 232 return (IIC_ETIMEOUT); 233 } 234 235 read_access = (slave & 0x1) ? 1 : 0; 236 status = TWSI_READ(sc, sc->reg_status); 237 if (status != (read_access ? 238 TWSI_STATUS_ADDR_R_ACK : TWSI_STATUS_ADDR_W_ACK)) { 239 debugf(sc, "no ACK (status: %02x) after sending slave address\n", 240 status); 241 return (IIC_ENOACK); 242 } 243 244 return (IIC_NOERR); 245 } 246 247 #define TWSI_BAUD_RATE_RAW(C,M,N) ((C)/((10*(M+1))<<(N))) 248 #define ABSSUB(a,b) (((a) > (b)) ? (a) - (b) : (b) - (a)) 249 250 static int 251 twsi_calc_baud_rate(struct twsi_softc *sc, const u_int target, 252 int *param) 253 { 254 uint64_t clk; 255 uint32_t cur, diff, diff0; 256 int m, n, m0, n0; 257 258 /* Calculate baud rate. */ 259 diff0 = 0xffffffff; 260 261 if (clk_get_freq(sc->clk_core, &clk) < 0) 262 return (-1); 263 264 debugf(sc, "Bus clock is at %ju\n", clk); 265 266 for (n = 0; n < 8; n++) { 267 for (m = 0; m < 16; m++) { 268 cur = TWSI_BAUD_RATE_RAW(clk,m,n); 269 diff = ABSSUB(target, cur); 270 if (diff < diff0) { 271 m0 = m; 272 n0 = n; 273 diff0 = diff; 274 } 275 } 276 } 277 *param = TWSI_BAUD_RATE_PARAM(m0, n0); 278 279 return (0); 280 } 281 282 /* 283 * Only slave mode supported, disregard [old]addr 284 */ 285 static int 286 twsi_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) 287 { 288 struct twsi_softc *sc; 289 uint32_t param; 290 u_int busfreq; 291 292 sc = device_get_softc(dev); 293 294 busfreq = IICBUS_GET_FREQUENCY(sc->iicbus, speed); 295 296 if (twsi_calc_baud_rate(sc, busfreq, ¶m) == -1) { 297 switch (speed) { 298 case IIC_SLOW: 299 case IIC_FAST: 300 param = sc->baud_rate[speed].param; 301 debugf(sc, "Using IIC_FAST mode with speed param=%x\n", param); 302 break; 303 case IIC_FASTEST: 304 case IIC_UNKNOWN: 305 default: 306 param = sc->baud_rate[IIC_FAST].param; 307 debugf(sc, "Using IIC_FASTEST/UNKNOWN mode with speed param=%x\n", param); 308 break; 309 } 310 } 311 312 debugf(sc, "Using clock param=%x\n", param); 313 314 mtx_lock(&sc->mutex); 315 TWSI_WRITE(sc, sc->reg_soft_reset, 0x1); 316 TWSI_WRITE(sc, sc->reg_baud_rate, param); 317 TWSI_WRITE(sc, sc->reg_control, TWSI_CONTROL_TWSIEN); 318 DELAY(1000); 319 mtx_unlock(&sc->mutex); 320 321 return (0); 322 } 323 324 static int 325 twsi_stop(device_t dev) 326 { 327 struct twsi_softc *sc; 328 329 sc = device_get_softc(dev); 330 331 debugf(sc, "%s\n", __func__); 332 mtx_lock(&sc->mutex); 333 twsi_control_clear(sc, TWSI_CONTROL_ACK); 334 twsi_control_set(sc, TWSI_CONTROL_STOP); 335 twsi_clear_iflg(sc); 336 DELAY(1000); 337 mtx_unlock(&sc->mutex); 338 339 return (IIC_NOERR); 340 } 341 342 /* 343 * timeout is given in us 344 */ 345 static int 346 twsi_repeated_start(device_t dev, u_char slave, int timeout) 347 { 348 struct twsi_softc *sc; 349 int rv; 350 351 sc = device_get_softc(dev); 352 353 debugf(sc, "%s: slave=%x\n", __func__, slave); 354 mtx_lock(&sc->mutex); 355 rv = twsi_locked_start(dev, sc, TWSI_STATUS_RPTD_START, slave, 356 timeout); 357 mtx_unlock(&sc->mutex); 358 359 if (rv) { 360 twsi_stop(dev); 361 return (rv); 362 } else 363 return (IIC_NOERR); 364 } 365 366 /* 367 * timeout is given in us 368 */ 369 static int 370 twsi_start(device_t dev, u_char slave, int timeout) 371 { 372 struct twsi_softc *sc; 373 int rv; 374 375 sc = device_get_softc(dev); 376 377 debugf(sc, "%s: slave=%x\n", __func__, slave); 378 mtx_lock(&sc->mutex); 379 rv = twsi_locked_start(dev, sc, TWSI_STATUS_START, slave, timeout); 380 mtx_unlock(&sc->mutex); 381 382 if (rv) { 383 twsi_stop(dev); 384 return (rv); 385 } else 386 return (IIC_NOERR); 387 } 388 389 static int 390 twsi_read(device_t dev, char *buf, int len, int *read, int last, int delay) 391 { 392 struct twsi_softc *sc; 393 uint32_t status; 394 int last_byte, rv; 395 396 sc = device_get_softc(dev); 397 398 mtx_lock(&sc->mutex); 399 *read = 0; 400 while (*read < len) { 401 /* 402 * Check if we are reading last byte of the last buffer, 403 * do not send ACK then, per I2C specs 404 */ 405 last_byte = ((*read == len - 1) && last) ? 1 : 0; 406 if (last_byte) 407 twsi_control_clear(sc, TWSI_CONTROL_ACK); 408 else 409 twsi_control_set(sc, TWSI_CONTROL_ACK); 410 411 twsi_clear_iflg(sc); 412 DELAY(1000); 413 414 if (twsi_poll_ctrl(sc, delay, TWSI_CONTROL_IFLG)) { 415 debugf(sc, "timeout reading data (delay=%d)\n", delay); 416 rv = IIC_ETIMEOUT; 417 goto out; 418 } 419 420 status = TWSI_READ(sc, sc->reg_status); 421 if (status != (last_byte ? 422 TWSI_STATUS_DATA_RD_NOACK : TWSI_STATUS_DATA_RD_ACK)) { 423 debugf(sc, "wrong status (%02x) while reading\n", status); 424 rv = IIC_ESTATUS; 425 goto out; 426 } 427 428 *buf++ = TWSI_READ(sc, sc->reg_data); 429 (*read)++; 430 } 431 rv = IIC_NOERR; 432 out: 433 mtx_unlock(&sc->mutex); 434 return (rv); 435 } 436 437 static int 438 twsi_write(device_t dev, const char *buf, int len, int *sent, int timeout) 439 { 440 struct twsi_softc *sc; 441 uint32_t status; 442 int rv; 443 444 sc = device_get_softc(dev); 445 446 mtx_lock(&sc->mutex); 447 *sent = 0; 448 while (*sent < len) { 449 TWSI_WRITE(sc, sc->reg_data, *buf++); 450 451 twsi_clear_iflg(sc); 452 DELAY(1000); 453 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) { 454 debugf(sc, "timeout writing data (timeout=%d)\n", timeout); 455 rv = IIC_ETIMEOUT; 456 goto out; 457 } 458 459 status = TWSI_READ(sc, sc->reg_status); 460 if (status != TWSI_STATUS_DATA_WR_ACK) { 461 debugf(sc, "wrong status (%02x) while writing\n", status); 462 rv = IIC_ESTATUS; 463 goto out; 464 } 465 (*sent)++; 466 } 467 rv = IIC_NOERR; 468 out: 469 mtx_unlock(&sc->mutex); 470 return (rv); 471 } 472 473 static void 474 twsi_error(struct twsi_softc *sc, int err) 475 { 476 /* 477 * Must send stop condition to abort the current transfer. 478 */ 479 debugf(sc, "Sending STOP condition for error %d\n", err); 480 sc->transfer = 0; 481 sc->error = err; 482 sc->control_val = 0; 483 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_STOP); 484 } 485 486 static int 487 twsi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) 488 { 489 struct twsi_softc *sc; 490 uint32_t status; 491 int error; 492 493 sc = device_get_softc(dev); 494 495 if (!sc->have_intr) 496 return (iicbus_transfer_gen(dev, msgs, nmsgs)); 497 498 mtx_lock(&sc->mutex); 499 KASSERT(sc->transfer == 0, 500 ("starting a transfer while another is active")); 501 502 debugf(sc, "transmitting %d messages\n", nmsgs); 503 status = TWSI_READ(sc, sc->reg_status); 504 debugf(sc, "status=0x%x\n", status); 505 if (status != TWSI_STATUS_IDLE) { 506 debugf(sc, "Bad status at start of transfer\n"); 507 twsi_error(sc, IIC_ESTATUS); 508 goto end; 509 } 510 511 sc->nmsgs = nmsgs; 512 sc->msgs = msgs; 513 sc->msg_idx = 0; 514 sc->transfer = 1; 515 sc->error = 0; 516 517 #ifdef TWSI_DEBUG 518 for (int i = 0; i < nmsgs; i++) 519 debugf(sc, "msg %d is %d bytes long\n", i, msgs[i].len); 520 #endif 521 522 /* Send start and re-enable interrupts */ 523 sc->control_val = TWSI_CONTROL_TWSIEN | TWSI_CONTROL_INTEN; 524 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_START); 525 msleep_sbt(sc, &sc->mutex, 0, "twsi", 3000 * SBT_1MS, SBT_1MS, 0); 526 debugf(sc, "pause finish\n"); 527 if (sc->error == 0 && sc->transfer != 0) { 528 device_printf(sc->dev, "transfer timeout\n"); 529 sc->error = IIC_ETIMEOUT; 530 sc->transfer = 0; 531 } 532 533 if (sc->error != 0) 534 debugf(sc, "Error: %d\n", sc->error); 535 536 end: 537 /* Disable module and interrupts */ 538 debugf(sc, "status=0x%x\n", TWSI_READ(sc, sc->reg_status)); 539 TWSI_WRITE(sc, sc->reg_control, 0); 540 debugf(sc, "status=0x%x\n", TWSI_READ(sc, sc->reg_status)); 541 error = sc->error; 542 mtx_unlock(&sc->mutex); 543 544 return (error); 545 } 546 547 static void 548 twsi_intr(void *arg) 549 { 550 struct twsi_softc *sc; 551 uint32_t status; 552 bool message_done; 553 bool send_start; 554 555 sc = arg; 556 send_start = false; 557 558 mtx_lock(&sc->mutex); 559 debugf(sc, "Got interrupt, current msg=%u\n", sc->msg_idx); 560 561 status = TWSI_READ(sc, sc->reg_status); 562 debugf(sc, "reg control = 0x%x, status = 0x%x\n", 563 TWSI_READ(sc, sc->reg_control), status); 564 565 if (sc->transfer == 0) { 566 device_printf(sc->dev, "interrupt without active transfer, " 567 "status = 0x%x\n", status); 568 TWSI_WRITE(sc, sc->reg_control, sc->control_val | 569 TWSI_CONTROL_STOP); 570 goto end; 571 } 572 573 restart: 574 message_done = false; 575 576 switch (status) { 577 case TWSI_STATUS_START: 578 case TWSI_STATUS_RPTD_START: 579 /* Transmit the address */ 580 debugf(sc, "Send address 0x%x\n", 581 sc->msgs[sc->msg_idx].slave); 582 583 if (sc->msgs[sc->msg_idx].flags & IIC_M_RD) 584 TWSI_WRITE(sc, sc->reg_data, 585 sc->msgs[sc->msg_idx].slave | LSB); 586 else 587 TWSI_WRITE(sc, sc->reg_data, 588 sc->msgs[sc->msg_idx].slave & ~LSB); 589 break; 590 591 case TWSI_STATUS_ADDR_W_ACK: 592 debugf(sc, "Address ACK-ed (write)\n"); 593 594 if (sc->msgs[sc->msg_idx].len > 0) { 595 /* Directly send the first byte */ 596 sc->sent_bytes = 1; 597 debugf(sc, "Sending byte 0 (of %d) = %x\n", 598 sc->msgs[sc->msg_idx].len, 599 sc->msgs[sc->msg_idx].buf[0]); 600 TWSI_WRITE(sc, sc->reg_data, 601 sc->msgs[sc->msg_idx].buf[0]); 602 } else { 603 debugf(sc, "Zero-length write, sending STOP\n"); 604 TWSI_WRITE(sc, sc->reg_control, 605 sc->control_val | TWSI_CONTROL_STOP); 606 } 607 break; 608 609 case TWSI_STATUS_ADDR_R_ACK: 610 debugf(sc, "Address ACK-ed (read)\n"); 611 sc->recv_bytes = 0; 612 613 if (sc->msgs[sc->msg_idx].len == 0) { 614 debugf(sc, "Zero-length read, sending STOP\n"); 615 TWSI_WRITE(sc, sc->reg_control, 616 sc->control_val | TWSI_CONTROL_STOP); 617 } else if (sc->msgs[sc->msg_idx].len == 1) { 618 sc->control_val &= ~TWSI_CONTROL_ACK; 619 } else { 620 sc->control_val |= TWSI_CONTROL_ACK; 621 } 622 break; 623 624 case TWSI_STATUS_ADDR_W_NACK: 625 case TWSI_STATUS_ADDR_R_NACK: 626 debugf(sc, "Address NACK-ed\n"); 627 twsi_error(sc, IIC_ENOACK); 628 break; 629 case TWSI_STATUS_DATA_WR_NACK: 630 debugf(sc, "Data byte NACK-ed\n"); 631 twsi_error(sc, IIC_ENOACK); 632 break; 633 case TWSI_STATUS_DATA_WR_ACK: 634 KASSERT(sc->sent_bytes <= sc->msgs[sc->msg_idx].len, 635 ("sent_bytes beyond message length")); 636 debugf(sc, "ACK received after transmitting data\n"); 637 if (sc->sent_bytes == sc->msgs[sc->msg_idx].len) { 638 debugf(sc, "Done TX data\n"); 639 640 /* Send stop, no interrupts on stop */ 641 if (!(sc->msgs[sc->msg_idx].flags & IIC_M_NOSTOP)) { 642 TWSI_WRITE(sc, sc->reg_control, 643 sc->control_val | TWSI_CONTROL_STOP); 644 } else { 645 debugf(sc, "NOSTOP flag\n"); 646 } 647 message_done = true; 648 break; 649 } 650 651 debugf(sc, "Sending byte %d (of %d) = 0x%x\n", 652 sc->sent_bytes, 653 sc->msgs[sc->msg_idx].len, 654 sc->msgs[sc->msg_idx].buf[sc->sent_bytes]); 655 TWSI_WRITE(sc, sc->reg_data, 656 sc->msgs[sc->msg_idx].buf[sc->sent_bytes]); 657 sc->sent_bytes++; 658 break; 659 660 case TWSI_STATUS_DATA_RD_ACK: 661 debugf(sc, "Received and ACK-ed data\n"); 662 KASSERT(sc->recv_bytes < sc->msgs[sc->msg_idx].len, 663 ("receiving beyond the end of buffer")); 664 665 sc->msgs[sc->msg_idx].buf[sc->recv_bytes] = 666 TWSI_READ(sc, sc->reg_data); 667 debugf(sc, "Received byte %d (of %d) = 0x%x\n", 668 sc->recv_bytes, 669 sc->msgs[sc->msg_idx].len, 670 sc->msgs[sc->msg_idx].buf[sc->recv_bytes]); 671 sc->recv_bytes++; 672 673 /* If we only have one byte left, disable ACK */ 674 if (sc->msgs[sc->msg_idx].len - sc->recv_bytes == 1) { 675 sc->control_val &= ~TWSI_CONTROL_ACK; 676 } else if (sc->msgs[sc->msg_idx].len == sc->recv_bytes) { 677 /* 678 * We should not have ACK-ed the last byte. 679 * The protocol state machine is in invalid state. 680 */ 681 debugf(sc, "RX all but asked for more?\n"); 682 twsi_error(sc, IIC_ESTATUS); 683 } 684 break; 685 686 case TWSI_STATUS_DATA_RD_NOACK: 687 debugf(sc, "Received and NACK-ed data\n"); 688 KASSERT(sc->recv_bytes == sc->msgs[sc->msg_idx].len - 1, 689 ("sent NACK before receiving all requested data")); 690 sc->msgs[sc->msg_idx].buf[sc->recv_bytes] = 691 TWSI_READ(sc, sc->reg_data); 692 debugf(sc, "Received byte %d (of %d) = 0x%x\n", 693 sc->recv_bytes, 694 sc->msgs[sc->msg_idx].len, 695 sc->msgs[sc->msg_idx].buf[sc->recv_bytes]); 696 sc->recv_bytes++; 697 698 if (sc->msgs[sc->msg_idx].len == sc->recv_bytes) { 699 debugf(sc, "Done RX data\n"); 700 if (!(sc->msgs[sc->msg_idx].flags & IIC_M_NOSTOP)) { 701 debugf(sc, "Send STOP\n"); 702 TWSI_WRITE(sc, sc->reg_control, 703 sc->control_val | TWSI_CONTROL_STOP); 704 } 705 message_done = true; 706 } else { 707 /* 708 * We should not have NACK-ed yet. 709 * The protocol state machine is in invalid state. 710 */ 711 debugf(sc, "NACK-ed before receving all bytes?\n"); 712 twsi_error(sc, IIC_ESTATUS); 713 } 714 break; 715 716 case TWSI_STATUS_BUS_ERROR: 717 debugf(sc, "Bus error\n"); 718 twsi_error(sc, IIC_EBUSERR); 719 break; 720 case TWSI_STATUS_ARBITRATION_LOST: 721 debugf(sc, "Arbitration lost\n"); 722 twsi_error(sc, IIC_EBUSBSY); 723 break; 724 default: 725 debugf(sc, "unexpected status 0x%x\n", status); 726 twsi_error(sc, IIC_ESTATUS); 727 break; 728 } 729 730 if (message_done) { 731 sc->msg_idx++; 732 if (sc->msg_idx == sc->nmsgs) { 733 debugf(sc, "All messages transmitted\n"); 734 sc->transfer = 0; 735 sc->error = 0; 736 } else if ((sc->msgs[sc->msg_idx].flags & IIC_M_NOSTART) == 0) { 737 debugf(sc, "Send (repeated) start\n"); 738 send_start = true; 739 } else { 740 /* Just keep transmitting data. */ 741 KASSERT((sc->msgs[sc->msg_idx - 1].flags & IIC_M_NOSTOP) != 0, 742 ("NOSTART message after STOP")); 743 KASSERT((sc->msgs[sc->msg_idx].flags & IIC_M_RD) == 744 (sc->msgs[sc->msg_idx - 1].flags & IIC_M_RD), 745 ("change of transfer direction without a START")); 746 debugf(sc, "NOSTART message after NOSTOP\n"); 747 sc->sent_bytes = 0; 748 sc->recv_bytes = 0; 749 if ((sc->msgs[sc->msg_idx].flags & IIC_M_RD) == 0) { 750 status = TWSI_STATUS_ADDR_W_ACK; 751 goto restart; 752 } else { 753 debugf(sc, "Read+NOSTART unsupported\n"); 754 twsi_error(sc, IIC_ESTATUS); 755 } 756 } 757 } 758 end: 759 /* 760 * Newer Allwinner chips clear IFLG after writing 1 to it. 761 */ 762 debugf(sc, "Refresh reg_control\n"); 763 TWSI_WRITE(sc, sc->reg_control, sc->control_val | 764 (sc->iflag_w1c ? TWSI_CONTROL_IFLG : 0) | 765 (send_start ? TWSI_CONTROL_START : 0)); 766 767 debugf(sc, "Done with interrupt, transfer = %d\n", sc->transfer); 768 if (sc->transfer == 0) 769 wakeup(sc); 770 mtx_unlock(&sc->mutex); 771 } 772 773 static void 774 twsi_intr_start(void *pdev) 775 { 776 struct twsi_softc *sc; 777 778 sc = device_get_softc(pdev); 779 780 if ((bus_setup_intr(pdev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, 781 NULL, twsi_intr, sc, &sc->intrhand))) 782 device_printf(pdev, "unable to register interrupt handler\n"); 783 784 sc->have_intr = true; 785 } 786 787 int 788 twsi_attach(device_t dev) 789 { 790 struct twsi_softc *sc; 791 struct sysctl_ctx_list *ctx; 792 struct sysctl_oid *tree_node; 793 struct sysctl_oid_list *tree; 794 795 sc = device_get_softc(dev); 796 sc->dev = dev; 797 798 mtx_init(&sc->mutex, device_get_nameunit(dev), "twsi", MTX_DEF); 799 800 if (bus_alloc_resources(dev, res_spec, sc->res)) { 801 device_printf(dev, "could not allocate resources\n"); 802 twsi_detach(dev); 803 return (ENXIO); 804 } 805 806 #ifdef TWSI_DEBUG 807 sc->debug = 1; 808 #endif 809 ctx = device_get_sysctl_ctx(dev); 810 tree_node = device_get_sysctl_tree(dev); 811 tree = SYSCTL_CHILDREN(tree_node); 812 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "debug", CTLFLAG_RWTUN, 813 &sc->debug, 0, "Set debug level (zero to disable)"); 814 815 /* Attach the iicbus. */ 816 if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) { 817 device_printf(dev, "could not allocate iicbus instance\n"); 818 twsi_detach(dev); 819 return (ENXIO); 820 } 821 bus_generic_attach(dev); 822 823 config_intrhook_oneshot(twsi_intr_start, dev); 824 825 return (0); 826 } 827 828 int 829 twsi_detach(device_t dev) 830 { 831 struct twsi_softc *sc; 832 int rv; 833 834 sc = device_get_softc(dev); 835 836 if ((rv = bus_generic_detach(dev)) != 0) 837 return (rv); 838 839 if (sc->iicbus != NULL) 840 if ((rv = device_delete_child(dev, sc->iicbus)) != 0) 841 return (rv); 842 843 if (sc->intrhand != NULL) 844 bus_teardown_intr(sc->dev, sc->res[1], sc->intrhand); 845 846 bus_release_resources(dev, res_spec, sc->res); 847 848 mtx_destroy(&sc->mutex); 849 return (0); 850 } 851 852 static device_method_t twsi_methods[] = { 853 /* device interface */ 854 DEVMETHOD(device_detach, twsi_detach), 855 856 /* Bus interface */ 857 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 858 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 859 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 860 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 861 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 862 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 863 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), 864 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 865 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 866 867 /* iicbus interface */ 868 DEVMETHOD(iicbus_callback, iicbus_null_callback), 869 DEVMETHOD(iicbus_repeated_start, twsi_repeated_start), 870 DEVMETHOD(iicbus_start, twsi_start), 871 DEVMETHOD(iicbus_stop, twsi_stop), 872 DEVMETHOD(iicbus_write, twsi_write), 873 DEVMETHOD(iicbus_read, twsi_read), 874 DEVMETHOD(iicbus_reset, twsi_reset), 875 DEVMETHOD(iicbus_transfer, twsi_transfer), 876 { 0, 0 } 877 }; 878 879 DEFINE_CLASS_0(twsi, twsi_driver, twsi_methods, 880 sizeof(struct twsi_softc)); 881