xref: /freebsd/sys/dev/iicbus/controller/twsi/mv_twsi.c (revision 63f537551380d2dab29fa402ad1269feae17e594)
1 /*-
2  * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3  * All rights reserved.
4  *
5  * Developed by Semihalf.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. Neither the name of MARVELL nor the names of contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 /*
33  * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell
34  * and Allwinner SoCs. Supports master operation only, and works in polling mode.
35  *
36  * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
37  * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices".
38  */
39 
40 #include <sys/cdefs.h>
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/bus.h>
44 #include <sys/kernel.h>
45 #include <sys/module.h>
46 #include <sys/resource.h>
47 
48 #include <machine/_inttypes.h>
49 #include <machine/bus.h>
50 #include <machine/resource.h>
51 
52 #include <sys/rman.h>
53 
54 #include <sys/lock.h>
55 #include <sys/mutex.h>
56 
57 #include <dev/iicbus/iiconf.h>
58 #include <dev/iicbus/iicbus.h>
59 #include <dev/ofw/ofw_bus.h>
60 #include <dev/ofw/ofw_bus_subr.h>
61 
62 #include <dev/extres/clk/clk.h>
63 
64 #include <arm/mv/mvreg.h>
65 #include <arm/mv/mvvar.h>
66 #include <dev/iicbus/controller/twsi/twsi.h>
67 
68 #include "iicbus_if.h"
69 
70 #define MV_TWSI_NAME		"twsi"
71 #define	IICBUS_DEVNAME		"iicbus"
72 
73 #define TWSI_ADDR	0x00
74 #define TWSI_DATA	0x04
75 #define TWSI_CNTR	0x08
76 #define TWSI_XADDR	0x10
77 #define TWSI_STAT	0x0c
78 #define TWSI_BAUD_RATE	0x0c
79 #define TWSI_SRST	0x1c
80 
81 #define	TWSI_BAUD_RATE_RAW(C,M,N)	((C)/((10*(M+1))<<(N+1)))
82 #define	TWSI_BAUD_RATE_SLOW		50000	/* 50kHz */
83 #define	TWSI_BAUD_RATE_FAST		100000	/* 100kHz */
84 
85 #define TWSI_DEBUG
86 #undef TWSI_DEBUG
87 
88 #ifdef  TWSI_DEBUG
89 #define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0)
90 #else
91 #define debugf(fmt, args...)
92 #endif
93 
94 static phandle_t mv_twsi_get_node(device_t, device_t);
95 static int mv_twsi_probe(device_t);
96 static int mv_twsi_attach(device_t);
97 
98 static struct ofw_compat_data compat_data[] = {
99 	{ "mrvl,twsi",			true },
100 	{ "marvell,mv64xxx-i2c",	true },
101 	{ "marvell,mv78230-i2c",	true },
102 	{ NULL,				false }
103 };
104 
105 static device_method_t mv_twsi_methods[] = {
106 	/* device interface */
107 	DEVMETHOD(device_probe,		mv_twsi_probe),
108 	DEVMETHOD(device_attach,	mv_twsi_attach),
109 
110 	/* ofw_bus interface */
111 	DEVMETHOD(ofw_bus_get_node,	mv_twsi_get_node),
112 
113 	DEVMETHOD_END
114 };
115 
116 DEFINE_CLASS_1(twsi, mv_twsi_driver, mv_twsi_methods,
117     sizeof(struct twsi_softc), twsi_driver);
118 
119 DRIVER_MODULE(twsi, simplebus, mv_twsi_driver, 0, 0);
120 DRIVER_MODULE(iicbus, twsi, iicbus_driver, 0, 0);
121 MODULE_DEPEND(twsi, iicbus, 1, 1, 1);
122 SIMPLEBUS_PNP_INFO(compat_data);
123 
124 static phandle_t
125 mv_twsi_get_node(device_t bus, device_t dev)
126 {
127 
128 	/* Used by ofw_iicbus. */
129 	return (ofw_bus_get_node(bus));
130 }
131 
132 static int
133 mv_twsi_probe(device_t dev)
134 {
135 
136 	if (!ofw_bus_status_okay(dev))
137 		return (ENXIO);
138 
139 	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
140 		return (ENXIO);
141 
142 	device_set_desc(dev, "Marvell Integrated I2C Bus Controller");
143 	return (BUS_PROBE_DEFAULT);
144 }
145 
146 #define	ABSSUB(a,b)	(((a) > (b)) ? (a) - (b) : (b) - (a))
147 static void
148 mv_twsi_cal_baud_rate(struct twsi_softc *sc, const uint32_t target,
149     struct twsi_baud_rate *rate)
150 {
151 	uint64_t clk;
152 	uint32_t cur, diff, diff0;
153 	int m, n, m0, n0;
154 
155 	/* Calculate baud rate. */
156 	m0 = n0 = 4;	/* Default values on reset */
157 	diff0 = 0xffffffff;
158 	clk_get_freq(sc->clk_core, &clk);
159 
160 	for (n = 0; n < 8; n++) {
161 		for (m = 0; m < 16; m++) {
162 			cur = TWSI_BAUD_RATE_RAW(clk,m,n);
163 			diff = ABSSUB(target, cur);
164 			if (diff < diff0) {
165 				m0 = m;
166 				n0 = n;
167 				diff0 = diff;
168 			}
169 		}
170 	}
171 	rate->raw = TWSI_BAUD_RATE_RAW(clk, m0, n0);
172 	rate->param = TWSI_BAUD_RATE_PARAM(m0, n0);
173 	rate->m = m0;
174 	rate->n = n0;
175 }
176 
177 static int
178 mv_twsi_attach(device_t dev)
179 {
180 	struct twsi_softc *sc;
181 	int error;
182 
183 	sc = device_get_softc(dev);
184 	sc->dev = dev;
185 
186 	/* Activate clock */
187 	error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk_core);
188 	if (error != 0) {
189 		device_printf(dev, "could not find core clock\n");
190 		return (error);
191 	}
192 	error = clk_enable(sc->clk_core);
193 	if (error != 0) {
194 		device_printf(dev, "could not enable core clock\n");
195 		return (error);
196 	}
197 
198 	if (clk_get_by_ofw_index(dev, 0, 1, &sc->clk_reg) == 0) {
199 		error = clk_enable(sc->clk_reg);
200 		if (error != 0) {
201 			device_printf(dev, "could not enable core clock\n");
202 			return (error);
203 		}
204 	}
205 
206 	mv_twsi_cal_baud_rate(sc, TWSI_BAUD_RATE_SLOW, &sc->baud_rate[IIC_SLOW]);
207 	mv_twsi_cal_baud_rate(sc, TWSI_BAUD_RATE_FAST, &sc->baud_rate[IIC_FAST]);
208 	if (bootverbose)
209 		device_printf(dev, "calculated baud rates are:\n"
210 		    " %" PRIu32 " kHz (M=%d, N=%d) for slow,\n"
211 		    " %" PRIu32 " kHz (M=%d, N=%d) for fast.\n",
212 		    sc->baud_rate[IIC_SLOW].raw / 1000,
213 		    sc->baud_rate[IIC_SLOW].m,
214 		    sc->baud_rate[IIC_SLOW].n,
215 		    sc->baud_rate[IIC_FAST].raw / 1000,
216 		    sc->baud_rate[IIC_FAST].m,
217 		    sc->baud_rate[IIC_FAST].n);
218 
219 	sc->reg_data = TWSI_DATA;
220 	sc->reg_slave_addr = TWSI_ADDR;
221 	sc->reg_slave_ext_addr = TWSI_XADDR;
222 	sc->reg_control = TWSI_CNTR;
223 	sc->reg_status = TWSI_STAT;
224 	sc->reg_baud_rate = TWSI_BAUD_RATE;
225 	sc->reg_soft_reset = TWSI_SRST;
226 
227 	return (twsi_attach(dev));
228 }
229