1*125f5c5bSEmmanuel Vadot /*- 2*125f5c5bSEmmanuel Vadot * SPDX-License-Identifier: BSD-2-Clause 3*125f5c5bSEmmanuel Vadot * 4*125f5c5bSEmmanuel Vadot * Copyright (c) 2003-2012 Broadcom Corporation 5*125f5c5bSEmmanuel Vadot * All Rights Reserved 6*125f5c5bSEmmanuel Vadot * 7*125f5c5bSEmmanuel Vadot * Redistribution and use in source and binary forms, with or without 8*125f5c5bSEmmanuel Vadot * modification, are permitted provided that the following conditions 9*125f5c5bSEmmanuel Vadot * are met: 10*125f5c5bSEmmanuel Vadot * 11*125f5c5bSEmmanuel Vadot * 1. Redistributions of source code must retain the above copyright 12*125f5c5bSEmmanuel Vadot * notice, this list of conditions and the following disclaimer. 13*125f5c5bSEmmanuel Vadot * 2. Redistributions in binary form must reproduce the above copyright 14*125f5c5bSEmmanuel Vadot * notice, this list of conditions and the following disclaimer in 15*125f5c5bSEmmanuel Vadot * the documentation and/or other materials provided with the 16*125f5c5bSEmmanuel Vadot * distribution. 17*125f5c5bSEmmanuel Vadot * 18*125f5c5bSEmmanuel Vadot * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR 19*125f5c5bSEmmanuel Vadot * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20*125f5c5bSEmmanuel Vadot * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*125f5c5bSEmmanuel Vadot * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE 22*125f5c5bSEmmanuel Vadot * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*125f5c5bSEmmanuel Vadot * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*125f5c5bSEmmanuel Vadot * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 25*125f5c5bSEmmanuel Vadot * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26*125f5c5bSEmmanuel Vadot * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 27*125f5c5bSEmmanuel Vadot * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 28*125f5c5bSEmmanuel Vadot * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29*125f5c5bSEmmanuel Vadot */ 30*125f5c5bSEmmanuel Vadot 31*125f5c5bSEmmanuel Vadot #ifndef __OPENCORE_I2C_H__ 32*125f5c5bSEmmanuel Vadot #define __OPENCORE_I2C_H__ 33*125f5c5bSEmmanuel Vadot 34*125f5c5bSEmmanuel Vadot /* I2C specific registers */ 35*125f5c5bSEmmanuel Vadot #define OC_I2C_PRESCALE_LO_REG 0x00 36*125f5c5bSEmmanuel Vadot #define OC_I2C_PRESCALE_HI_REG 0x01 37*125f5c5bSEmmanuel Vadot #define OC_I2C_CTRL_REG 0x02 38*125f5c5bSEmmanuel Vadot #define OC_I2C_TRANSMIT_REG 0x03 /* tx and rx - same reg */ 39*125f5c5bSEmmanuel Vadot #define OC_I2C_RECV_REG 0x03 /* tx and rx - same reg */ 40*125f5c5bSEmmanuel Vadot #define OC_I2C_DATA_REG 0x03 /* tx and rx - same reg */ 41*125f5c5bSEmmanuel Vadot #define OC_I2C_CMD_REG 0x04 /* cmd and status - same reg */ 42*125f5c5bSEmmanuel Vadot #define OC_I2C_STATUS_REG 0x04 /* cmd and status - same reg */ 43*125f5c5bSEmmanuel Vadot 44*125f5c5bSEmmanuel Vadot #define XLP_I2C_CLKFREQ 133333333 /* XLP 133 MHz IO clock */ 45*125f5c5bSEmmanuel Vadot #define XLP_I2C_FREQ 100000 /* default 100kHz */ 46*125f5c5bSEmmanuel Vadot #define I2C_TIMEOUT 500000 47*125f5c5bSEmmanuel Vadot 48*125f5c5bSEmmanuel Vadot /* 49*125f5c5bSEmmanuel Vadot * These defines pertain to the OpenCores 50*125f5c5bSEmmanuel Vadot * I2C Master Host Controller used in XLP 51*125f5c5bSEmmanuel Vadot */ 52*125f5c5bSEmmanuel Vadot 53*125f5c5bSEmmanuel Vadot #define OC_PRESCALER_LO 0 54*125f5c5bSEmmanuel Vadot #define OC_PRESCALER_HI 1 55*125f5c5bSEmmanuel Vadot 56*125f5c5bSEmmanuel Vadot #define OC_CONTROL 2 57*125f5c5bSEmmanuel Vadot #define OC_CONTROL_EN 0x80 58*125f5c5bSEmmanuel Vadot #define OC_CONTROL_IEN 0x40 59*125f5c5bSEmmanuel Vadot 60*125f5c5bSEmmanuel Vadot #define OC_DATA 3 /* Data TX & RX Reg */ 61*125f5c5bSEmmanuel Vadot 62*125f5c5bSEmmanuel Vadot #define OC_COMMAND 4 63*125f5c5bSEmmanuel Vadot #define OC_COMMAND_START 0x90 64*125f5c5bSEmmanuel Vadot #define OC_COMMAND_STOP 0x40 65*125f5c5bSEmmanuel Vadot #define OC_COMMAND_READ 0x20 66*125f5c5bSEmmanuel Vadot #define OC_COMMAND_WRITE 0x10 67*125f5c5bSEmmanuel Vadot #define OC_COMMAND_RDACK 0x20 68*125f5c5bSEmmanuel Vadot #define OC_COMMAND_RDNACK 0x28 69*125f5c5bSEmmanuel Vadot #define OC_COMMAND_IACK 0x01 /* Not used */ 70*125f5c5bSEmmanuel Vadot 71*125f5c5bSEmmanuel Vadot #define OC_STATUS 4 /* Same as 'command' */ 72*125f5c5bSEmmanuel Vadot #define OC_STATUS_NACK 0x80 /* Did not get an ACK */ 73*125f5c5bSEmmanuel Vadot #define OC_STATUS_BUSY 0x40 74*125f5c5bSEmmanuel Vadot #define OC_STATUS_AL 0x20 /* Arbitration Lost */ 75*125f5c5bSEmmanuel Vadot #define OC_STATUS_TIP 0x02 /* Transfer in Progress */ 76*125f5c5bSEmmanuel Vadot #define OC_STATUS_IF 0x01 /* Intr. Pending Flag */ 77*125f5c5bSEmmanuel Vadot 78*125f5c5bSEmmanuel Vadot struct iicoc_softc { 79*125f5c5bSEmmanuel Vadot device_t dev; /* Self */ 80*125f5c5bSEmmanuel Vadot u_int reg_shift; /* Chip specific */ 81*125f5c5bSEmmanuel Vadot u_int clockfreq; 82*125f5c5bSEmmanuel Vadot u_int i2cfreq; 83*125f5c5bSEmmanuel Vadot struct resource *mem_res; /* Memory resource */ 84*125f5c5bSEmmanuel Vadot int mem_rid; 85*125f5c5bSEmmanuel Vadot int sc_started; 86*125f5c5bSEmmanuel Vadot uint8_t i2cdev_addr; 87*125f5c5bSEmmanuel Vadot device_t iicbus; 88*125f5c5bSEmmanuel Vadot struct mtx sc_mtx; 89*125f5c5bSEmmanuel Vadot }; 90*125f5c5bSEmmanuel Vadot 91*125f5c5bSEmmanuel Vadot #endif 92*125f5c5bSEmmanuel Vadot 93*125f5c5bSEmmanuel Vadot int iicoc_iicbus_start(device_t dev, u_char slave, int timeout); 94*125f5c5bSEmmanuel Vadot int iicoc_iicbus_stop(device_t dev); 95*125f5c5bSEmmanuel Vadot int iicoc_iicbus_read(device_t dev, char *buf, int len, int *read, int last, 96*125f5c5bSEmmanuel Vadot int delay); 97*125f5c5bSEmmanuel Vadot int iicoc_iicbus_write(device_t dev, const char *buf, int len, int *sent, 98*125f5c5bSEmmanuel Vadot int timeout); 99*125f5c5bSEmmanuel Vadot int iicoc_iicbus_repeated_start(device_t dev, u_char slave, int timeout); 100*125f5c5bSEmmanuel Vadot int iicoc_iicbus_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr); 101*125f5c5bSEmmanuel Vadot 102*125f5c5bSEmmanuel Vadot int iicoc_init(device_t dev); 103