xref: /freebsd/sys/dev/iicbus/controller/opencores/iicoc.c (revision fdafd315ad0d0f28a11b9fb4476a9ab059c62b92)
1*125f5c5bSEmmanuel Vadot /*-
2*125f5c5bSEmmanuel Vadot  * SPDX-License-Identifier: BSD-2-Clause
3*125f5c5bSEmmanuel Vadot  *
4*125f5c5bSEmmanuel Vadot  * Copyright (c) 2003-2012 Broadcom Corporation
5*125f5c5bSEmmanuel Vadot  * All Rights Reserved
6*125f5c5bSEmmanuel Vadot  *
7*125f5c5bSEmmanuel Vadot  * Redistribution and use in source and binary forms, with or without
8*125f5c5bSEmmanuel Vadot  * modification, are permitted provided that the following conditions
9*125f5c5bSEmmanuel Vadot  * are met:
10*125f5c5bSEmmanuel Vadot  *
11*125f5c5bSEmmanuel Vadot  * 1. Redistributions of source code must retain the above copyright
12*125f5c5bSEmmanuel Vadot  *    notice, this list of conditions and the following disclaimer.
13*125f5c5bSEmmanuel Vadot  * 2. Redistributions in binary form must reproduce the above copyright
14*125f5c5bSEmmanuel Vadot  *    notice, this list of conditions and the following disclaimer in
15*125f5c5bSEmmanuel Vadot  *    the documentation and/or other materials provided with the
16*125f5c5bSEmmanuel Vadot  *    distribution.
17*125f5c5bSEmmanuel Vadot  *
18*125f5c5bSEmmanuel Vadot  * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
19*125f5c5bSEmmanuel Vadot  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20*125f5c5bSEmmanuel Vadot  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*125f5c5bSEmmanuel Vadot  * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
22*125f5c5bSEmmanuel Vadot  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*125f5c5bSEmmanuel Vadot  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*125f5c5bSEmmanuel Vadot  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
25*125f5c5bSEmmanuel Vadot  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
26*125f5c5bSEmmanuel Vadot  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
27*125f5c5bSEmmanuel Vadot  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
28*125f5c5bSEmmanuel Vadot  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29*125f5c5bSEmmanuel Vadot  */
30*125f5c5bSEmmanuel Vadot 
31*125f5c5bSEmmanuel Vadot #include <sys/param.h>
32*125f5c5bSEmmanuel Vadot #include <sys/systm.h>
33*125f5c5bSEmmanuel Vadot #include <sys/bus.h>
34*125f5c5bSEmmanuel Vadot #include <sys/kernel.h>
35*125f5c5bSEmmanuel Vadot #include <sys/lock.h>
36*125f5c5bSEmmanuel Vadot #include <sys/module.h>
37*125f5c5bSEmmanuel Vadot #include <sys/mutex.h>
38*125f5c5bSEmmanuel Vadot #include <sys/rman.h>
39*125f5c5bSEmmanuel Vadot 
40*125f5c5bSEmmanuel Vadot #include <machine/bus.h>
41*125f5c5bSEmmanuel Vadot 
42*125f5c5bSEmmanuel Vadot #include <dev/iicbus/iicbus.h>
43*125f5c5bSEmmanuel Vadot #include <dev/iicbus/iiconf.h>
44*125f5c5bSEmmanuel Vadot 
45*125f5c5bSEmmanuel Vadot #include "iicbus_if.h"
46*125f5c5bSEmmanuel Vadot #include "iicoc.h"
47*125f5c5bSEmmanuel Vadot 
48*125f5c5bSEmmanuel Vadot DRIVER_MODULE(iicbus, iicoc, iicbus_driver, 0, 0);
49*125f5c5bSEmmanuel Vadot 
50*125f5c5bSEmmanuel Vadot static void
iicoc_dev_write(device_t dev,int reg,int value)51*125f5c5bSEmmanuel Vadot iicoc_dev_write(device_t dev, int reg, int value)
52*125f5c5bSEmmanuel Vadot {
53*125f5c5bSEmmanuel Vadot 	struct iicoc_softc *sc;
54*125f5c5bSEmmanuel Vadot 
55*125f5c5bSEmmanuel Vadot 	sc = device_get_softc(dev);
56*125f5c5bSEmmanuel Vadot 	bus_write_1(sc->mem_res, reg<<sc->reg_shift, value);
57*125f5c5bSEmmanuel Vadot }
58*125f5c5bSEmmanuel Vadot 
59*125f5c5bSEmmanuel Vadot static int
iicoc_dev_read(device_t dev,int reg)60*125f5c5bSEmmanuel Vadot iicoc_dev_read(device_t dev, int reg)
61*125f5c5bSEmmanuel Vadot {
62*125f5c5bSEmmanuel Vadot 	uint8_t val;
63*125f5c5bSEmmanuel Vadot 	struct iicoc_softc *sc;
64*125f5c5bSEmmanuel Vadot 
65*125f5c5bSEmmanuel Vadot 	sc = device_get_softc(dev);
66*125f5c5bSEmmanuel Vadot 	val = bus_read_1(sc->mem_res, reg<<sc->reg_shift);
67*125f5c5bSEmmanuel Vadot 	return (val);
68*125f5c5bSEmmanuel Vadot }
69*125f5c5bSEmmanuel Vadot 
70*125f5c5bSEmmanuel Vadot static int
iicoc_wait_on_status(device_t dev,uint8_t bit)71*125f5c5bSEmmanuel Vadot iicoc_wait_on_status(device_t dev, uint8_t bit)
72*125f5c5bSEmmanuel Vadot {
73*125f5c5bSEmmanuel Vadot 	int tries = I2C_TIMEOUT;
74*125f5c5bSEmmanuel Vadot 	uint8_t status;
75*125f5c5bSEmmanuel Vadot 
76*125f5c5bSEmmanuel Vadot 	do {
77*125f5c5bSEmmanuel Vadot 		status = iicoc_dev_read(dev, OC_I2C_STATUS_REG);
78*125f5c5bSEmmanuel Vadot 	} while ((status & bit) != 0 && --tries > 0);
79*125f5c5bSEmmanuel Vadot 
80*125f5c5bSEmmanuel Vadot 	return (tries == 0 ? -1: 0);
81*125f5c5bSEmmanuel Vadot }
82*125f5c5bSEmmanuel Vadot 
83*125f5c5bSEmmanuel Vadot static int
iicoc_rd_cmd(device_t dev,uint8_t cmd)84*125f5c5bSEmmanuel Vadot iicoc_rd_cmd(device_t dev, uint8_t cmd)
85*125f5c5bSEmmanuel Vadot {
86*125f5c5bSEmmanuel Vadot 	uint8_t data;
87*125f5c5bSEmmanuel Vadot 
88*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_CMD_REG, cmd);
89*125f5c5bSEmmanuel Vadot 	if (iicoc_wait_on_status(dev, OC_STATUS_TIP) < 0) {
90*125f5c5bSEmmanuel Vadot 		device_printf(dev, "read: Timeout waiting for TIP clear.\n");
91*125f5c5bSEmmanuel Vadot 		return (-1);
92*125f5c5bSEmmanuel Vadot 	}
93*125f5c5bSEmmanuel Vadot 	data = iicoc_dev_read(dev, OC_I2C_DATA_REG);
94*125f5c5bSEmmanuel Vadot 	return (data);
95*125f5c5bSEmmanuel Vadot }
96*125f5c5bSEmmanuel Vadot 
97*125f5c5bSEmmanuel Vadot static int
iicoc_wr_cmd(device_t dev,uint8_t data,uint8_t cmd)98*125f5c5bSEmmanuel Vadot iicoc_wr_cmd(device_t dev, uint8_t data, uint8_t cmd)
99*125f5c5bSEmmanuel Vadot {
100*125f5c5bSEmmanuel Vadot 
101*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_DATA_REG, data);
102*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_CMD_REG, cmd);
103*125f5c5bSEmmanuel Vadot 	if (iicoc_wait_on_status(dev, OC_STATUS_TIP) < 0) {
104*125f5c5bSEmmanuel Vadot 		device_printf(dev, "write: Timeout waiting for TIP clear.\n");
105*125f5c5bSEmmanuel Vadot 		return (-1);
106*125f5c5bSEmmanuel Vadot 	}
107*125f5c5bSEmmanuel Vadot 	return (0);
108*125f5c5bSEmmanuel Vadot }
109*125f5c5bSEmmanuel Vadot 
110*125f5c5bSEmmanuel Vadot static int
iicoc_wr_ack_cmd(device_t dev,uint8_t data,uint8_t cmd)111*125f5c5bSEmmanuel Vadot iicoc_wr_ack_cmd(device_t dev, uint8_t data, uint8_t cmd)
112*125f5c5bSEmmanuel Vadot {
113*125f5c5bSEmmanuel Vadot 
114*125f5c5bSEmmanuel Vadot 	if (iicoc_wr_cmd(dev, data, cmd) < 0)
115*125f5c5bSEmmanuel Vadot 		return (-1);
116*125f5c5bSEmmanuel Vadot 
117*125f5c5bSEmmanuel Vadot 	if (iicoc_dev_read(dev, OC_I2C_STATUS_REG) & OC_STATUS_NACK) {
118*125f5c5bSEmmanuel Vadot 		device_printf(dev, "write: I2C command ACK Error.\n");
119*125f5c5bSEmmanuel Vadot 		return (IIC_ENOACK);
120*125f5c5bSEmmanuel Vadot 	}
121*125f5c5bSEmmanuel Vadot 	return (0);
122*125f5c5bSEmmanuel Vadot }
123*125f5c5bSEmmanuel Vadot 
124*125f5c5bSEmmanuel Vadot int
iicoc_init(device_t dev)125*125f5c5bSEmmanuel Vadot iicoc_init(device_t dev)
126*125f5c5bSEmmanuel Vadot {
127*125f5c5bSEmmanuel Vadot 	struct iicoc_softc *sc;
128*125f5c5bSEmmanuel Vadot 	int value;
129*125f5c5bSEmmanuel Vadot 
130*125f5c5bSEmmanuel Vadot 	sc = device_get_softc(dev);
131*125f5c5bSEmmanuel Vadot 	value = iicoc_dev_read(dev, OC_I2C_CTRL_REG);
132*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_CTRL_REG,
133*125f5c5bSEmmanuel Vadot 	    value & ~(OC_CONTROL_EN | OC_CONTROL_IEN));
134*125f5c5bSEmmanuel Vadot 	value = (sc->clockfreq/(5 * sc->i2cfreq)) - 1;
135*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_PRESCALE_LO_REG, value & 0xff);
136*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_PRESCALE_HI_REG, value >> 8);
137*125f5c5bSEmmanuel Vadot 	value = iicoc_dev_read(dev, OC_I2C_CTRL_REG);
138*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_CTRL_REG, value | OC_CONTROL_EN);
139*125f5c5bSEmmanuel Vadot 
140*125f5c5bSEmmanuel Vadot 	value = iicoc_dev_read(dev, OC_I2C_CTRL_REG);
141*125f5c5bSEmmanuel Vadot 	/* return 0 on success, 1 on error */
142*125f5c5bSEmmanuel Vadot 	return ((value & OC_CONTROL_EN) == 0);
143*125f5c5bSEmmanuel Vadot }
144*125f5c5bSEmmanuel Vadot 
145*125f5c5bSEmmanuel Vadot static int
iicoc_iicbus_start_common(device_t dev,u_char slave,int timeout,bool repeat)146*125f5c5bSEmmanuel Vadot iicoc_iicbus_start_common(device_t dev, u_char slave, int timeout, bool repeat)
147*125f5c5bSEmmanuel Vadot {
148*125f5c5bSEmmanuel Vadot 	int error = IIC_EBUSERR;
149*125f5c5bSEmmanuel Vadot 	struct iicoc_softc *sc;
150*125f5c5bSEmmanuel Vadot 
151*125f5c5bSEmmanuel Vadot 	sc = device_get_softc(dev);
152*125f5c5bSEmmanuel Vadot 	mtx_lock(&sc->sc_mtx);
153*125f5c5bSEmmanuel Vadot 	sc->i2cdev_addr = (slave >> 1);
154*125f5c5bSEmmanuel Vadot 
155*125f5c5bSEmmanuel Vadot 	/* Verify the bus is idle */
156*125f5c5bSEmmanuel Vadot 	if (!repeat && iicoc_wait_on_status(dev, OC_STATUS_BUSY) < 0)
157*125f5c5bSEmmanuel Vadot 		goto i2c_stx_error;
158*125f5c5bSEmmanuel Vadot 
159*125f5c5bSEmmanuel Vadot 	/* Write Slave Address */
160*125f5c5bSEmmanuel Vadot 	if (iicoc_wr_ack_cmd(dev, slave, OC_COMMAND_START)) {
161*125f5c5bSEmmanuel Vadot 		device_printf(dev,
162*125f5c5bSEmmanuel Vadot 		    "I2C write slave address [0x%x] failed.\n", slave);
163*125f5c5bSEmmanuel Vadot 		error = IIC_ENOACK;
164*125f5c5bSEmmanuel Vadot 		goto i2c_stx_error;
165*125f5c5bSEmmanuel Vadot 	}
166*125f5c5bSEmmanuel Vadot 
167*125f5c5bSEmmanuel Vadot 	/* Verify Arbitration is not Lost */
168*125f5c5bSEmmanuel Vadot 	if (iicoc_dev_read(dev, OC_I2C_STATUS_REG) & OC_STATUS_AL) {
169*125f5c5bSEmmanuel Vadot 		device_printf(dev, "I2C Bus Arbitration Lost, Aborting.\n");
170*125f5c5bSEmmanuel Vadot 		error = IIC_EBUSERR;
171*125f5c5bSEmmanuel Vadot 		goto i2c_stx_error;
172*125f5c5bSEmmanuel Vadot 	}
173*125f5c5bSEmmanuel Vadot 	error = IIC_NOERR;
174*125f5c5bSEmmanuel Vadot 	mtx_unlock(&sc->sc_mtx);
175*125f5c5bSEmmanuel Vadot 	return (error);
176*125f5c5bSEmmanuel Vadot 
177*125f5c5bSEmmanuel Vadot i2c_stx_error:
178*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_CMD_REG, OC_COMMAND_STOP);
179*125f5c5bSEmmanuel Vadot 	iicoc_wait_on_status(dev, OC_STATUS_BUSY);  /* wait for idle */
180*125f5c5bSEmmanuel Vadot 	mtx_unlock(&sc->sc_mtx);
181*125f5c5bSEmmanuel Vadot 	return (error);
182*125f5c5bSEmmanuel Vadot }
183*125f5c5bSEmmanuel Vadot 
184*125f5c5bSEmmanuel Vadot int
iicoc_iicbus_start(device_t dev,u_char slave,int timeout)185*125f5c5bSEmmanuel Vadot iicoc_iicbus_start(device_t dev, u_char slave, int timeout)
186*125f5c5bSEmmanuel Vadot {
187*125f5c5bSEmmanuel Vadot 
188*125f5c5bSEmmanuel Vadot 	return (iicoc_iicbus_start_common(dev, slave, timeout, false));
189*125f5c5bSEmmanuel Vadot }
190*125f5c5bSEmmanuel Vadot 
191*125f5c5bSEmmanuel Vadot int
iicoc_iicbus_repeated_start(device_t dev,u_char slave,int timeout)192*125f5c5bSEmmanuel Vadot iicoc_iicbus_repeated_start(device_t dev, u_char slave, int timeout)
193*125f5c5bSEmmanuel Vadot {
194*125f5c5bSEmmanuel Vadot 
195*125f5c5bSEmmanuel Vadot 	return (iicoc_iicbus_start_common(dev, slave, timeout, true));
196*125f5c5bSEmmanuel Vadot }
197*125f5c5bSEmmanuel Vadot 
198*125f5c5bSEmmanuel Vadot int
iicoc_iicbus_stop(device_t dev)199*125f5c5bSEmmanuel Vadot iicoc_iicbus_stop(device_t dev)
200*125f5c5bSEmmanuel Vadot {
201*125f5c5bSEmmanuel Vadot 	int error = 0;
202*125f5c5bSEmmanuel Vadot 	struct iicoc_softc *sc;
203*125f5c5bSEmmanuel Vadot 
204*125f5c5bSEmmanuel Vadot 	sc = device_get_softc(dev);
205*125f5c5bSEmmanuel Vadot 	mtx_lock(&sc->sc_mtx);
206*125f5c5bSEmmanuel Vadot 	iicoc_dev_write(dev, OC_I2C_CMD_REG, OC_COMMAND_STOP);
207*125f5c5bSEmmanuel Vadot 	iicoc_wait_on_status(dev, OC_STATUS_BUSY);  /* wait for idle */
208*125f5c5bSEmmanuel Vadot 	mtx_unlock(&sc->sc_mtx);
209*125f5c5bSEmmanuel Vadot 	return (error);
210*125f5c5bSEmmanuel Vadot }
211*125f5c5bSEmmanuel Vadot 
212*125f5c5bSEmmanuel Vadot int
iicoc_iicbus_write(device_t dev,const char * buf,int len,int * sent,int timeout)213*125f5c5bSEmmanuel Vadot iicoc_iicbus_write(device_t dev, const char *buf, int len, int *sent,
214*125f5c5bSEmmanuel Vadot     int timeout)
215*125f5c5bSEmmanuel Vadot {
216*125f5c5bSEmmanuel Vadot 	uint8_t value;
217*125f5c5bSEmmanuel Vadot 	int i;
218*125f5c5bSEmmanuel Vadot 
219*125f5c5bSEmmanuel Vadot 	value = buf[0];
220*125f5c5bSEmmanuel Vadot 	/* Write Slave Offset */
221*125f5c5bSEmmanuel Vadot 	if (iicoc_wr_ack_cmd(dev, value, OC_COMMAND_WRITE)) {
222*125f5c5bSEmmanuel Vadot 		device_printf(dev, "I2C write slave offset failed.\n");
223*125f5c5bSEmmanuel Vadot 		goto i2c_tx_error;
224*125f5c5bSEmmanuel Vadot 	}
225*125f5c5bSEmmanuel Vadot 
226*125f5c5bSEmmanuel Vadot 	for (i = 1; i < len; i++) {
227*125f5c5bSEmmanuel Vadot 		/* Write data byte */
228*125f5c5bSEmmanuel Vadot 		value = buf[i];
229*125f5c5bSEmmanuel Vadot 		if (iicoc_wr_cmd(dev, value, OC_COMMAND_WRITE)) {
230*125f5c5bSEmmanuel Vadot 			device_printf(dev, "I2C write data byte %d failed.\n",
231*125f5c5bSEmmanuel Vadot 			    i);
232*125f5c5bSEmmanuel Vadot 			goto i2c_tx_error;
233*125f5c5bSEmmanuel Vadot 		}
234*125f5c5bSEmmanuel Vadot 	}
235*125f5c5bSEmmanuel Vadot 	*sent = len;
236*125f5c5bSEmmanuel Vadot 	return (IIC_NOERR);
237*125f5c5bSEmmanuel Vadot 
238*125f5c5bSEmmanuel Vadot i2c_tx_error:
239*125f5c5bSEmmanuel Vadot 	return (IIC_EBUSERR);
240*125f5c5bSEmmanuel Vadot }
241*125f5c5bSEmmanuel Vadot 
242*125f5c5bSEmmanuel Vadot int
iicoc_iicbus_read(device_t dev,char * buf,int len,int * read,int last,int delay)243*125f5c5bSEmmanuel Vadot iicoc_iicbus_read(device_t dev, char *buf, int len, int *read, int last,
244*125f5c5bSEmmanuel Vadot     int delay)
245*125f5c5bSEmmanuel Vadot {
246*125f5c5bSEmmanuel Vadot 	int data, i;
247*125f5c5bSEmmanuel Vadot 	uint8_t cmd;
248*125f5c5bSEmmanuel Vadot 
249*125f5c5bSEmmanuel Vadot 	for (i = 0; i < len; i++) {
250*125f5c5bSEmmanuel Vadot 		/* Read data byte */
251*125f5c5bSEmmanuel Vadot 		cmd = (i == len - 1) ? OC_COMMAND_RDNACK : OC_COMMAND_READ;
252*125f5c5bSEmmanuel Vadot 		data = iicoc_rd_cmd(dev, cmd);
253*125f5c5bSEmmanuel Vadot 		if (data < 0) {
254*125f5c5bSEmmanuel Vadot 			device_printf(dev,
255*125f5c5bSEmmanuel Vadot 			    "I2C read data byte %d failed.\n", i);
256*125f5c5bSEmmanuel Vadot 			goto i2c_rx_error;
257*125f5c5bSEmmanuel Vadot 		}
258*125f5c5bSEmmanuel Vadot 		buf[i] = (uint8_t)data;
259*125f5c5bSEmmanuel Vadot 	}
260*125f5c5bSEmmanuel Vadot 
261*125f5c5bSEmmanuel Vadot 	*read = len;
262*125f5c5bSEmmanuel Vadot 	return (IIC_NOERR);
263*125f5c5bSEmmanuel Vadot 
264*125f5c5bSEmmanuel Vadot i2c_rx_error:
265*125f5c5bSEmmanuel Vadot 	return (IIC_EBUSERR);
266*125f5c5bSEmmanuel Vadot }
267*125f5c5bSEmmanuel Vadot 
268*125f5c5bSEmmanuel Vadot int
iicoc_iicbus_reset(device_t dev,u_char speed,u_char addr,u_char * oldadr)269*125f5c5bSEmmanuel Vadot iicoc_iicbus_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr)
270*125f5c5bSEmmanuel Vadot {
271*125f5c5bSEmmanuel Vadot 	int error;
272*125f5c5bSEmmanuel Vadot 	struct iicoc_softc *sc;
273*125f5c5bSEmmanuel Vadot 
274*125f5c5bSEmmanuel Vadot 	sc = device_get_softc(dev);
275*125f5c5bSEmmanuel Vadot 	mtx_lock(&sc->sc_mtx);
276*125f5c5bSEmmanuel Vadot 	error = iicoc_init(dev);
277*125f5c5bSEmmanuel Vadot 	mtx_unlock(&sc->sc_mtx);
278*125f5c5bSEmmanuel Vadot 	return (error);
279*125f5c5bSEmmanuel Vadot }
280