xref: /freebsd/sys/dev/igc/igc_osdep.h (revision ebacd8013fe5f7fdf9f6a5b286f6680dd2891036)
1 /*-
2  * Copyright 2021 Intel Corp
3  * Copyright 2021 Rubicon Communications, LLC (Netgate)
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * $FreeBSD$
7  */
8 
9 #ifndef _FREEBSD_OS_H_
10 #define _FREEBSD_OS_H_
11 
12 #include <sys/types.h>
13 #include <sys/param.h>
14 #include <sys/systm.h>
15 #include <sys/lock.h>
16 #include <sys/mutex.h>
17 #include <sys/mbuf.h>
18 #include <sys/protosw.h>
19 #include <sys/socket.h>
20 #include <sys/malloc.h>
21 #include <sys/kernel.h>
22 #include <sys/bus.h>
23 
24 #include <net/ethernet.h>
25 #include <net/if.h>
26 #include <net/if_var.h>
27 #include <net/iflib.h>
28 
29 #include <machine/bus.h>
30 #include <sys/rman.h>
31 #include <machine/resource.h>
32 #include <vm/vm.h>
33 #include <vm/pmap.h>
34 #include <machine/clock.h>
35 #include <dev/pci/pcivar.h>
36 #include <dev/pci/pcireg.h>
37 
38 #define usec_delay(x) DELAY(x)
39 #define usec_delay_irq(x) usec_delay(x)
40 #define msec_delay(x) DELAY(1000*(x))
41 #define msec_delay_irq(x) DELAY(1000*(x))
42 
43 /* Enable/disable debugging statements in shared code */
44 #define DBG		0
45 
46 #define DEBUGOUT(...) \
47     do { if (DBG) printf(__VA_ARGS__); } while (0)
48 #define DEBUGOUT1(...)			DEBUGOUT(__VA_ARGS__)
49 #define DEBUGOUT2(...)			DEBUGOUT(__VA_ARGS__)
50 #define DEBUGOUT3(...)			DEBUGOUT(__VA_ARGS__)
51 #define DEBUGOUT7(...)			DEBUGOUT(__VA_ARGS__)
52 #define DEBUGFUNC(F)			DEBUGOUT(F "\n")
53 
54 typedef uint64_t	u64;
55 typedef uint32_t	u32;
56 typedef uint16_t	u16;
57 typedef uint8_t		u8;
58 typedef int64_t		s64;
59 typedef int32_t		s32;
60 typedef int16_t		s16;
61 typedef int8_t		s8;
62 
63 #define __le16		u16
64 #define __le32		u32
65 #define __le64		u64
66 
67 struct igc_osdep
68 {
69 	bus_space_tag_t    mem_bus_space_tag;
70 	bus_space_handle_t mem_bus_space_handle;
71 	bus_space_tag_t    io_bus_space_tag;
72 	bus_space_handle_t io_bus_space_handle;
73 	bus_space_tag_t    flash_bus_space_tag;
74 	bus_space_handle_t flash_bus_space_handle;
75 	device_t           dev;
76 	if_ctx_t           ctx;
77 };
78 
79 #define IGC_REGISTER(hw, reg) reg
80 
81 #define IGC_WRITE_FLUSH(a) IGC_READ_REG(a, IGC_STATUS)
82 
83 /* Read from an absolute offset in the adapter's memory space */
84 #define IGC_READ_OFFSET(hw, offset) \
85     bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
86     ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, offset)
87 
88 /* Write to an absolute offset in the adapter's memory space */
89 #define IGC_WRITE_OFFSET(hw, offset, value) \
90     bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
91     ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)
92 
93 /* Register READ/WRITE macros */
94 
95 #define IGC_READ_REG(hw, reg) \
96     bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
97         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
98         IGC_REGISTER(hw, reg))
99 
100 #define IGC_WRITE_REG(hw, reg, value) \
101     bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
102         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
103         IGC_REGISTER(hw, reg), value)
104 
105 #define IGC_READ_REG_ARRAY(hw, reg, index) \
106     bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
107         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
108         IGC_REGISTER(hw, reg) + ((index)<< 2))
109 
110 #define IGC_WRITE_REG_ARRAY(hw, reg, index, value) \
111     bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
112         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
113         IGC_REGISTER(hw, reg) + ((index)<< 2), value)
114 
115 #define IGC_READ_REG_ARRAY_DWORD IGC_READ_REG_ARRAY
116 #define IGC_WRITE_REG_ARRAY_DWORD IGC_WRITE_REG_ARRAY
117 
118 #define IGC_READ_REG_ARRAY_BYTE(hw, reg, index) \
119     bus_space_read_1(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
120         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
121         IGC_REGISTER(hw, reg) + index)
122 
123 #define IGC_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \
124     bus_space_write_1(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
125         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
126         IGC_REGISTER(hw, reg) + index, value)
127 
128 #define IGC_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \
129     bus_space_write_2(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
130         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
131         IGC_REGISTER(hw, reg) + (index << 1), value)
132 
133 #endif  /* _FREEBSD_OS_H_ */
134