xref: /freebsd/sys/dev/igc/igc_osdep.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1*517904deSPeter Grehan /*-
2*517904deSPeter Grehan  * Copyright 2021 Intel Corp
3*517904deSPeter Grehan  * Copyright 2021 Rubicon Communications, LLC (Netgate)
4*517904deSPeter Grehan  * SPDX-License-Identifier: BSD-3-Clause
5*517904deSPeter Grehan  */
6*517904deSPeter Grehan 
7*517904deSPeter Grehan #ifndef _FREEBSD_OS_H_
8*517904deSPeter Grehan #define _FREEBSD_OS_H_
9*517904deSPeter Grehan 
10*517904deSPeter Grehan #include <sys/types.h>
11*517904deSPeter Grehan #include <sys/param.h>
12*517904deSPeter Grehan #include <sys/systm.h>
13*517904deSPeter Grehan #include <sys/lock.h>
14*517904deSPeter Grehan #include <sys/mutex.h>
15*517904deSPeter Grehan #include <sys/mbuf.h>
16*517904deSPeter Grehan #include <sys/protosw.h>
17*517904deSPeter Grehan #include <sys/socket.h>
18*517904deSPeter Grehan #include <sys/malloc.h>
19*517904deSPeter Grehan #include <sys/kernel.h>
20*517904deSPeter Grehan #include <sys/bus.h>
21*517904deSPeter Grehan 
22*517904deSPeter Grehan #include <net/ethernet.h>
23*517904deSPeter Grehan #include <net/if.h>
24*517904deSPeter Grehan #include <net/if_var.h>
25*517904deSPeter Grehan #include <net/iflib.h>
26*517904deSPeter Grehan 
27*517904deSPeter Grehan #include <machine/bus.h>
28*517904deSPeter Grehan #include <sys/rman.h>
29*517904deSPeter Grehan #include <machine/resource.h>
30*517904deSPeter Grehan #include <vm/vm.h>
31*517904deSPeter Grehan #include <vm/pmap.h>
32*517904deSPeter Grehan #include <machine/clock.h>
33*517904deSPeter Grehan #include <dev/pci/pcivar.h>
34*517904deSPeter Grehan #include <dev/pci/pcireg.h>
35*517904deSPeter Grehan 
36*517904deSPeter Grehan #define usec_delay(x) DELAY(x)
37*517904deSPeter Grehan #define usec_delay_irq(x) usec_delay(x)
38*517904deSPeter Grehan #define msec_delay(x) DELAY(1000*(x))
39*517904deSPeter Grehan #define msec_delay_irq(x) DELAY(1000*(x))
40*517904deSPeter Grehan 
41*517904deSPeter Grehan /* Enable/disable debugging statements in shared code */
42*517904deSPeter Grehan #define DBG		0
43*517904deSPeter Grehan 
44*517904deSPeter Grehan #define DEBUGOUT(...) \
45*517904deSPeter Grehan     do { if (DBG) printf(__VA_ARGS__); } while (0)
46*517904deSPeter Grehan #define DEBUGOUT1(...)			DEBUGOUT(__VA_ARGS__)
47*517904deSPeter Grehan #define DEBUGOUT2(...)			DEBUGOUT(__VA_ARGS__)
48*517904deSPeter Grehan #define DEBUGOUT3(...)			DEBUGOUT(__VA_ARGS__)
49*517904deSPeter Grehan #define DEBUGOUT7(...)			DEBUGOUT(__VA_ARGS__)
50*517904deSPeter Grehan #define DEBUGFUNC(F)			DEBUGOUT(F "\n")
51*517904deSPeter Grehan 
52*517904deSPeter Grehan typedef uint64_t	u64;
53*517904deSPeter Grehan typedef uint32_t	u32;
54*517904deSPeter Grehan typedef uint16_t	u16;
55*517904deSPeter Grehan typedef uint8_t		u8;
56*517904deSPeter Grehan typedef int64_t		s64;
57*517904deSPeter Grehan typedef int32_t		s32;
58*517904deSPeter Grehan typedef int16_t		s16;
59*517904deSPeter Grehan typedef int8_t		s8;
60*517904deSPeter Grehan 
61*517904deSPeter Grehan #define __le16		u16
62*517904deSPeter Grehan #define __le32		u32
63*517904deSPeter Grehan #define __le64		u64
64*517904deSPeter Grehan 
65*517904deSPeter Grehan struct igc_osdep
66*517904deSPeter Grehan {
67*517904deSPeter Grehan 	bus_space_tag_t    mem_bus_space_tag;
68*517904deSPeter Grehan 	bus_space_handle_t mem_bus_space_handle;
69*517904deSPeter Grehan 	bus_space_tag_t    io_bus_space_tag;
70*517904deSPeter Grehan 	bus_space_handle_t io_bus_space_handle;
71*517904deSPeter Grehan 	bus_space_tag_t    flash_bus_space_tag;
72*517904deSPeter Grehan 	bus_space_handle_t flash_bus_space_handle;
73*517904deSPeter Grehan 	device_t           dev;
74*517904deSPeter Grehan 	if_ctx_t           ctx;
75*517904deSPeter Grehan };
76*517904deSPeter Grehan 
77*517904deSPeter Grehan #define IGC_REGISTER(hw, reg) reg
78*517904deSPeter Grehan 
79*517904deSPeter Grehan #define IGC_WRITE_FLUSH(a) IGC_READ_REG(a, IGC_STATUS)
80*517904deSPeter Grehan 
81*517904deSPeter Grehan /* Read from an absolute offset in the adapter's memory space */
82*517904deSPeter Grehan #define IGC_READ_OFFSET(hw, offset) \
83*517904deSPeter Grehan     bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
84*517904deSPeter Grehan     ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, offset)
85*517904deSPeter Grehan 
86*517904deSPeter Grehan /* Write to an absolute offset in the adapter's memory space */
87*517904deSPeter Grehan #define IGC_WRITE_OFFSET(hw, offset, value) \
88*517904deSPeter Grehan     bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
89*517904deSPeter Grehan     ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)
90*517904deSPeter Grehan 
91*517904deSPeter Grehan /* Register READ/WRITE macros */
92*517904deSPeter Grehan 
93*517904deSPeter Grehan #define IGC_READ_REG(hw, reg) \
94*517904deSPeter Grehan     bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
95*517904deSPeter Grehan         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
96*517904deSPeter Grehan         IGC_REGISTER(hw, reg))
97*517904deSPeter Grehan 
98*517904deSPeter Grehan #define IGC_WRITE_REG(hw, reg, value) \
99*517904deSPeter Grehan     bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
100*517904deSPeter Grehan         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
101*517904deSPeter Grehan         IGC_REGISTER(hw, reg), value)
102*517904deSPeter Grehan 
103*517904deSPeter Grehan #define IGC_READ_REG_ARRAY(hw, reg, index) \
104*517904deSPeter Grehan     bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
105*517904deSPeter Grehan         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
106*517904deSPeter Grehan         IGC_REGISTER(hw, reg) + ((index)<< 2))
107*517904deSPeter Grehan 
108*517904deSPeter Grehan #define IGC_WRITE_REG_ARRAY(hw, reg, index, value) \
109*517904deSPeter Grehan     bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
110*517904deSPeter Grehan         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
111*517904deSPeter Grehan         IGC_REGISTER(hw, reg) + ((index)<< 2), value)
112*517904deSPeter Grehan 
113*517904deSPeter Grehan #define IGC_READ_REG_ARRAY_DWORD IGC_READ_REG_ARRAY
114*517904deSPeter Grehan #define IGC_WRITE_REG_ARRAY_DWORD IGC_WRITE_REG_ARRAY
115*517904deSPeter Grehan 
116*517904deSPeter Grehan #define IGC_READ_REG_ARRAY_BYTE(hw, reg, index) \
117*517904deSPeter Grehan     bus_space_read_1(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
118*517904deSPeter Grehan         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
119*517904deSPeter Grehan         IGC_REGISTER(hw, reg) + index)
120*517904deSPeter Grehan 
121*517904deSPeter Grehan #define IGC_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \
122*517904deSPeter Grehan     bus_space_write_1(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
123*517904deSPeter Grehan         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
124*517904deSPeter Grehan         IGC_REGISTER(hw, reg) + index, value)
125*517904deSPeter Grehan 
126*517904deSPeter Grehan #define IGC_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \
127*517904deSPeter Grehan     bus_space_write_2(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \
128*517904deSPeter Grehan         ((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \
129*517904deSPeter Grehan         IGC_REGISTER(hw, reg) + (index << 1), value)
130*517904deSPeter Grehan 
131*517904deSPeter Grehan #endif  /* _FREEBSD_OS_H_ */
132