1*517904deSPeter Grehan /*- 2*517904deSPeter Grehan * Copyright 2021 Intel Corp 3*517904deSPeter Grehan * Copyright 2021 Rubicon Communications, LLC (Netgate) 4*517904deSPeter Grehan * SPDX-License-Identifier: BSD-3-Clause 5*517904deSPeter Grehan */ 6*517904deSPeter Grehan 7*517904deSPeter Grehan #ifndef _IGC_API_H_ 8*517904deSPeter Grehan #define _IGC_API_H_ 9*517904deSPeter Grehan 10*517904deSPeter Grehan #include "igc_hw.h" 11*517904deSPeter Grehan 12*517904deSPeter Grehan extern void igc_init_function_pointers_i225(struct igc_hw *hw); 13*517904deSPeter Grehan 14*517904deSPeter Grehan s32 igc_set_mac_type(struct igc_hw *hw); 15*517904deSPeter Grehan s32 igc_setup_init_funcs(struct igc_hw *hw, bool init_device); 16*517904deSPeter Grehan s32 igc_init_mac_params(struct igc_hw *hw); 17*517904deSPeter Grehan s32 igc_init_nvm_params(struct igc_hw *hw); 18*517904deSPeter Grehan s32 igc_init_phy_params(struct igc_hw *hw); 19*517904deSPeter Grehan s32 igc_get_bus_info(struct igc_hw *hw); 20*517904deSPeter Grehan void igc_clear_vfta(struct igc_hw *hw); 21*517904deSPeter Grehan void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value); 22*517904deSPeter Grehan s32 igc_force_mac_fc(struct igc_hw *hw); 23*517904deSPeter Grehan s32 igc_check_for_link(struct igc_hw *hw); 24*517904deSPeter Grehan s32 igc_reset_hw(struct igc_hw *hw); 25*517904deSPeter Grehan s32 igc_init_hw(struct igc_hw *hw); 26*517904deSPeter Grehan s32 igc_setup_link(struct igc_hw *hw); 27*517904deSPeter Grehan s32 igc_get_speed_and_duplex(struct igc_hw *hw, u16 *speed, u16 *duplex); 28*517904deSPeter Grehan s32 igc_disable_pcie_master(struct igc_hw *hw); 29*517904deSPeter Grehan void igc_config_collision_dist(struct igc_hw *hw); 30*517904deSPeter Grehan int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index); 31*517904deSPeter Grehan u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr); 32*517904deSPeter Grehan void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list, 33*517904deSPeter Grehan u32 mc_addr_count); 34*517904deSPeter Grehan s32 igc_check_reset_block(struct igc_hw *hw); 35*517904deSPeter Grehan s32 igc_get_cable_length(struct igc_hw *hw); 36*517904deSPeter Grehan s32 igc_validate_mdi_setting(struct igc_hw *hw); 37*517904deSPeter Grehan s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data); 38*517904deSPeter Grehan s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data); 39*517904deSPeter Grehan s32 igc_get_phy_info(struct igc_hw *hw); 40*517904deSPeter Grehan void igc_release_phy(struct igc_hw *hw); 41*517904deSPeter Grehan s32 igc_acquire_phy(struct igc_hw *hw); 42*517904deSPeter Grehan s32 igc_phy_hw_reset(struct igc_hw *hw); 43*517904deSPeter Grehan void igc_power_up_phy(struct igc_hw *hw); 44*517904deSPeter Grehan void igc_power_down_phy(struct igc_hw *hw); 45*517904deSPeter Grehan s32 igc_read_mac_addr(struct igc_hw *hw); 46*517904deSPeter Grehan s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size); 47*517904deSPeter Grehan void igc_reload_nvm(struct igc_hw *hw); 48*517904deSPeter Grehan s32 igc_update_nvm_checksum(struct igc_hw *hw); 49*517904deSPeter Grehan s32 igc_validate_nvm_checksum(struct igc_hw *hw); 50*517904deSPeter Grehan s32 igc_read_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data); 51*517904deSPeter Grehan s32 igc_write_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data); 52*517904deSPeter Grehan s32 igc_set_d3_lplu_state(struct igc_hw *hw, bool active); 53*517904deSPeter Grehan s32 igc_set_d0_lplu_state(struct igc_hw *hw, bool active); 54*517904deSPeter Grehan 55*517904deSPeter Grehan #endif /* _IGC_API_H_ */ 56