1 /*- 2 * Copyright (c) 1999,2000 Jonathan Lemon 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/kernel.h> 32 33 #include <sys/bio.h> 34 #include <sys/bus.h> 35 #include <sys/devicestat.h> 36 #include <sys/disk.h> 37 38 #include <machine/bus_memio.h> 39 #include <machine/bus_pio.h> 40 #include <machine/bus.h> 41 #include <machine/resource.h> 42 #include <sys/rman.h> 43 44 #include <pci/pcireg.h> 45 #include <pci/pcivar.h> 46 47 #include <dev/ida/idavar.h> 48 #include <dev/ida/idareg.h> 49 50 #define IDA_PCI_MAX_DMA_ADDR 0xFFFFFFFF 51 #define IDA_PCI_MAX_DMA_COUNT 0xFFFFFFFF 52 53 #define IDA_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */ 54 55 #define IDA_DEVICEID_SMART 0xAE100E11 56 #define IDA_DEVICEID_DEC_SMART 0x00461011 57 #define IDA_DEVICEID_NCR_53C1510 0x00101000 58 59 static int 60 ida_v3_fifo_full(struct ida_softc *ida) 61 { 62 return (ida_inl(ida, R_CMD_FIFO) == 0); 63 } 64 65 static void 66 ida_v3_submit(struct ida_softc *ida, struct ida_qcb *qcb) 67 { 68 ida_outl(ida, R_CMD_FIFO, qcb->hwqcb_busaddr); 69 } 70 71 static bus_addr_t 72 ida_v3_done(struct ida_softc *ida) 73 { 74 return (ida_inl(ida, R_DONE_FIFO)); 75 } 76 77 static int 78 ida_v3_int_pending(struct ida_softc *ida) 79 { 80 return (ida_inl(ida, R_INT_PENDING)); 81 } 82 83 static void 84 ida_v3_int_enable(struct ida_softc *ida, int enable) 85 { 86 ida_outl(ida, R_INT_MASK, enable ? INT_ENABLE : INT_DISABLE); 87 } 88 89 static int 90 ida_v4_fifo_full(struct ida_softc *ida) 91 { 92 return (ida_inl(ida, R_42XX_REQUEST) != 0); 93 } 94 95 static void 96 ida_v4_submit(struct ida_softc *ida, struct ida_qcb *qcb) 97 { 98 ida_outl(ida, R_42XX_REQUEST, qcb->hwqcb_busaddr); 99 } 100 101 static bus_addr_t 102 ida_v4_done(struct ida_softc *ida) 103 { 104 bus_addr_t completed; 105 106 completed = ida_inl(ida, R_42XX_REPLY); 107 if (completed == -1) 108 return (0); /* fifo is empty */ 109 ida_outl(ida, R_42XX_REPLY, 0); /* confirm read */ 110 return (completed); 111 } 112 113 static int 114 ida_v4_int_pending(struct ida_softc *ida) 115 { 116 return (ida_inl(ida, R_42XX_STATUS) & STATUS_42XX_INT_PENDING); 117 } 118 119 static void 120 ida_v4_int_enable(struct ida_softc *ida, int enable) 121 { 122 ida_outl(ida, R_42XX_INT_MASK, 123 enable ? INT_ENABLE_42XX : INT_DISABLE_42XX); 124 } 125 126 static struct ida_access ida_v3_access = { 127 ida_v3_fifo_full, 128 ida_v3_submit, 129 ida_v3_done, 130 ida_v3_int_pending, 131 ida_v3_int_enable, 132 }; 133 134 static struct ida_access ida_v4_access = { 135 ida_v4_fifo_full, 136 ida_v4_submit, 137 ida_v4_done, 138 ida_v4_int_pending, 139 ida_v4_int_enable, 140 }; 141 142 static struct ida_board board_id[] = { 143 { 0x40300E11, "Compaq SMART-2/P array controller", &ida_v3_access }, 144 { 0x40310E11, "Compaq SMART-2SL array controller", &ida_v3_access }, 145 { 0x40320E11, "Compaq Smart Array 3200 controller", &ida_v3_access }, 146 { 0x40330E11, "Compaq Smart Array 3100ES controller", &ida_v3_access }, 147 { 0x40340E11, "Compaq Smart Array 221 controller", &ida_v3_access }, 148 149 { 0x40400E11, "Compaq Integrated Array controller", &ida_v4_access }, 150 { 0x40500E11, "Compaq Smart Array 4200 controller", &ida_v4_access }, 151 { 0x40510E11, "Compaq Smart Array 4250ES controller", &ida_v4_access }, 152 { 0x40580E11, "Compaq Smart Array 431 controller", &ida_v4_access }, 153 154 { 0, "", 0 }, 155 }; 156 157 static int ida_pci_probe(device_t dev); 158 static int ida_pci_attach(device_t dev); 159 160 static device_method_t ida_pci_methods[] = { 161 DEVMETHOD(device_probe, ida_pci_probe), 162 DEVMETHOD(device_attach, ida_pci_attach), 163 DEVMETHOD(device_detach, ida_detach), 164 165 DEVMETHOD(bus_print_child, bus_generic_print_child), 166 167 { 0, 0 } 168 }; 169 170 static driver_t ida_pci_driver = { 171 "ida", 172 ida_pci_methods, 173 sizeof(struct ida_softc) 174 }; 175 176 static devclass_t ida_devclass; 177 178 static struct ida_board * 179 ida_pci_match(device_t dev) 180 { 181 int i; 182 u_int32_t id, sub_id; 183 184 id = pci_get_devid(dev); 185 sub_id = pci_get_subdevice(dev) << 16 | pci_get_subvendor(dev); 186 187 if (id == IDA_DEVICEID_SMART || 188 id == IDA_DEVICEID_DEC_SMART || 189 id == IDA_DEVICEID_NCR_53C1510) { 190 for (i = 0; board_id[i].board; i++) 191 if (board_id[i].board == sub_id) 192 return (&board_id[i]); 193 } 194 return (NULL); 195 } 196 197 static int 198 ida_pci_probe(device_t dev) 199 { 200 struct ida_board *board = ida_pci_match(dev); 201 202 if (board != NULL) { 203 device_set_desc(dev, board->desc); 204 return (0); 205 } 206 return (ENXIO); 207 } 208 209 static int 210 ida_pci_attach(device_t dev) 211 { 212 struct ida_board *board = ida_pci_match(dev); 213 struct ida_softc *ida; 214 u_int command; 215 int error, rid; 216 217 command = pci_read_config(dev, PCIR_COMMAND, 1); 218 219 /* 220 * it appears that this board only does MEMIO access. 221 */ 222 if ((command & PCIM_CMD_MEMEN) == 0) { 223 device_printf(dev, "Only memory mapped I/O is supported\n"); 224 return (ENXIO); 225 } 226 227 ida = (struct ida_softc *)device_get_softc(dev); 228 ida->dev = dev; 229 ida->cmd = *board->accessor; 230 231 ida->regs_res_type = SYS_RES_MEMORY; 232 ida->regs_res_id = IDA_PCI_MEMADDR; 233 if (board->board == IDA_DEVICEID_DEC_SMART) 234 ida->regs_res_id = PCIR_MAPS; 235 236 ida->regs = bus_alloc_resource(dev, ida->regs_res_type, 237 &ida->regs_res_id, 0, ~0, 1, RF_ACTIVE); 238 if (ida->regs == NULL) { 239 device_printf(dev, "can't allocate memory resources\n"); 240 return (ENOMEM); 241 } 242 243 error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1, 244 /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 245 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL, 246 /*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG, 247 /*maxsegsize*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/BUS_DMA_ALLOCNOW, 248 &ida->parent_dmat); 249 if (error != 0) { 250 device_printf(dev, "can't allocate DMA tag\n"); 251 ida_free(ida); 252 return (ENOMEM); 253 } 254 255 rid = 0; 256 ida->irq_res_type = SYS_RES_IRQ; 257 ida->irq = bus_alloc_resource(dev, ida->irq_res_type, &rid, 258 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 259 if (ida->irq == NULL) { 260 ida_free(ida); 261 return (ENOMEM); 262 } 263 error = bus_setup_intr(dev, ida->irq, INTR_TYPE_BIO, 264 ida_intr, ida, &ida->ih); 265 if (error) { 266 device_printf(dev, "can't setup interrupt\n"); 267 ida_free(ida); 268 return (ENOMEM); 269 } 270 271 ida->flags = 0; 272 error = ida_init(ida); 273 if (error) { 274 ida_free(ida); 275 return (error); 276 } 277 ida_attach(ida); 278 ida->flags |= IDA_ATTACHED; 279 280 return (0); 281 } 282 283 DRIVER_MODULE(ida, pci, ida_pci_driver, ida_devclass, 0, 0); 284