1 /*- 2 * Copyright (c) 1999,2000 Jonathan Lemon 3 * All rights reserved. 4 * 5 # Derived from the original IDA Compaq RAID driver, which is 6 * Copyright (c) 1996, 1997, 1998, 1999 7 * Mark Dawson and David James. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 /* 35 * Generic driver for Compaq SMART RAID adapters. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/kernel.h> 40 #include <sys/systm.h> 41 #include <sys/malloc.h> 42 #include <sys/stat.h> 43 44 #include <sys/bio.h> 45 #include <sys/bus.h> 46 #include <sys/conf.h> 47 #include <sys/endian.h> 48 49 #include <machine/bus_memio.h> 50 #include <machine/bus_pio.h> 51 #include <machine/bus.h> 52 #include <sys/rman.h> 53 54 #include <geom/geom_disk.h> 55 56 #include <dev/ida/idareg.h> 57 #include <dev/ida/idavar.h> 58 #include <dev/ida/idaio.h> 59 60 /* prototypes */ 61 static void ida_alloc_qcb(struct ida_softc *ida); 62 static void ida_construct_qcb(struct ida_softc *ida); 63 static void ida_start(struct ida_softc *ida); 64 static void ida_done(struct ida_softc *ida, struct ida_qcb *qcb); 65 static int ida_wait(struct ida_softc *ida, struct ida_qcb *qcb); 66 67 static d_ioctl_t ida_ioctl; 68 static struct cdevsw ida_cdevsw = { 69 .d_version = D_VERSION, 70 .d_flags = D_NEEDGIANT, 71 .d_ioctl = ida_ioctl, 72 .d_name = "ida", 73 }; 74 75 void 76 ida_free(struct ida_softc *ida) 77 { 78 int i; 79 80 for (i = 0; i < ida->num_qcbs; i++) 81 bus_dmamap_destroy(ida->buffer_dmat, ida->qcbs[i].dmamap); 82 83 if (ida->hwqcb_busaddr) 84 bus_dmamap_unload(ida->hwqcb_dmat, ida->hwqcb_dmamap); 85 86 if (ida->hwqcbs) 87 bus_dmamem_free(ida->hwqcb_dmat, ida->hwqcbs, 88 ida->hwqcb_dmamap); 89 90 if (ida->buffer_dmat) 91 bus_dma_tag_destroy(ida->buffer_dmat); 92 93 if (ida->hwqcb_dmat) 94 bus_dma_tag_destroy(ida->hwqcb_dmat); 95 96 if (ida->qcbs != NULL) 97 free(ida->qcbs, M_DEVBUF); 98 99 if (ida->ih != NULL) 100 bus_teardown_intr(ida->dev, ida->irq, ida->ih); 101 102 if (ida->irq != NULL) 103 bus_release_resource(ida->dev, ida->irq_res_type, 104 0, ida->irq); 105 106 if (ida->parent_dmat != NULL) 107 bus_dma_tag_destroy(ida->parent_dmat); 108 109 if (ida->regs != NULL) 110 bus_release_resource(ida->dev, ida->regs_res_type, 111 ida->regs_res_id, ida->regs); 112 } 113 114 /* 115 * record bus address from bus_dmamap_load 116 */ 117 static void 118 ida_dma_map_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 119 { 120 bus_addr_t *baddr; 121 122 baddr = (bus_addr_t *)arg; 123 *baddr = segs->ds_addr; 124 } 125 126 static __inline struct ida_qcb * 127 ida_get_qcb(struct ida_softc *ida) 128 { 129 struct ida_qcb *qcb; 130 131 if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL) { 132 SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle); 133 } else { 134 ida_alloc_qcb(ida); 135 if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL) 136 SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle); 137 } 138 return (qcb); 139 } 140 141 static __inline bus_addr_t 142 idahwqcbvtop(struct ida_softc *ida, struct ida_hardware_qcb *hwqcb) 143 { 144 return (ida->hwqcb_busaddr + 145 ((bus_addr_t)hwqcb - (bus_addr_t)ida->hwqcbs)); 146 } 147 148 static __inline struct ida_qcb * 149 idahwqcbptov(struct ida_softc *ida, bus_addr_t hwqcb_addr) 150 { 151 struct ida_hardware_qcb *hwqcb; 152 153 hwqcb = (struct ida_hardware_qcb *) 154 ((bus_addr_t)ida->hwqcbs + (hwqcb_addr - ida->hwqcb_busaddr)); 155 return (hwqcb->qcb); 156 } 157 158 /* 159 * XXX 160 * since we allocate all QCB space up front during initialization, then 161 * why bother with this routine? 162 */ 163 static void 164 ida_alloc_qcb(struct ida_softc *ida) 165 { 166 struct ida_qcb *qcb; 167 int error; 168 169 if (ida->num_qcbs >= IDA_QCB_MAX) 170 return; 171 172 qcb = &ida->qcbs[ida->num_qcbs]; 173 174 error = bus_dmamap_create(ida->buffer_dmat, /*flags*/0, &qcb->dmamap); 175 if (error != 0) 176 return; 177 178 qcb->flags = QCB_FREE; 179 qcb->hwqcb = &ida->hwqcbs[ida->num_qcbs]; 180 qcb->hwqcb->qcb = qcb; 181 qcb->hwqcb_busaddr = idahwqcbvtop(ida, qcb->hwqcb); 182 SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle); 183 ida->num_qcbs++; 184 } 185 186 int 187 ida_init(struct ida_softc *ida) 188 { 189 int error; 190 191 ida->unit = device_get_unit(ida->dev); 192 ida->tag = rman_get_bustag(ida->regs); 193 ida->bsh = rman_get_bushandle(ida->regs); 194 195 SLIST_INIT(&ida->free_qcbs); 196 STAILQ_INIT(&ida->qcb_queue); 197 bioq_init(&ida->bio_queue); 198 199 ida->qcbs = (struct ida_qcb *) 200 malloc(IDA_QCB_MAX * sizeof(struct ida_qcb), M_DEVBUF, 201 M_NOWAIT | M_ZERO); 202 if (ida->qcbs == NULL) 203 return (ENOMEM); 204 205 /* 206 * Create our DMA tags 207 */ 208 209 /* DMA tag for our hardware QCB structures */ 210 error = bus_dma_tag_create( 211 /* parent */ ida->parent_dmat, 212 /* alignment */ 1, 213 /* boundary */ 0, 214 /* lowaddr */ BUS_SPACE_MAXADDR, 215 /* highaddr */ BUS_SPACE_MAXADDR, 216 /* filter */ NULL, 217 /* filterarg */ NULL, 218 /* maxsize */ IDA_QCB_MAX * sizeof(struct ida_hardware_qcb), 219 /* nsegments */ 1, 220 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 221 /* flags */ 0, 222 /* lockfunc */ busdma_lock_mutex, 223 /* lockarg */ &Giant, 224 &ida->hwqcb_dmat); 225 if (error) 226 return (ENOMEM); 227 228 /* DMA tag for mapping buffers into device space */ 229 error = bus_dma_tag_create( 230 /* parent */ ida->parent_dmat, 231 /* alignment */ 1, 232 /* boundary */ 0, 233 /* lowaddr */ BUS_SPACE_MAXADDR, 234 /* highaddr */ BUS_SPACE_MAXADDR, 235 /* filter */ NULL, 236 /* filterarg */ NULL, 237 /* maxsize */ MAXBSIZE, 238 /* nsegments */ IDA_NSEG, 239 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 240 /* flags */ 0, 241 /* lockfunc */ busdma_lock_mutex, 242 /* lockarg */ &Giant, 243 &ida->buffer_dmat); 244 if (error) 245 return (ENOMEM); 246 247 /* Allocation of hardware QCBs */ 248 /* XXX allocation is rounded to hardware page size */ 249 error = bus_dmamem_alloc(ida->hwqcb_dmat, 250 (void **)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap); 251 if (error) 252 return (ENOMEM); 253 254 /* And permanently map them in */ 255 bus_dmamap_load(ida->hwqcb_dmat, ida->hwqcb_dmamap, 256 ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb), 257 ida_dma_map_cb, &ida->hwqcb_busaddr, /*flags*/0); 258 259 bzero(ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb)); 260 261 ida_alloc_qcb(ida); /* allocate an initial qcb */ 262 263 return (0); 264 } 265 266 void 267 ida_attach(struct ida_softc *ida) 268 { 269 struct ida_controller_info cinfo; 270 int error, i; 271 272 ida->cmd.int_enable(ida, 0); 273 274 error = ida_command(ida, CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 275 IDA_CONTROLLER, 0, DMA_DATA_IN); 276 if (error) { 277 device_printf(ida->dev, "CMD_GET_CTRL_INFO failed.\n"); 278 return; 279 } 280 281 device_printf(ida->dev, "drives=%d firm_rev=%c%c%c%c\n", 282 cinfo.num_drvs, cinfo.firm_rev[0], cinfo.firm_rev[1], 283 cinfo.firm_rev[2], cinfo.firm_rev[3]); 284 285 if (ida->flags & IDA_FIRMWARE) { 286 int data; 287 288 error = ida_command(ida, CMD_START_FIRMWARE, 289 &data, sizeof(data), IDA_CONTROLLER, 0, DMA_DATA_IN); 290 if (error) { 291 device_printf(ida->dev, "CMD_START_FIRMWARE failed.\n"); 292 return; 293 } 294 } 295 296 ida->ida_dev_t = make_dev(&ida_cdevsw, ida->unit, 297 UID_ROOT, GID_OPERATOR, S_IRUSR | S_IWUSR, 298 "ida%d", ida->unit); 299 ida->ida_dev_t->si_drv1 = ida; 300 301 ida->num_drives = 0; 302 for (i = 0; i < cinfo.num_drvs; i++) 303 device_add_child(ida->dev, /*"idad"*/NULL, -1); 304 305 bus_generic_attach(ida->dev); 306 307 ida->cmd.int_enable(ida, 1); 308 } 309 310 int 311 ida_detach(device_t dev) 312 { 313 struct ida_softc *ida; 314 int error = 0; 315 316 ida = (struct ida_softc *)device_get_softc(dev); 317 318 /* 319 * XXX 320 * before detaching, we must make sure that the system is 321 * quiescent; nothing mounted, no pending activity. 322 */ 323 324 /* 325 * XXX 326 * now, how are we supposed to maintain a list of our drives? 327 * iterate over our "child devices"? 328 */ 329 330 destroy_dev(ida->ida_dev_t); 331 ida_free(ida); 332 return (error); 333 } 334 335 static void 336 ida_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 337 { 338 struct ida_hardware_qcb *hwqcb = (struct ida_hardware_qcb *)arg; 339 int i; 340 341 hwqcb->hdr.size = htole16((sizeof(struct ida_req) + 342 sizeof(struct ida_sgb) * IDA_NSEG) >> 2); 343 344 for (i = 0; i < nsegments; i++) { 345 hwqcb->seg[i].addr = htole32(segs[i].ds_addr); 346 hwqcb->seg[i].length = htole32(segs[i].ds_len); 347 } 348 hwqcb->req.sgcount = nsegments; 349 } 350 351 int 352 ida_command(struct ida_softc *ida, int command, void *data, int datasize, 353 int drive, u_int32_t pblkno, int flags) 354 { 355 struct ida_hardware_qcb *hwqcb; 356 struct ida_qcb *qcb; 357 bus_dmasync_op_t op; 358 int s, error; 359 360 s = splbio(); 361 qcb = ida_get_qcb(ida); 362 splx(s); 363 364 if (qcb == NULL) { 365 printf("ida_command: out of QCBs"); 366 return (EAGAIN); 367 } 368 369 hwqcb = qcb->hwqcb; 370 bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req)); 371 372 bus_dmamap_load(ida->buffer_dmat, qcb->dmamap, 373 (void *)data, datasize, ida_setup_dmamap, hwqcb, 0); 374 op = qcb->flags & DMA_DATA_IN ? 375 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE; 376 bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op); 377 378 hwqcb->hdr.drive = drive; 379 hwqcb->req.blkno = htole32(pblkno); 380 hwqcb->req.bcount = htole16(howmany(datasize, DEV_BSIZE)); 381 hwqcb->req.command = command; 382 383 qcb->flags = flags | IDA_COMMAND; 384 385 s = splbio(); 386 STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe); 387 ida_start(ida); 388 error = ida_wait(ida, qcb); 389 splx(s); 390 391 /* XXX should have status returned here? */ 392 /* XXX have "status pointer" area in QCB? */ 393 394 return (error); 395 } 396 397 void 398 ida_submit_buf(struct ida_softc *ida, struct bio *bp) 399 { 400 bioq_insert_tail(&ida->bio_queue, bp); 401 ida_construct_qcb(ida); 402 ida_start(ida); 403 } 404 405 static void 406 ida_construct_qcb(struct ida_softc *ida) 407 { 408 struct ida_hardware_qcb *hwqcb; 409 struct ida_qcb *qcb; 410 bus_dmasync_op_t op; 411 struct bio *bp; 412 413 bp = bioq_first(&ida->bio_queue); 414 if (bp == NULL) 415 return; /* no more buffers */ 416 417 qcb = ida_get_qcb(ida); 418 if (qcb == NULL) 419 return; /* out of resources */ 420 421 bioq_remove(&ida->bio_queue, bp); 422 qcb->buf = bp; 423 qcb->flags = bp->bio_cmd == BIO_READ ? DMA_DATA_IN : DMA_DATA_OUT; 424 425 hwqcb = qcb->hwqcb; 426 bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req)); 427 428 bus_dmamap_load(ida->buffer_dmat, qcb->dmamap, 429 (void *)bp->bio_data, bp->bio_bcount, ida_setup_dmamap, hwqcb, 0); 430 op = qcb->flags & DMA_DATA_IN ? 431 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE; 432 bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op); 433 434 { 435 struct idad_softc *drv = (struct idad_softc *)bp->bio_driver1; 436 hwqcb->hdr.drive = drv->drive; 437 } 438 439 hwqcb->req.blkno = bp->bio_pblkno; 440 hwqcb->req.bcount = howmany(bp->bio_bcount, DEV_BSIZE); 441 hwqcb->req.command = bp->bio_cmd == BIO_READ ? CMD_READ : CMD_WRITE; 442 443 STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe); 444 } 445 446 /* 447 * This routine will be called from ida_intr in order to queue up more 448 * I/O, meaning that we may be in an interrupt context. Hence, we should 449 * not muck around with spl() in this routine. 450 */ 451 static void 452 ida_start(struct ida_softc *ida) 453 { 454 struct ida_qcb *qcb; 455 456 while ((qcb = STAILQ_FIRST(&ida->qcb_queue)) != NULL) { 457 if (ida->cmd.fifo_full(ida)) 458 break; 459 STAILQ_REMOVE_HEAD(&ida->qcb_queue, link.stqe); 460 /* 461 * XXX 462 * place the qcb on an active list and set a timeout? 463 */ 464 qcb->state = QCB_ACTIVE; 465 ida->cmd.submit(ida, qcb); 466 } 467 } 468 469 static int 470 ida_wait(struct ida_softc *ida, struct ida_qcb *qcb) 471 { 472 struct ida_qcb *qcb_done = NULL; 473 bus_addr_t completed; 474 int delay; 475 476 if (ida->flags & IDA_INTERRUPTS) { 477 if (tsleep(qcb, PRIBIO, "idacmd", 5 * hz)) 478 return (ETIMEDOUT); 479 return (0); 480 } 481 482 again: 483 delay = 5 * 1000 * 100; /* 5 sec delay */ 484 while ((completed = ida->cmd.done(ida)) == 0) { 485 if (delay-- == 0) 486 return (ETIMEDOUT); 487 DELAY(10); 488 } 489 490 qcb_done = idahwqcbptov(ida, completed & ~3); 491 if (qcb_done != qcb) 492 goto again; 493 ida_done(ida, qcb); 494 return (0); 495 } 496 497 void 498 ida_intr(void *data) 499 { 500 struct ida_softc *ida; 501 struct ida_qcb *qcb; 502 bus_addr_t completed; 503 504 ida = (struct ida_softc *)data; 505 506 if (ida->cmd.int_pending(ida) == 0) 507 return; /* not our interrupt */ 508 509 while ((completed = ida->cmd.done(ida)) != 0) { 510 qcb = idahwqcbptov(ida, completed & ~3); 511 512 if (qcb == NULL || qcb->state != QCB_ACTIVE) { 513 device_printf(ida->dev, 514 "ignoring completion %jx\n", (intmax_t)completed); 515 continue; 516 } 517 /* Handle "Bad Command List" errors. */ 518 if ((completed & 3) && (qcb->hwqcb->req.error == 0)) 519 qcb->hwqcb->req.error = CMD_REJECTED; 520 ida_done(ida, qcb); 521 } 522 ida_start(ida); 523 } 524 525 /* 526 * should switch out command type; may be status, not just I/O. 527 */ 528 static void 529 ida_done(struct ida_softc *ida, struct ida_qcb *qcb) 530 { 531 int error = 0; 532 533 /* 534 * finish up command 535 */ 536 if (qcb->flags & DMA_DATA_TRANSFER) { 537 bus_dmasync_op_t op; 538 539 op = qcb->flags & DMA_DATA_IN ? 540 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE; 541 bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op); 542 bus_dmamap_unload(ida->buffer_dmat, qcb->dmamap); 543 } 544 545 if (qcb->hwqcb->req.error & SOFT_ERROR) { 546 if (qcb->buf) 547 device_printf(ida->dev, "soft %s error\n", 548 qcb->buf->bio_cmd == BIO_READ ? 549 "read" : "write"); 550 else 551 device_printf(ida->dev, "soft error\n"); 552 } 553 if (qcb->hwqcb->req.error & HARD_ERROR) { 554 error = 1; 555 if (qcb->buf) 556 device_printf(ida->dev, "hard %s error\n", 557 qcb->buf->bio_cmd == BIO_READ ? 558 "read" : "write"); 559 else 560 device_printf(ida->dev, "hard error\n"); 561 } 562 if (qcb->hwqcb->req.error & CMD_REJECTED) { 563 error = 1; 564 device_printf(ida->dev, "invalid request\n"); 565 } 566 567 if (qcb->flags & IDA_COMMAND) { 568 if (ida->flags & IDA_INTERRUPTS) 569 wakeup(qcb); 570 } else { 571 if (error) 572 qcb->buf->bio_flags |= BIO_ERROR; 573 idad_intr(qcb->buf); 574 } 575 576 qcb->state = QCB_FREE; 577 qcb->buf = NULL; 578 SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle); 579 ida_construct_qcb(ida); 580 } 581 582 /* 583 * IOCTL stuff follows. 584 */ 585 struct cmd_info { 586 int cmd; 587 int len; 588 int flags; 589 }; 590 static struct cmd_info *ida_cmd_lookup(int); 591 592 static int 593 ida_ioctl (struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, struct thread *td) 594 { 595 struct ida_softc *sc; 596 struct ida_user_command *uc; 597 struct cmd_info *ci; 598 int len; 599 int flags; 600 int error; 601 int data; 602 void *daddr; 603 604 sc = (struct ida_softc *)dev->si_drv1; 605 uc = (struct ida_user_command *)addr; 606 error = 0; 607 608 switch (cmd) { 609 case IDAIO_COMMAND: 610 ci = ida_cmd_lookup(uc->command); 611 if (ci == NULL) { 612 error = EINVAL; 613 break; 614 } 615 len = ci->len; 616 flags = ci->flags; 617 if (len) 618 daddr = &uc->d.buf; 619 else { 620 daddr = &data; 621 len = sizeof(data); 622 } 623 error = ida_command(sc, uc->command, daddr, len, 624 uc->drive, uc->blkno, flags); 625 break; 626 default: 627 error = ENOIOCTL; 628 break; 629 } 630 return (error); 631 } 632 633 static struct cmd_info ci_list[] = { 634 { CMD_GET_LOG_DRV_INFO, 635 sizeof(struct ida_drive_info), DMA_DATA_IN }, 636 { CMD_GET_CTRL_INFO, 637 sizeof(struct ida_controller_info), DMA_DATA_IN }, 638 { CMD_SENSE_DRV_STATUS, 639 sizeof(struct ida_drive_status), DMA_DATA_IN }, 640 { CMD_START_RECOVERY, 0, 0 }, 641 { CMD_GET_PHYS_DRV_INFO, 642 sizeof(struct ida_phys_drv_info), DMA_DATA_TRANSFER }, 643 { CMD_BLINK_DRV_LEDS, 644 sizeof(struct ida_blink_drv_leds), DMA_DATA_OUT }, 645 { CMD_SENSE_DRV_LEDS, 646 sizeof(struct ida_blink_drv_leds), DMA_DATA_IN }, 647 { CMD_GET_LOG_DRV_EXT, 648 sizeof(struct ida_drive_info_ext), DMA_DATA_IN }, 649 { CMD_RESET_CTRL, 0, 0 }, 650 { CMD_GET_CONFIG, 0, 0 }, 651 { CMD_SET_CONFIG, 0, 0 }, 652 { CMD_LABEL_LOG_DRV, 653 sizeof(struct ida_label_logical), DMA_DATA_OUT }, 654 { CMD_SET_SURFACE_DELAY, 0, 0 }, 655 { CMD_SENSE_BUS_PARAMS, 0, 0 }, 656 { CMD_SENSE_SUBSYS_INFO, 0, 0 }, 657 { CMD_SENSE_SURFACE_ATS, 0, 0 }, 658 { CMD_PASSTHROUGH, 0, 0 }, 659 { CMD_RESET_SCSI_DEV, 0, 0 }, 660 { CMD_PAUSE_BG_ACT, 0, 0 }, 661 { CMD_RESUME_BG_ACT, 0, 0 }, 662 { CMD_START_FIRMWARE, 0, 0 }, 663 { CMD_SENSE_DRV_ERR_LOG, 0, 0 }, 664 { CMD_START_CPM, 0, 0 }, 665 { CMD_SENSE_CP, 0, 0 }, 666 { CMD_STOP_CPM, 0, 0 }, 667 { CMD_FLUSH_CACHE, 0, 0 }, 668 { CMD_ACCEPT_MEDIA_EXCH, 0, 0 }, 669 { 0, 0, 0 } 670 }; 671 672 static struct cmd_info * 673 ida_cmd_lookup (int command) 674 { 675 struct cmd_info *ci; 676 677 ci = ci_list; 678 while (ci->cmd) { 679 if (ci->cmd == command) 680 return (ci); 681 ci++; 682 } 683 return (NULL); 684 } 685