xref: /freebsd/sys/dev/ida/ida.c (revision 94db13fe98fa84bf47c068770bc38fc8d6516417) 
1 /*-
2  * Copyright (c) 1999 Jonathan Lemon
3  * All rights reserved.
4  *
5  # Derived from the original IDA Compaq RAID driver, which is
6  * Copyright (c) 1996, 1997, 1998, 1999
7  *    Mark Dawson and David James. All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD$
31  */
32 
33 /*
34  * Generic driver for Compaq SMART RAID adapters.
35  *
36  * Specific probe routines are in:
37  *	pci/ida_pci.c
38  *	i386/eisa/ida_eisa.c
39  */
40 
41 #include <pci.h>
42 
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 
48 #include <sys/buf.h>
49 #include <sys/bus.h>
50 #include <sys/device.h>
51 #include <sys/devicestat.h>
52 
53 #if NPCI > 0
54 #include <machine/bus_memio.h>
55 #endif
56 #include <machine/bus_pio.h>
57 #include <machine/bus.h>
58 #include <machine/clock.h>
59 #include <sys/rman.h>
60 
61 #include <dev/ida/idareg.h>
62 #include <dev/ida/idavar.h>
63 
64 #define ida_inl(ida, port) \
65 	bus_space_read_4((ida)->tag, (ida)->bsh, port)
66 
67 #define ida_outl(ida, port, val) \
68 	bus_space_write_4((ida)->tag, (ida)->bsh, port, val)
69 
70 /* prototypes */
71 static void ida_alloc_qcb(struct ida_softc *ida);
72 static void ida_construct_qcb(struct ida_softc *ida);
73 static void ida_start(struct ida_softc *ida);
74 static void ida_done(struct ida_softc *ida, struct ida_qcb *qcb);
75 static void ida_wait(struct ida_softc *ida, struct ida_qcb *qcb, int delay);
76 
77 void
78 ida_free(struct ida_softc *ida)
79 {
80 
81 	/*
82  	 * still need to call bus_dmamap_destroy() for each map created
83 	 * in ida_alloc_qcb().
84 	 */
85 
86 	if (ida->hwqcb_busaddr)
87 		bus_dmamap_unload(ida->hwqcb_dmat, ida->hwqcb_dmamap);
88 
89 	if (ida->hwqcbs)
90 		bus_dmamem_free(ida->hwqcb_dmat, ida->hwqcbs,
91 		    ida->hwqcb_dmamap);
92 
93 	if (ida->buffer_dmat)
94 		bus_dma_tag_destroy(ida->buffer_dmat);
95 
96 	if (ida->hwqcb_dmat)
97 		bus_dma_tag_destroy(ida->hwqcb_dmat);
98 
99 	if (ida->qcbs != NULL)
100 		free(ida->qcbs, M_DEVBUF);
101 
102 	if (ida->ih != NULL)
103                 bus_teardown_intr(ida->dev, ida->irq, ida->ih);
104 
105 	if (ida->irq != NULL)
106 		bus_release_resource(ida->dev, ida->irq_res_type,
107 		    0, ida->irq);
108 
109 	if (ida->parent_dmat != NULL)
110 		bus_dma_tag_destroy(ida->parent_dmat);
111 
112 	if (ida->regs != NULL)
113 		bus_release_resource(ida->dev, ida->regs_res_type,
114 		    ida->regs_res_id, ida->regs);
115 }
116 
117 /*
118  * record bus address from bus_dmamap_load
119  */
120 static void
121 ida_dma_map_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
122 {
123         bus_addr_t *baddr;
124 
125         baddr = (bus_addr_t *)arg;
126         *baddr = segs->ds_addr;
127 }
128 
129 static __inline struct ida_qcb *
130 ida_get_qcb(struct ida_softc *ida)
131 {
132 	struct ida_qcb *qcb;
133 
134 	if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL) {
135 		SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
136 	} else {
137 		ida_alloc_qcb(ida);
138 		if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL)
139 			SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
140 	}
141 	return (qcb);
142 }
143 
144 /*
145  * XXX
146  * since we allocate all QCB space up front during initialization, then
147  * why bother with this routine?
148  */
149 static void
150 ida_alloc_qcb(struct ida_softc *ida)
151 {
152 	struct ida_qcb *qcb;
153 	int error;
154 
155 	if (ida->num_qcbs >= IDA_QCB_MAX)
156 		return;
157 
158 	qcb = &ida->qcbs[ida->num_qcbs];
159 
160 	error = bus_dmamap_create(ida->buffer_dmat, /*flags*/0, &qcb->dmamap);
161 	if (error != 0)
162 		return;
163 
164 	qcb->flags = QCB_FREE;
165 	qcb->hwqcb = &ida->hwqcbs[ida->num_qcbs];
166 	qcb->hwqcb->qcb = qcb;
167 	SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
168 	ida->num_qcbs++;
169 }
170 
171 int
172 ida_init(struct ida_softc *ida)
173 {
174 	int error;
175 
176 	ida->unit = device_get_unit(ida->dev);
177 	ida->tag = rman_get_bustag(ida->regs);
178 	ida->bsh = rman_get_bushandle(ida->regs);
179 
180 	SLIST_INIT(&ida->free_qcbs);
181 	STAILQ_INIT(&ida->qcb_queue);
182         bufq_init(&ida->buf_queue);
183 
184 	ida->qcbs = (struct ida_qcb *)
185 	    malloc(IDA_QCB_MAX * sizeof(struct ida_qcb), M_DEVBUF, M_NOWAIT);
186 	if (ida->qcbs == NULL)
187 		return (ENOMEM);
188 	bzero(ida->qcbs, IDA_QCB_MAX * sizeof(struct ida_qcb));
189 
190 	/*
191 	 * Create our DMA tags
192 	 */
193 
194 	/* DMA tag for our hardware QCB structures */
195 	error = bus_dma_tag_create(ida->parent_dmat,
196 	    /*alignment*/1, /*boundary*/0,
197 	    /*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
198 	    /*filter*/NULL, /*filterarg*/NULL,
199 	    IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
200 	    /*nsegments*/1, /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
201 	    /*flags*/0, &ida->hwqcb_dmat);
202 	if (error)
203                 return (ENOMEM);
204 
205 	/* DMA tag for mapping buffers into device space */
206 	error = bus_dma_tag_create(ida->parent_dmat,
207 	    /*alignment*/1, /*boundary*/0,
208 	    /*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
209 	    /*filter*/NULL, /*filterarg*/NULL,
210 	    /*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG,
211 	    /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, &ida->buffer_dmat);
212 	if (error)
213                 return (ENOMEM);
214 
215         /* Allocation of hardware QCBs */
216 	/* XXX allocation is rounded to hardware page size */
217 	error = bus_dmamem_alloc(ida->hwqcb_dmat,
218 	    (void **)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap);
219 	if (error)
220                 return (ENOMEM);
221 
222         /* And permanently map them in */
223         bus_dmamap_load(ida->hwqcb_dmat, ida->hwqcb_dmamap,
224 	    ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
225 	    ida_dma_map_cb, &ida->hwqcb_busaddr, /*flags*/0);
226 
227 	bzero(ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb));
228 
229 	ida_alloc_qcb(ida);		/* allocate an initial qcb */
230 
231 	return (0);
232 }
233 
234 void
235 ida_attach(struct ida_softc *ida)
236 {
237 	struct ida_controller_info cinfo;
238 	int error, i;
239 
240 	ida_outl(ida, R_INT_MASK, INT_DISABLE);
241 
242 	error = ida_command(ida, CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo),
243 	    IDA_CONTROLLER, DMA_DATA_IN);
244 	if (error) {
245 		device_printf(ida->dev, "CMD_GET_CTRL_INFO failed.\n");
246 		return;
247 	}
248 
249 	device_printf(ida->dev, "drives=%d firm_rev=%c%c%c%c\n",
250 	    cinfo.num_drvs, cinfo.firm_rev[0], cinfo.firm_rev[1],
251 	    cinfo.firm_rev[2], cinfo.firm_rev[3]);
252 
253 	ida->num_drives = cinfo.num_drvs;
254 
255 	for (i = 0; i < ida->num_drives; i++)
256 		device_add_child(ida->dev, "id", i, NULL);
257 
258 	bus_generic_attach(ida->dev);
259 
260 	ida_outl(ida, R_INT_MASK, INT_ENABLE);
261 }
262 
263 static void
264 ida_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
265 {
266 	struct ida_hardware_qcb *hwqcb = (struct ida_hardware_qcb *)arg;
267 	int i;
268 
269 	hwqcb->hdr.size = (sizeof(struct ida_req) +
270 	    sizeof(struct ida_sgb) * IDA_NSEG) >> 2;
271 
272 	for (i = 0; i < nsegments; i++) {
273 		hwqcb->seg[i].addr = segs[i].ds_addr;
274 		hwqcb->seg[i].length = segs[i].ds_len;
275 	}
276 	hwqcb->req.sgcount = nsegments;
277 }
278 
279 int
280 ida_command(struct ida_softc *ida, int command, void *data, int datasize,
281 	int drive, int flags)
282 {
283 	struct ida_hardware_qcb *hwqcb;
284 	struct ida_qcb *qcb;
285 	bus_dmasync_op_t op;
286 	int s;
287 
288 	s = splbio();
289 	qcb = ida_get_qcb(ida);
290 	splx(s);
291 
292 	if (qcb == NULL) {
293 		printf("ida_command: out of QCBs");
294 		return (1);
295 	}
296 
297 	hwqcb = qcb->hwqcb;
298 	bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
299 
300 	bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
301 	    (void *)data, datasize, ida_setup_dmamap, hwqcb, 0);
302 	op = qcb->flags & DMA_DATA_IN ?
303 	    BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
304 	bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
305 
306 	hwqcb->hdr.drive = drive;		/* XXX */
307 	hwqcb->req.bcount = howmany(datasize, DEV_BSIZE);
308 	hwqcb->req.command = command;
309 
310 	qcb->flags = flags | IDA_COMMAND;
311 
312 	s = splbio();
313 	STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
314 	ida_start(ida);
315 	ida_wait(ida, qcb, 500);
316 	splx(s);
317 
318 	/* XXX should have status returned here? */
319 	/* XXX have "status pointer" area in QCB? */
320 
321 	return (0);
322 }
323 
324 void
325 ida_submit_buf(struct ida_softc *ida, struct buf *bp)
326 {
327         bufq_insert_tail(&ida->buf_queue, bp);
328         ida_construct_qcb(ida);
329 	ida_start(ida);
330 }
331 
332 static void
333 ida_construct_qcb(struct ida_softc *ida)
334 {
335 	struct ida_hardware_qcb *hwqcb;
336 	struct ida_qcb *qcb;
337 	bus_dmasync_op_t op;
338 	struct buf *bp;
339 
340 	bp = bufq_first(&ida->buf_queue);
341 	if (bp == NULL)
342 		return;				/* no more buffers */
343 
344 	qcb = ida_get_qcb(ida);
345 	if (qcb == NULL)
346 		return;				/* out of resources */
347 
348 	bufq_remove(&ida->buf_queue, bp);
349 	qcb->buf = bp;
350 	qcb->flags = 0;
351 
352 	hwqcb = qcb->hwqcb;
353 	bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
354 
355 	bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
356 	    (void *)bp->b_data, bp->b_bcount, ida_setup_dmamap, hwqcb, 0);
357 	op = qcb->flags & DMA_DATA_IN ?
358 	    BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
359 	bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
360 
361 	/*
362 	 * XXX
363 	 */
364 	{
365 		struct id_softc *drv = (struct id_softc *)bp->b_driver1;
366 		hwqcb->hdr.drive = drv->unit;
367 	}
368 
369 	hwqcb->req.blkno = bp->b_pblkno;
370 	hwqcb->req.bcount = howmany(bp->b_bcount, DEV_BSIZE);
371 	hwqcb->req.command = bp->b_flags & B_READ ? CMD_READ : CMD_WRITE;
372 
373 	STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
374 }
375 
376 static __inline bus_addr_t
377 idahwqcbvtop(struct ida_softc *ida, struct ida_hardware_qcb *hwqcb)
378 {
379 	return (ida->hwqcb_busaddr +
380 	    ((bus_addr_t)hwqcb - (bus_addr_t)ida->hwqcbs));
381 }
382 
383 static __inline struct ida_qcb *
384 idahwqcbptov(struct ida_softc *ida, bus_addr_t hwqcb_addr)
385 {
386 	struct ida_hardware_qcb *hwqcb;
387 
388 	hwqcb = (struct ida_hardware_qcb *)
389 	    ((bus_addr_t)ida->hwqcbs + (hwqcb_addr - ida->hwqcb_busaddr));
390 	return (hwqcb->qcb);
391 }
392 
393 /*
394  * This routine will be called from ida_intr in order to queue up more
395  * I/O, meaning that we may be in an interrupt context.  Hence, we should
396  * not muck around with spl() in this routine.
397  */
398 static void
399 ida_start(struct ida_softc *ida)
400 {
401 	struct ida_qcb *qcb;
402 
403 	while ((qcb = STAILQ_FIRST(&ida->qcb_queue)) != NULL) {
404 		if (ida_inl(ida, R_CMD_FIFO) == 0)
405 			break;				/* fifo is full */
406 		STAILQ_REMOVE_HEAD(&ida->qcb_queue, link.stqe);
407 		/*
408 		 * XXX
409 		 * place the qcb on an active list and set a timeout?
410 		 */
411 		qcb->state = QCB_ACTIVE;
412 		/*
413 		 * XXX
414 		 * cache the physaddr so we don't keep doing this?
415 		 */
416 		ida_outl(ida, R_CMD_FIFO, idahwqcbvtop(ida, qcb->hwqcb));
417 	}
418 }
419 
420 static
421 void
422 ida_wait(struct ida_softc *ida, struct ida_qcb *qcb, int delay)
423 {
424 	struct ida_qcb *qcb_done = NULL;
425 	bus_addr_t completed;
426 
427 	if (ida->flags & IDA_ATTACHED) {
428 		if (tsleep((caddr_t)qcb, PRIBIO, "idacmd", delay))
429 			panic("ida_command: timeout waiting for interrupt");
430 		return;
431 	}
432 
433 	while ((completed = ida_inl(ida, R_DONE_FIFO)) == 0) {
434 		if (delay-- == 0)
435 			panic("ida_wait: timeout waiting for completion");
436 		DELAY(10);
437 	}
438 
439 	qcb_done = idahwqcbptov(ida, completed & ~3);
440 	if (qcb_done != qcb)
441 		panic("ida_wait: incorrect qcb returned");
442 	ida_done(ida, qcb);
443 	return;
444 }
445 
446 void
447 ida_intr(void *data)
448 {
449 	struct ida_softc *ida;
450 	struct ida_qcb *qcb;
451 	bus_addr_t completed;
452 
453 	ida = (struct ida_softc *)data;
454 
455 	if (ida_inl(ida, R_INT_PENDING) == 0)
456 		return;				/* not our interrupt */
457 
458 	while ((completed = ida_inl(ida, R_DONE_FIFO)) != 0) {
459 		qcb = idahwqcbptov(ida, completed & ~3);
460 
461 		if (qcb == NULL || qcb->state != QCB_ACTIVE) {
462 			device_printf(ida->dev,
463 			    "ignoring completion %x\n", completed);
464 			continue;
465 		}
466 		ida_done(ida, qcb);
467 	}
468 	ida_start(ida);
469 }
470 
471 /*
472  * should switch out command type; may be status, not just I/O.
473  */
474 static void
475 ida_done(struct ida_softc *ida, struct ida_qcb *qcb)
476 {
477 	int error = 0;
478 
479 	/*
480 	 * finish up command
481 	 */
482 	if (qcb->flags & DMA_DATA_TRANSFER) {
483 		bus_dmasync_op_t op;
484 
485 		op = qcb->flags & DMA_DATA_IN ?
486 		    BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE;
487 		bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
488 		bus_dmamap_unload(ida->buffer_dmat, qcb->dmamap);
489 	}
490 
491 	if (qcb->hwqcb->req.error & SOFT_ERROR)
492 		device_printf(ida->dev, "soft error\n");
493 	if (qcb->hwqcb->req.error & HARD_ERROR) {
494 		error = 1;
495 		device_printf(ida->dev, "hard error\n");
496 	}
497 	if (qcb->hwqcb->req.error & CMD_REJECTED) {
498 		error = 1;
499 		device_printf(ida->dev, "invalid request\n");
500 	}
501 
502 	if (qcb->flags & IDA_COMMAND) {
503 		if (ida->flags & IDA_ATTACHED)
504 			wakeup(qcb);
505 	} else {
506 		if (error)
507 			qcb->buf->b_flags |= B_ERROR;
508 		id_intr(qcb->buf);
509 	}
510 
511 	qcb->state = QCB_FREE;
512 	SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
513 	ida_construct_qcb(ida);
514 }
515