1 /* 2 * Copyright (c) 2004 Texas A&M University 3 * All rights reserved. 4 * 5 * Developer: Wm. Daryl Hawkins 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _ICHWD_H_ 32 #define _ICHWD_H_ 33 34 struct ichwd_device { 35 uint16_t vendor; 36 uint16_t device; 37 char *desc; 38 }; 39 40 struct ichwd_softc { 41 device_t device; 42 43 int active; 44 unsigned int timeout; 45 46 int smi_rid; 47 struct resource *smi_res; 48 bus_space_tag_t smi_bst; 49 bus_space_handle_t smi_bsh; 50 51 int tco_rid; 52 struct resource *tco_res; 53 bus_space_tag_t tco_bst; 54 bus_space_handle_t tco_bsh; 55 56 eventhandler_tag ev_tag; 57 }; 58 59 #define VENDORID_INTEL 0x8086 60 #define DEVICEID_82801AA 0x2410 61 #define DEVICEID_82801AB 0x2420 62 #define DEVICEID_82801BA 0x2440 63 #define DEVICEID_82801BAM 0x244c 64 #define DEVICEID_82801CA 0x2480 65 #define DEVICEID_82801CAM 0x248c 66 #define DEVICEID_82801DB 0x24c0 67 #define DEVICEID_82801DBM 0x24cc 68 #define DEVICEID_82801E 0x2450 69 #define DEVICEID_82801EBR 0x24d0 70 71 /* ICH LPC Interface Bridge Registers */ 72 #define ICH_GEN_STA 0xd4 73 #define ICH_GEN_STA_NO_REBOOT 0x02 74 #define ICH_PMBASE 0x40 /* ACPI base address register */ 75 #define ICH_PMBASE_MASK 0x7f80 /* bits 7-15 */ 76 77 /* register names and locations (relative to PMBASE) */ 78 #define SMI_BASE 0x30 /* base address for SMI registers */ 79 #define SMI_LEN 0x08 80 #define SMI_EN 0x00 /* SMI Control and Enable Register */ 81 #define SMI_STS 0x04 /* SMI Status Register */ 82 #define TCO_BASE 0x60 /* base address for TCO registers */ 83 #define TCO_LEN 0x0a 84 #define TCO_RLD 0x00 /* TCO Reload and Current Value */ 85 #define TCO_TMR 0x01 /* TCO Timer Initial Value */ 86 #define TCO_DAT_IN 0x02 /* TCO Data In (DO NOT USE) */ 87 #define TCO_DAT_OUT 0x03 /* TCO Data Out (DO NOT USE) */ 88 #define TCO1_STS 0x04 /* TCO Status 1 */ 89 #define TCO2_STS 0x06 /* TCO Status 2 */ 90 #define TCO1_CNT 0x08 /* TCO Control 1 */ 91 92 /* bit definitions for SMI_EN and SMI_STS */ 93 #define SMI_TCO_EN 0x2000 94 #define SMI_TCO_STS 0x2000 95 96 /* timer value mask for TCO_RLD and TCO_TMR */ 97 #define TCO_TIMER_MASK 0x1f 98 99 /* status bits for TCO1_STS */ 100 #define TCO_TIMEOUT 0x08 /* timed out */ 101 #define TCO_INT_STS 0x04 /* data out (DO NOT USE) */ 102 #define TCO_SMI_STS 0x02 /* data in (DO NOT USE) */ 103 104 /* status bits for TCO2_STS */ 105 #define TCO_BOOT_STS 0x04 /* failed to come out of reset */ 106 #define TCO_SECOND_TO_STS 0x02 /* ran down twice */ 107 108 /* control bits for TCO1_CNT */ 109 #define TCO_TMR_HALT 0x0800 /* clear to enable WDT */ 110 #define TCO_CNT_PRESERVE 0x0200 /* preserve these bits */ 111 112 /* approximate length in nanoseconds of one WDT tick */ 113 #define ICHWD_TICK 600000000 114 115 /* minimum / maximum timeout in WDT ticks */ 116 #define ICHWD_MIN_TIMEOUT 2 117 #define ICHWD_MAX_TIMEOUT 63 118 119 #endif 120