1 /* 2 * Copyright (c) 2004 Texas A&M University 3 * All rights reserved. 4 * 5 * Developer: Wm. Daryl Hawkins 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Intel ICH Watchdog Timer (WDT) driver 31 * 32 * Originally developed by Wm. Daryl Hawkins of Texas A&M 33 * Heavily modified by <des@FreeBSD.org> 34 * 35 * This is a tricky one. The ICH WDT can't be treated as a regular PCI 36 * device as it's actually an integrated function of the ICH LPC interface 37 * bridge. Detection is also awkward, because we can only infer the 38 * presence of the watchdog timer from the fact that the machine has an 39 * ICH chipset, or, on ACPI 2.x systems, by the presence of the 'WDDT' 40 * ACPI table (although this driver does not support the ACPI detection 41 * method). 42 * 43 * There is one slight problem on non-ACPI or ACPI 1.x systems: we have no 44 * way of knowing if the WDT is permanently disabled (either by the BIOS 45 * or in hardware). 46 * 47 * The WDT is programmed through I/O registers in the ACPI I/O space. 48 * Intel swears it's always at offset 0x60, so we use that. 49 * 50 * For details about the ICH WDT, see Intel Application Note AP-725 51 * (document no. 292273-001). The WDT is also described in the individual 52 * chipset datasheets, e.g. Intel82801EB ICH5 / 82801ER ICH5R Datasheet 53 * (document no. 252516-001) sections 9.10 and 9.11. 54 */ 55 56 #include <sys/cdefs.h> 57 __FBSDID("$FreeBSD$"); 58 59 #include <sys/param.h> 60 #include <sys/kernel.h> 61 #include <sys/systm.h> 62 #include <sys/bus.h> 63 #include <machine/bus.h> 64 #include <sys/rman.h> 65 #include <machine/resource.h> 66 #include <sys/watchdog.h> 67 68 #include <dev/pci/pcivar.h> 69 70 #include <dev/ichwd/ichwd.h> 71 72 static struct ichwd_device ichwd_devices[] = { 73 { VENDORID_INTEL, DEVICEID_82801AA, "Intel 82801AA watchdog timer" }, 74 { VENDORID_INTEL, DEVICEID_82801AB, "Intel 82801AB watchdog timer" }, 75 { VENDORID_INTEL, DEVICEID_82801BA, "Intel 82801BA watchdog timer" }, 76 { VENDORID_INTEL, DEVICEID_82801BAM, "Intel 82801BAM watchdog timer" }, 77 { VENDORID_INTEL, DEVICEID_82801CA, "Intel 82801CA watchdog timer" }, 78 { VENDORID_INTEL, DEVICEID_82801CAM, "Intel 82801CAM watchdog timer" }, 79 { VENDORID_INTEL, DEVICEID_82801DB, "Intel 82801DB watchdog timer" }, 80 { VENDORID_INTEL, DEVICEID_82801DBM, "Intel 82801DBM watchdog timer" }, 81 { VENDORID_INTEL, DEVICEID_82801E, "Intel 82801E watchdog timer" }, 82 { VENDORID_INTEL, DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer" }, 83 { 0, 0, NULL }, 84 }; 85 86 static devclass_t ichwd_devclass; 87 88 #define ichwd_read_1(sc, off) \ 89 bus_space_read_1((sc)->smi_bst, (sc)->smi_bsh, (off)) 90 #define ichwd_read_2(sc, off) \ 91 bus_space_read_2((sc)->smi_bst, (sc)->smi_bsh, (off)) 92 #define ichwd_read_4(sc, off) \ 93 bus_space_read_4((sc)->smi_bst, (sc)->smi_bsh, (off)) 94 95 #define ichwd_write_1(sc, off, val) \ 96 bus_space_write_1((sc)->smi_bst, (sc)->smi_bsh, (off), (val)) 97 #define ichwd_write_2(sc, off, val) \ 98 bus_space_write_2((sc)->smi_bst, (sc)->smi_bsh, (off), (val)) 99 #define ichwd_write_4(sc, off, val) \ 100 bus_space_write_4((sc)->smi_bst, (sc)->smi_bsh, (off), (val)) 101 102 static __inline void 103 ichwd_intr_enable(struct ichwd_softc *sc) 104 { 105 ichwd_write_4(sc, SMI_EN, ichwd_read_4(sc, SMI_EN) | SMI_TCO_EN); 106 } 107 108 static __inline void 109 ichwd_intr_disable(struct ichwd_softc *sc) 110 { 111 ichwd_write_4(sc, SMI_EN, ichwd_read_4(sc, SMI_EN) & ~SMI_TCO_EN); 112 } 113 114 static __inline void 115 ichwd_sts_reset(struct ichwd_softc *sc) 116 { 117 ichwd_write_2(sc, TCO1_STS, TCO_TIMEOUT); 118 ichwd_write_2(sc, TCO2_STS, TCO_BOOT_STS); 119 ichwd_write_2(sc, TCO2_STS, TCO_SECOND_TO_STS); 120 } 121 122 static __inline void 123 ichwd_tmr_enable(struct ichwd_softc *sc) 124 { 125 uint16_t cnt; 126 127 cnt = ichwd_read_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE; 128 ichwd_write_2(sc, TCO1_CNT, cnt & ~TCO_TMR_HALT); 129 sc->active = 1; 130 if (bootverbose) 131 device_printf(sc->device, "timer enabled\n"); 132 } 133 134 static __inline void 135 ichwd_tmr_disable(struct ichwd_softc *sc) 136 { 137 uint16_t cnt; 138 139 cnt = ichwd_read_2(sc, TCO1_CNT) & TCO_CNT_PRESERVE; 140 ichwd_write_2(sc, TCO1_CNT, cnt | TCO_TMR_HALT); 141 sc->active = 0; 142 if (bootverbose) 143 device_printf(sc->device, "timer disabled\n"); 144 } 145 146 static __inline void 147 ichwd_tmr_reload(struct ichwd_softc *sc) 148 { 149 ichwd_write_1(sc, TCO_RLD, 1); 150 if (bootverbose) 151 device_printf(sc->device, "timer reloaded\n"); 152 } 153 154 static __inline void 155 ichwd_tmr_set(struct ichwd_softc *sc, uint8_t timeout) 156 { 157 ichwd_write_1(sc, TCO_TMR, timeout); 158 sc->timeout = timeout; 159 if (bootverbose) 160 device_printf(sc->device, "timeout set to %u ticks\n", timeout); 161 } 162 163 /* 164 * Watchdog event handler. 165 */ 166 static void 167 ichwd_event(void *arg, unsigned int cmd, int *error) 168 { 169 struct ichwd_softc *sc = arg; 170 unsigned int timeout; 171 172 cmd &= WD_INTERVAL; 173 174 /* disable / enable */ 175 if (cmd == 0) { 176 if (sc->active) 177 ichwd_tmr_disable(sc); 178 *error = 0; 179 return; 180 } 181 if (!sc->active) 182 ichwd_tmr_enable(sc); 183 184 /* convert from power-of-to-ns to WDT ticks */ 185 if (cmd >= 64) { 186 *error = EINVAL; 187 return; 188 } 189 timeout = ((uint64_t)1 << cmd) / ICHWD_TICK; 190 if (timeout < ICHWD_MIN_TIMEOUT || timeout > ICHWD_MAX_TIMEOUT) { 191 *error = EINVAL; 192 return; 193 } 194 195 /* set new initial value */ 196 if (timeout != sc->timeout) 197 ichwd_tmr_set(sc, timeout); 198 199 /* reload */ 200 ichwd_tmr_reload(sc); 201 202 *error = 0; 203 return; 204 } 205 206 static int 207 ichwd_probe(device_t dev) 208 { 209 (void)dev; 210 return (0); 211 } 212 213 static unsigned long pmbase; 214 215 /* 216 * Look for an ICH LPC interface bridge. If one is found, register an 217 * ichwd device. There can be only one. 218 */ 219 static void 220 ichwd_identify(driver_t *driver, device_t parent) 221 { 222 struct ichwd_device *id; 223 device_t ich = NULL; 224 device_t dev; 225 226 printf("%s()\n", __func__); 227 228 /* look for an ICH LPC interface bridge */ 229 for (id = ichwd_devices; id->desc != NULL; ++id) 230 if ((ich = pci_find_device(id->vendor, id->device)) != NULL) 231 break; 232 if (ich == NULL) 233 return; 234 235 if (bootverbose) 236 printf("%s(): found ICH chipset: %s\n", __func__, id->desc); 237 238 /* get for ACPI base address */ 239 pmbase = pci_read_config(ich, ICH_PMBASE, 2) & ICH_PMBASE_MASK; 240 if (pmbase == 0) { 241 if (bootverbose) 242 printf("%s(): ICH PMBASE register is empty\n", 243 __func__); 244 return; 245 } 246 247 /* try to clear the NO_REBOOT bit */ 248 pci_write_config(ich, ICH_GEN_STA, 0x00, 1); 249 if (pci_read_config(ich, ICH_GEN_STA, 1) & ICH_GEN_STA_NO_REBOOT) { 250 if (bootverbose) 251 printf("%s(): ICH WDT present but disabled\n", 252 __func__); 253 return; 254 } 255 256 /* good, add child to bus */ 257 if ((dev = device_find_child(parent, driver->name, 0)) == NULL) 258 dev = BUS_ADD_CHILD(parent, 0, driver->name, -1); 259 device_set_desc_copy(dev, id->desc); 260 device_set_driver(dev, driver); 261 } 262 263 static int 264 ichwd_attach(device_t dev) 265 { 266 struct ichwd_softc *sc; 267 268 device_printf(dev, "attaching\n"); 269 270 sc = device_get_softc(dev); 271 sc->device = dev; 272 273 /* allocate I/O register space */ 274 sc->smi_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->smi_rid, 275 pmbase + SMI_BASE, pmbase + SMI_BASE + SMI_LEN - 1, SMI_LEN, 276 RF_ACTIVE|RF_SHAREABLE); 277 if (sc->smi_res == NULL) { 278 device_printf(dev, "unable to reserve SMI registers\n"); 279 goto fail; 280 } 281 sc->smi_bst = rman_get_bustag(sc->smi_res); 282 sc->smi_bsh = rman_get_bushandle(sc->smi_res); 283 sc->tco_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->tco_rid, 284 pmbase + TCO_BASE, pmbase + TCO_BASE + TCO_LEN - 1, TCO_LEN, 285 RF_ACTIVE|RF_SHAREABLE); 286 if (sc->tco_res == NULL) { 287 device_printf(dev, "unable to reserve TCO registers\n"); 288 goto fail; 289 } 290 sc->tco_bst = rman_get_bustag(sc->tco_res); 291 sc->tco_bsh = rman_get_bushandle(sc->tco_res); 292 293 /* reset the watchdog status registers */ 294 ichwd_sts_reset(sc); 295 296 /* make sure the WDT starts out inactive */ 297 ichwd_tmr_disable(sc); 298 299 /* register the watchdog event handler */ 300 sc->ev_tag = EVENTHANDLER_REGISTER(watchdog_list, ichwd_event, sc, 0); 301 302 /* enable watchdog timeout interrupts */ 303 ichwd_intr_enable(sc); 304 305 return (0); 306 fail: 307 sc = device_get_softc(dev); 308 if (sc->tco_res != NULL) 309 bus_release_resource(dev, SYS_RES_IOPORT, 310 sc->tco_rid, sc->tco_res); 311 if (sc->smi_res != NULL) 312 bus_release_resource(dev, SYS_RES_IOPORT, 313 sc->smi_rid, sc->smi_res); 314 return (ENXIO); 315 } 316 317 static int 318 ichwd_detach(device_t dev) 319 { 320 struct ichwd_softc *sc; 321 322 device_printf(dev, "detaching\n"); 323 324 sc = device_get_softc(dev); 325 326 /* halt the watchdog timer */ 327 if (sc->active) 328 ichwd_tmr_disable(sc); 329 330 /* disable watchdog timeout interrupts */ 331 ichwd_intr_disable(sc); 332 333 /* deregister event handler */ 334 if (sc->ev_tag != NULL) 335 EVENTHANDLER_DEREGISTER(watchdog_list, sc->ev_tag); 336 sc->ev_tag = NULL; 337 338 /* reset the watchdog status registers */ 339 ichwd_sts_reset(sc); 340 341 /* deallocate I/O register space */ 342 bus_release_resource(dev, SYS_RES_IOPORT, sc->tco_rid, sc->tco_res); 343 bus_release_resource(dev, SYS_RES_IOPORT, sc->smi_rid, sc->smi_res); 344 345 return (0); 346 } 347 348 static device_method_t ichwd_methods[] = { 349 DEVMETHOD(device_identify, ichwd_identify), 350 DEVMETHOD(device_probe, ichwd_probe), 351 DEVMETHOD(device_attach, ichwd_attach), 352 DEVMETHOD(device_detach, ichwd_detach), 353 {0,0} 354 }; 355 356 static driver_t ichwd_driver = { 357 "ichwd", 358 ichwd_methods, 359 sizeof(struct ichwd_softc), 360 }; 361 362 static int 363 ichwd_modevent(module_t mode, int type, void *data) 364 { 365 int error = 0; 366 367 switch (type) { 368 case MOD_LOAD: 369 printf("ichwd module loaded\n"); 370 break; 371 case MOD_UNLOAD: 372 printf("ichwd module unloaded\n"); 373 break; 374 case MOD_SHUTDOWN: 375 printf("ichwd module shutting down\n"); 376 break; 377 } 378 return (error); 379 } 380 381 DRIVER_MODULE(ichwd, nexus, ichwd_driver, ichwd_devclass, ichwd_modevent, NULL); 382 /* 383 * this doesn't seem to work, though I can't figure out why. 384 * currently not a big issue since watchdog is standard. 385 MODULE_DEPEND(ichwd, watchdog, 1, 1, 1); 386 */ 387