1 2 /* 3 * ichsmb_reg.h 4 * 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * 8 * Subject to the following obligations and disclaimer of warranty, use and 9 * redistribution of this software, in source or object code forms, with or 10 * without modifications are expressly permitted by Whistle Communications; 11 * provided, however, that: 12 * 1. Any and all reproductions of the source or object code must include the 13 * copyright notice above and the following disclaimer of warranties; and 14 * 2. No rights are granted, in any manner or form, to use Whistle 15 * Communications, Inc. trademarks, including the mark "WHISTLE 16 * COMMUNICATIONS" on advertising, endorsements, or otherwise except as 17 * such appears in the above copyright notice or in the software. 18 * 19 * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND 20 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO 21 * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE, 22 * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF 23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 24 * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY 25 * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS 26 * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE. 27 * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES 28 * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING 29 * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 30 * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 35 * OF SUCH DAMAGE. 36 * 37 * Author: Archie Cobbs <archie@freebsd.org> 38 * 39 * $FreeBSD$ 40 */ 41 42 #ifndef _DEV_ICHSMB_ICHSMB_REG_H_ 43 #define _DEV_ICHSMB_ICHSMB_REG_H_ 44 45 /* 46 * Definitions for the SMBus controller logical device which is part of the 47 * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips. 48 */ 49 50 /* 51 * PCI configuration registers 52 */ 53 #define ICH_SMB_BASE 0x20 /* base address register */ 54 #define ICH_HOSTC 0x40 /* host config register */ 55 #define ICH_HOSTC_I2C_EN 0x04 /* enable i2c mode */ 56 #define ICH_HOSTC_SMB_SMI_EN 0x02 /* SMI# instead of irq */ 57 #define ICH_HOSTC_HST_EN 0x01 /* enable host cntrlr */ 58 59 /* 60 * I/O registers 61 */ 62 #define ICH_HST_STA 0x00 /* host status */ 63 #define ICH_HST_STA_BYTE_DONE_STS 0x80 /* byte send/rec'd */ 64 #define ICH_HST_STA_INUSE_STS 0x40 /* device access mutex */ 65 #define ICH_HST_STA_SMBALERT_STS 0x20 /* SMBALERT# signal */ 66 #define ICH_HST_STA_FAILED 0x10 /* failed bus transaction */ 67 #define ICH_HST_STA_BUS_ERR 0x08 /* transaction collision */ 68 #define ICH_HST_STA_DEV_ERR 0x04 /* misc. smb device error */ 69 #define ICH_HST_STA_INTR 0x02 /* command completed ok */ 70 #define ICH_HST_STA_HOST_BUSY 0x01 /* command is running */ 71 #define ICH_HST_CNT 0x02 /* host control */ 72 #define ICH_HST_CNT_START 0x40 /* start command */ 73 #define ICH_HST_CNT_LAST_BYTE 0x20 /* indicate last byte */ 74 #define ICH_HST_CNT_SMB_CMD_QUICK 0x00 /* command: quick */ 75 #define ICH_HST_CNT_SMB_CMD_BYTE 0x04 /* command: byte */ 76 #define ICH_HST_CNT_SMB_CMD_BYTE_DATA 0x08 /* command: byte data */ 77 #define ICH_HST_CNT_SMB_CMD_WORD_DATA 0x0c /* command: word data */ 78 #define ICH_HST_CNT_SMB_CMD_PROC_CALL 0x10 /* command: process call */ 79 #define ICH_HST_CNT_SMB_CMD_BLOCK 0x14 /* command: block */ 80 #define ICH_HST_CNT_SMB_CMD_I2C_READ 0x18 /* command: i2c read */ 81 #define ICH_HST_CNT_KILL 0x02 /* kill current transaction */ 82 #define ICH_HST_CNT_INTREN 0x01 /* enable interrupt */ 83 #define ICH_HST_CMD 0x03 /* host command */ 84 #define ICH_XMIT_SLVA 0x04 /* transmit slave address */ 85 #define ICH_XMIT_SLVA_READ 0x01 /* direction: read */ 86 #define ICH_XMIT_SLVA_WRITE 0x00 /* direction: write */ 87 #define ICH_D0 0x05 /* host data 0 */ 88 #define ICH_D1 0x06 /* host data 1 */ 89 #define ICH_BLOCK_DB 0x07 /* block data byte */ 90 91 #endif /* _DEV_ICHSMB_ICHSMB_REG_H_ */ 92 93