xref: /freebsd/sys/dev/ichsmb/ichsmb_pci.c (revision f0a75d274af375d15b97b830966b99a02b7db911)
1 /*-
2  * ichsmb_pci.c
3  *
4  * Author: Archie Cobbs <archie@freebsd.org>
5  * Copyright (c) 2000 Whistle Communications, Inc.
6  * All rights reserved.
7  * Author: Archie Cobbs <archie@freebsd.org>
8  *
9  * Subject to the following obligations and disclaimer of warranty, use and
10  * redistribution of this software, in source or object code forms, with or
11  * without modifications are expressly permitted by Whistle Communications;
12  * provided, however, that:
13  * 1. Any and all reproductions of the source or object code must include the
14  *    copyright notice above and the following disclaimer of warranties; and
15  * 2. No rights are granted, in any manner or form, to use Whistle
16  *    Communications, Inc. trademarks, including the mark "WHISTLE
17  *    COMMUNICATIONS" on advertising, endorsements, or otherwise except as
18  *    such appears in the above copyright notice or in the software.
19  *
20  * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
21  * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
22  * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
23  * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
24  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
25  * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
26  * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
27  * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
28  * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
29  * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
30  * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
31  * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35  * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
36  * OF SUCH DAMAGE.
37  */
38 
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
41 
42 /*
43  * Support for the SMBus controller logical device which is part of the
44  * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips.
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/errno.h>
52 #include <sys/lock.h>
53 #include <sys/mutex.h>
54 #include <sys/syslog.h>
55 #include <sys/bus.h>
56 
57 #include <machine/bus.h>
58 #include <sys/rman.h>
59 #include <machine/resource.h>
60 
61 #include <dev/pci/pcivar.h>
62 #include <dev/pci/pcireg.h>
63 
64 #include <dev/smbus/smbconf.h>
65 
66 #include <dev/ichsmb/ichsmb_var.h>
67 #include <dev/ichsmb/ichsmb_reg.h>
68 
69 /* PCI unique identifiers */
70 #define ID_82801AA			0x24138086
71 #define ID_82801AB			0x24238086
72 #define ID_82801BA			0x24438086
73 #define ID_82801CA			0x24838086
74 #define ID_82801DC			0x24C38086
75 #define ID_82801EB			0x24D38086
76 #define ID_6300ESB			0x25a48086
77 #define	ID_631xESB			0x269b8086
78 
79 #define PCIS_SERIALBUS_SMBUS_PROGIF	0x00
80 
81 /* Internal functions */
82 static int	ichsmb_pci_probe(device_t dev);
83 static int	ichsmb_pci_attach(device_t dev);
84 /*Use generic one for now*/
85 #if 0
86 static int	ichsmb_pci_detach(device_t dev);
87 #endif
88 
89 /* Device methods */
90 static device_method_t ichsmb_pci_methods[] = {
91 	/* Device interface */
92         DEVMETHOD(device_probe, ichsmb_pci_probe),
93         DEVMETHOD(device_attach, ichsmb_pci_attach),
94         DEVMETHOD(device_detach, ichsmb_detach),
95 
96 	/* Bus methods */
97         DEVMETHOD(bus_print_child, bus_generic_print_child),
98 
99 	/* SMBus methods */
100         DEVMETHOD(smbus_callback, ichsmb_callback),
101         DEVMETHOD(smbus_quick, ichsmb_quick),
102         DEVMETHOD(smbus_sendb, ichsmb_sendb),
103         DEVMETHOD(smbus_recvb, ichsmb_recvb),
104         DEVMETHOD(smbus_writeb, ichsmb_writeb),
105         DEVMETHOD(smbus_writew, ichsmb_writew),
106         DEVMETHOD(smbus_readb, ichsmb_readb),
107         DEVMETHOD(smbus_readw, ichsmb_readw),
108         DEVMETHOD(smbus_pcall, ichsmb_pcall),
109         DEVMETHOD(smbus_bwrite, ichsmb_bwrite),
110         DEVMETHOD(smbus_bread, ichsmb_bread),
111 	{ 0, 0 }
112 };
113 
114 static driver_t ichsmb_pci_driver = {
115 	"ichsmb",
116 	ichsmb_pci_methods,
117 	sizeof(struct ichsmb_softc)
118 };
119 
120 static devclass_t ichsmb_pci_devclass;
121 
122 DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0);
123 
124 static int
125 ichsmb_pci_probe(device_t dev)
126 {
127 	/* Check PCI identifier */
128 	switch (pci_get_devid(dev)) {
129 	case ID_82801AA:
130 		device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller");
131 		break;
132 	case ID_82801AB:
133 		device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller");
134 		break;
135 	case ID_82801BA:
136 		device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller");
137 		break;
138 	case ID_82801CA:
139 		device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller");
140 		break;
141 	case ID_82801DC:
142 		device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller");
143 		break;
144 	case ID_82801EB:
145 		device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller");
146 		break;
147 	case ID_6300ESB:
148 		device_set_desc(dev, "Intel 6300ESB (ICH) SMBus controller");
149 		break;
150 	case ID_631xESB:
151 		device_set_desc(dev, "Intel 631xESB/6321ESB (ESB2) SMBus controller");
152 		break;
153 	default:
154 		if (pci_get_class(dev) == PCIC_SERIALBUS
155 		    && pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS
156 		    && pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) {
157 			device_set_desc(dev, "SMBus controller");
158 			return (BUS_PROBE_DEFAULT); /* XXX */
159 		}
160 		return (ENXIO);
161 	}
162 
163 	/* Done */
164 	return (ichsmb_probe(dev));
165 }
166 
167 static int
168 ichsmb_pci_attach(device_t dev)
169 {
170 	const sc_p sc = device_get_softc(dev);
171 	int error;
172 
173 	/* Initialize private state */
174 	bzero(sc, sizeof(*sc));
175 	sc->ich_cmd = -1;
176 	sc->dev = dev;
177 
178 	/* Allocate an I/O range */
179 	sc->io_rid = ICH_SMB_BASE;
180 	sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
181 	    &sc->io_rid, 0, ~0, 16, RF_ACTIVE);
182 	if (sc->io_res == NULL)
183 		sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
184 		    &sc->io_rid, 0, ~0, 32, RF_ACTIVE);
185 	if (sc->io_res == NULL) {
186 		device_printf(dev, "can't map I/O\n");
187 		error = ENXIO;
188 		goto fail;
189 	}
190 	sc->io_bst = rman_get_bustag(sc->io_res);
191 	sc->io_bsh = rman_get_bushandle(sc->io_res);
192 
193 	/* Allocate interrupt */
194 	sc->irq_rid = 0;
195 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
196 	    &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE);
197 	if (sc->irq_res == NULL) {
198 		device_printf(dev, "can't get IRQ\n");
199 		error = ENXIO;
200 		goto fail;
201 	}
202 
203 	/* Enable device */
204 	pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1);
205 
206 	/* Done */
207 	error = ichsmb_attach(dev);
208 	if (error)
209 		goto fail;
210 	return (0);
211 
212 fail:
213 	/* Attach failed, release resources */
214 	ichsmb_release_resources(sc);
215 	return (error);
216 }
217 
218 
219 MODULE_DEPEND(ichsmb, pci, 1, 1, 1);
220 MODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
221 MODULE_VERSION(ichsmb, 1);
222