xref: /freebsd/sys/dev/ichsmb/ichsmb_pci.c (revision c6ec7d31830ab1c80edae95ad5e4b9dba10c47ac)
1 /*-
2  * ichsmb_pci.c
3  *
4  * Author: Archie Cobbs <archie@freebsd.org>
5  * Copyright (c) 2000 Whistle Communications, Inc.
6  * All rights reserved.
7  * Author: Archie Cobbs <archie@freebsd.org>
8  *
9  * Subject to the following obligations and disclaimer of warranty, use and
10  * redistribution of this software, in source or object code forms, with or
11  * without modifications are expressly permitted by Whistle Communications;
12  * provided, however, that:
13  * 1. Any and all reproductions of the source or object code must include the
14  *    copyright notice above and the following disclaimer of warranties; and
15  * 2. No rights are granted, in any manner or form, to use Whistle
16  *    Communications, Inc. trademarks, including the mark "WHISTLE
17  *    COMMUNICATIONS" on advertising, endorsements, or otherwise except as
18  *    such appears in the above copyright notice or in the software.
19  *
20  * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
21  * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
22  * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
23  * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
24  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
25  * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
26  * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
27  * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
28  * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
29  * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
30  * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
31  * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35  * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
36  * OF SUCH DAMAGE.
37  */
38 
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
41 
42 /*
43  * Support for the SMBus controller logical device which is part of the
44  * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips.
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
51 #include <sys/errno.h>
52 #include <sys/lock.h>
53 #include <sys/mutex.h>
54 #include <sys/syslog.h>
55 #include <sys/bus.h>
56 
57 #include <machine/bus.h>
58 #include <sys/rman.h>
59 #include <machine/resource.h>
60 
61 #include <dev/pci/pcivar.h>
62 #include <dev/pci/pcireg.h>
63 
64 #include <dev/smbus/smbconf.h>
65 
66 #include <dev/ichsmb/ichsmb_var.h>
67 #include <dev/ichsmb/ichsmb_reg.h>
68 
69 /* PCI unique identifiers */
70 #define ID_82801AA			0x24138086
71 #define ID_82801AB			0x24238086
72 #define ID_82801BA			0x24438086
73 #define ID_82801CA			0x24838086
74 #define ID_82801DC			0x24C38086
75 #define ID_82801EB			0x24D38086
76 #define ID_82801FB			0x266A8086
77 #define ID_82801GB			0x27da8086
78 #define ID_82801H			0x283e8086
79 #define ID_82801I			0x29308086
80 #define ID_82801JI			0x3a308086
81 #define ID_PCH				0x3b308086
82 #define ID_6300ESB			0x25a48086
83 #define	ID_631xESB			0x269b8086
84 #define ID_DH89XXCC			0x23308086
85 #define ID_PATSBURG			0x1d228086
86 #define ID_CPT				0x1c228086
87 #define ID_PPT				0x1e228086
88 
89 #define PCIS_SERIALBUS_SMBUS_PROGIF	0x00
90 
91 /* Internal functions */
92 static int	ichsmb_pci_probe(device_t dev);
93 static int	ichsmb_pci_attach(device_t dev);
94 /*Use generic one for now*/
95 #if 0
96 static int	ichsmb_pci_detach(device_t dev);
97 #endif
98 
99 /* Device methods */
100 static device_method_t ichsmb_pci_methods[] = {
101 	/* Device interface */
102         DEVMETHOD(device_probe, ichsmb_pci_probe),
103         DEVMETHOD(device_attach, ichsmb_pci_attach),
104         DEVMETHOD(device_detach, ichsmb_detach),
105 
106 	/* SMBus methods */
107         DEVMETHOD(smbus_callback, ichsmb_callback),
108         DEVMETHOD(smbus_quick, ichsmb_quick),
109         DEVMETHOD(smbus_sendb, ichsmb_sendb),
110         DEVMETHOD(smbus_recvb, ichsmb_recvb),
111         DEVMETHOD(smbus_writeb, ichsmb_writeb),
112         DEVMETHOD(smbus_writew, ichsmb_writew),
113         DEVMETHOD(smbus_readb, ichsmb_readb),
114         DEVMETHOD(smbus_readw, ichsmb_readw),
115         DEVMETHOD(smbus_pcall, ichsmb_pcall),
116         DEVMETHOD(smbus_bwrite, ichsmb_bwrite),
117         DEVMETHOD(smbus_bread, ichsmb_bread),
118 
119 	DEVMETHOD_END
120 };
121 
122 static driver_t ichsmb_pci_driver = {
123 	"ichsmb",
124 	ichsmb_pci_methods,
125 	sizeof(struct ichsmb_softc)
126 };
127 
128 static devclass_t ichsmb_pci_devclass;
129 
130 DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0);
131 
132 static int
133 ichsmb_pci_probe(device_t dev)
134 {
135 	/* Check PCI identifier */
136 	switch (pci_get_devid(dev)) {
137 	case ID_82801AA:
138 		device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller");
139 		break;
140 	case ID_82801AB:
141 		device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller");
142 		break;
143 	case ID_82801BA:
144 		device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller");
145 		break;
146 	case ID_82801CA:
147 		device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller");
148 		break;
149 	case ID_82801DC:
150 		device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller");
151 		break;
152 	case ID_82801EB:
153 		device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller");
154 		break;
155 	case ID_82801FB:
156 		device_set_desc(dev, "Intel 82801FB (ICH6) SMBus controller");
157 		break;
158 	case ID_82801GB:
159 		device_set_desc(dev, "Intel 82801GB (ICH7) SMBus controller");
160 		break;
161 	case ID_82801H:
162 		device_set_desc(dev, "Intel 82801H (ICH8) SMBus controller");
163 		break;
164 	case ID_82801I:
165 		device_set_desc(dev, "Intel 82801I (ICH9) SMBus controller");
166 		break;
167 	case ID_82801JI:
168 		device_set_desc(dev, "Intel 82801JI (ICH10) SMBus controller");
169 		break;
170 	case ID_PCH:
171 		device_set_desc(dev, "Intel PCH SMBus controller");
172 		break;
173 	case ID_6300ESB:
174 		device_set_desc(dev, "Intel 6300ESB (ICH) SMBus controller");
175 		break;
176 	case ID_631xESB:
177 		device_set_desc(dev, "Intel 631xESB/6321ESB (ESB2) SMBus controller");
178 		break;
179 	case ID_DH89XXCC:
180 		device_set_desc(dev, "Intel DH89xxCC SMBus controller");
181 		break;
182 	case ID_PATSBURG:
183 		device_set_desc(dev, "Intel Patsburg SMBus controller");
184 		break;
185 	case ID_CPT:
186 		device_set_desc(dev, "Intel Cougar Point SMBus controller");
187 		break;
188 	case ID_PPT:
189 		device_set_desc(dev, "Intel Panther Point SMBus controller");
190 		break;
191 	default:
192 		return (ENXIO);
193 	}
194 
195 	/* Done */
196 	return (ichsmb_probe(dev));
197 }
198 
199 static int
200 ichsmb_pci_attach(device_t dev)
201 {
202 	const sc_p sc = device_get_softc(dev);
203 	int error;
204 
205 	/* Initialize private state */
206 	bzero(sc, sizeof(*sc));
207 	sc->ich_cmd = -1;
208 	sc->dev = dev;
209 
210 	/* Allocate an I/O range */
211 	sc->io_rid = ICH_SMB_BASE;
212 	sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
213 	    &sc->io_rid, 0, ~0, 16, RF_ACTIVE);
214 	if (sc->io_res == NULL)
215 		sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
216 		    &sc->io_rid, 0ul, ~0ul, 32, RF_ACTIVE);
217 	if (sc->io_res == NULL) {
218 		device_printf(dev, "can't map I/O\n");
219 		error = ENXIO;
220 		goto fail;
221 	}
222 
223 	/* Allocate interrupt */
224 	sc->irq_rid = 0;
225 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
226 	    &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE);
227 	if (sc->irq_res == NULL) {
228 		device_printf(dev, "can't get IRQ\n");
229 		error = ENXIO;
230 		goto fail;
231 	}
232 
233 	/* Enable device */
234 	pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1);
235 
236 	/* Done */
237 	error = ichsmb_attach(dev);
238 	if (error)
239 		goto fail;
240 	return (0);
241 
242 fail:
243 	/* Attach failed, release resources */
244 	ichsmb_release_resources(sc);
245 	return (error);
246 }
247 
248 
249 MODULE_DEPEND(ichsmb, pci, 1, 1, 1);
250 MODULE_DEPEND(ichsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
251 MODULE_VERSION(ichsmb, 1);
252