1 /* 2 * Copyright (c) 2014 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> and was subsequently ported 6 * to FreeBSD by Michael Gmelin <freebsd@grem.de> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in 16 * the documentation and/or other materials provided with the 17 * distribution. 18 * 3. Neither the name of The DragonFly Project nor the names of its 19 * contributors may be used to endorse or promote products derived 20 * from this software without specific, prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 25 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 26 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 28 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 30 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <sys/cdefs.h> 37 __FBSDID("$FreeBSD$"); 38 39 /* 40 * Intel fourth generation mobile cpus integrated I2C device. 41 * 42 * See ig4_reg.h for datasheet reference and notes. 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/module.h> 49 #include <sys/errno.h> 50 #include <sys/lock.h> 51 #include <sys/mutex.h> 52 #include <sys/sx.h> 53 #include <sys/syslog.h> 54 #include <sys/bus.h> 55 56 #include <machine/bus.h> 57 #include <sys/rman.h> 58 #include <machine/resource.h> 59 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 #include <dev/iicbus/iiconf.h> 63 64 #include <dev/ichiic/ig4_reg.h> 65 #include <dev/ichiic/ig4_var.h> 66 67 static int ig4iic_pci_detach(device_t dev); 68 69 #define PCI_CHIP_LYNXPT_LP_I2C_1 0x9c618086 70 #define PCI_CHIP_LYNXPT_LP_I2C_2 0x9c628086 71 72 static int 73 ig4iic_pci_probe(device_t dev) 74 { 75 switch(pci_get_devid(dev)) { 76 case PCI_CHIP_LYNXPT_LP_I2C_1: 77 device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-1"); 78 break; 79 case PCI_CHIP_LYNXPT_LP_I2C_2: 80 device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-2"); 81 break; 82 default: 83 return (ENXIO); 84 } 85 return (BUS_PROBE_DEFAULT); 86 } 87 88 static int 89 ig4iic_pci_attach(device_t dev) 90 { 91 ig4iic_softc_t *sc = device_get_softc(dev); 92 int error; 93 94 bzero(sc, sizeof(*sc)); 95 96 mtx_init(&sc->io_lock, "IG4 I/O lock", NULL, MTX_DEF); 97 sx_init(&sc->call_lock, "IG4 call lock"); 98 99 sc->dev = dev; 100 sc->regs_rid = PCIR_BAR(0); 101 sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 102 &sc->regs_rid, RF_ACTIVE); 103 if (sc->regs_res == NULL) { 104 device_printf(dev, "unable to map registers\n"); 105 ig4iic_pci_detach(dev); 106 return (ENXIO); 107 } 108 sc->intr_rid = 0; 109 if (pci_alloc_msi(dev, &sc->intr_rid)) { 110 device_printf(dev, "Using MSI\n"); 111 } 112 sc->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 113 &sc->intr_rid, RF_SHAREABLE | RF_ACTIVE); 114 if (sc->intr_res == NULL) { 115 device_printf(dev, "unable to map interrupt\n"); 116 ig4iic_pci_detach(dev); 117 return (ENXIO); 118 } 119 sc->pci_attached = 1; 120 121 error = ig4iic_attach(sc); 122 if (error) 123 ig4iic_pci_detach(dev); 124 125 return (error); 126 } 127 128 static int 129 ig4iic_pci_detach(device_t dev) 130 { 131 ig4iic_softc_t *sc = device_get_softc(dev); 132 int error; 133 134 if (sc->pci_attached) { 135 error = ig4iic_detach(sc); 136 if (error) 137 return (error); 138 sc->pci_attached = 0; 139 } 140 141 if (sc->intr_res) { 142 bus_release_resource(dev, SYS_RES_IRQ, 143 sc->intr_rid, sc->intr_res); 144 sc->intr_res = NULL; 145 } 146 if (sc->intr_rid != 0) 147 pci_release_msi(dev); 148 if (sc->regs_res) { 149 bus_release_resource(dev, SYS_RES_MEMORY, 150 sc->regs_rid, sc->regs_res); 151 sc->regs_res = NULL; 152 } 153 if (mtx_initialized(&sc->io_lock)) { 154 mtx_destroy(&sc->io_lock); 155 sx_destroy(&sc->call_lock); 156 } 157 158 return (0); 159 } 160 161 static device_method_t ig4iic_pci_methods[] = { 162 /* Device interface */ 163 DEVMETHOD(device_probe, ig4iic_pci_probe), 164 DEVMETHOD(device_attach, ig4iic_pci_attach), 165 DEVMETHOD(device_detach, ig4iic_pci_detach), 166 167 DEVMETHOD(iicbus_transfer, ig4iic_transfer), 168 DEVMETHOD(iicbus_reset, ig4iic_reset), 169 DEVMETHOD(iicbus_callback, iicbus_null_callback), 170 171 DEVMETHOD_END 172 }; 173 174 static driver_t ig4iic_pci_driver = { 175 "ig4iic", 176 ig4iic_pci_methods, 177 sizeof(struct ig4iic_softc) 178 }; 179 180 static devclass_t ig4iic_pci_devclass; 181 182 DRIVER_MODULE_ORDERED(ig4iic, pci, ig4iic_pci_driver, ig4iic_pci_devclass, 0, 0, 183 SI_ORDER_ANY); 184 MODULE_DEPEND(ig4iic, pci, 1, 1, 1); 185 MODULE_DEPEND(ig4iic, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER); 186 MODULE_VERSION(ig4iic, 1); 187