xref: /freebsd/sys/dev/ice/ice_sched.h (revision 9e5787d2284e187abb5b654d924394a65772e004)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*  Copyright (c) 2020, Intel Corporation
3  *  All rights reserved.
4  *
5  *  Redistribution and use in source and binary forms, with or without
6  *  modification, are permitted provided that the following conditions are met:
7  *
8  *   1. Redistributions of source code must retain the above copyright notice,
9  *      this list of conditions and the following disclaimer.
10  *
11  *   2. Redistributions in binary form must reproduce the above copyright
12  *      notice, this list of conditions and the following disclaimer in the
13  *      documentation and/or other materials provided with the distribution.
14  *
15  *   3. Neither the name of the Intel Corporation nor the names of its
16  *      contributors may be used to endorse or promote products derived from
17  *      this software without specific prior written permission.
18  *
19  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  *  POSSIBILITY OF SUCH DAMAGE.
30  */
31 /*$FreeBSD$*/
32 
33 #ifndef _ICE_SCHED_H_
34 #define _ICE_SCHED_H_
35 
36 #include "ice_common.h"
37 
38 #define ICE_QGRP_LAYER_OFFSET	2
39 #define ICE_VSI_LAYER_OFFSET	4
40 #define ICE_AGG_LAYER_OFFSET	6
41 #define ICE_SCHED_INVAL_LAYER_NUM	0xFF
42 /* Burst size is a 12 bits register that is configured while creating the RL
43  * profile(s). MSB is a granularity bit and tells the granularity type
44  * 0 - LSB bits are in 64 bytes granularity
45  * 1 - LSB bits are in 1K bytes granularity
46  */
47 #define ICE_64_BYTE_GRANULARITY			0
48 #define ICE_KBYTE_GRANULARITY			BIT(11)
49 #define ICE_MIN_BURST_SIZE_ALLOWED		64 /* In Bytes */
50 #define ICE_MAX_BURST_SIZE_ALLOWED \
51 	((BIT(11) - 1) * 1024) /* In Bytes */
52 #define ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY \
53 	((BIT(11) - 1) * 64) /* In Bytes */
54 #define ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY	ICE_MAX_BURST_SIZE_ALLOWED
55 
56 #define ICE_RL_PROF_ACCURACY_BYTES 128
57 #define ICE_RL_PROF_MULTIPLIER 10000
58 #define ICE_RL_PROF_TS_MULTIPLIER 32
59 #define ICE_RL_PROF_FRACTION 512
60 
61 #define ICE_PSM_CLK_367MHZ_IN_HZ 367647059
62 #define ICE_PSM_CLK_416MHZ_IN_HZ 416666667
63 #define ICE_PSM_CLK_446MHZ_IN_HZ 446428571
64 #define ICE_PSM_CLK_390MHZ_IN_HZ 390625000
65 
66 struct rl_profile_params {
67 	u32 bw;			/* in Kbps */
68 	u16 rl_multiplier;
69 	u16 wake_up_calc;
70 	u16 rl_encode;
71 };
72 
73 /* BW rate limit profile parameters list entry along
74  * with bandwidth maintained per layer in port info
75  */
76 struct ice_aqc_rl_profile_info {
77 	struct ice_aqc_rl_profile_elem profile;
78 	struct LIST_ENTRY_TYPE list_entry;
79 	u32 bw;			/* requested */
80 	u16 prof_id_ref;	/* profile ID to node association ref count */
81 };
82 
83 struct ice_sched_agg_vsi_info {
84 	struct LIST_ENTRY_TYPE list_entry;
85 	ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
86 	u16 vsi_handle;
87 	/* save aggregator VSI TC bitmap */
88 	ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
89 };
90 
91 struct ice_sched_agg_info {
92 	struct LIST_HEAD_TYPE agg_vsi_list;
93 	struct LIST_ENTRY_TYPE list_entry;
94 	ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
95 	u32 agg_id;
96 	enum ice_agg_type agg_type;
97 	/* bw_t_info saves aggregator BW information */
98 	struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS];
99 	/* save aggregator TC bitmap */
100 	ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS);
101 };
102 
103 /* FW AQ command calls */
104 enum ice_status
105 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
106 			struct ice_aqc_rl_profile_generic_elem *buf,
107 			u16 buf_size, struct ice_sq_cd *cd);
108 enum ice_status
109 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
110 		       struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
111 		       struct ice_sq_cd *cd);
112 enum ice_status
113 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
114 			 struct ice_aqc_get_elem *buf, u16 buf_size,
115 			 u16 *elems_ret, struct ice_sq_cd *cd);
116 enum ice_status ice_sched_init_port(struct ice_port_info *pi);
117 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);
118 void ice_sched_get_psm_clk_freq(struct ice_hw *hw);
119 
120 /* Functions to cleanup scheduler SW DB */
121 void ice_sched_clear_port(struct ice_port_info *pi);
122 void ice_sched_cleanup_all(struct ice_hw *hw);
123 void ice_sched_clear_agg(struct ice_hw *hw);
124 
125 /* Get a scheduling node from SW DB for given TEID */
126 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid);
127 struct ice_sched_node *
128 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);
129 /* Add a scheduling node into SW DB for given info */
130 enum ice_status
131 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
132 		   struct ice_aqc_txsched_elem_data *info);
133 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node);
134 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc);
135 struct ice_sched_node *
136 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
137 			   u8 owner);
138 enum ice_status
139 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
140 		  u8 owner, bool enable);
141 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
142 struct ice_sched_node *
143 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
144 		       u16 vsi_handle);
145 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
146 enum ice_status
147 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
148 			  struct ice_aqc_get_elem *buf, u16 buf_size,
149 			  struct ice_sq_cd *cd);
150 
151 /* Tx scheduler rate limiter functions */
152 enum ice_status
153 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id,
154 	    enum ice_agg_type agg_type, u8 tc_bitmap);
155 enum ice_status
156 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
157 		    u8 tc_bitmap);
158 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id);
159 enum ice_status
160 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
161 		 u16 q_handle, enum ice_rl_type rl_type, u32 bw);
162 enum ice_status
163 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
164 		      u16 q_handle, enum ice_rl_type rl_type);
165 enum ice_status
166 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
167 		       enum ice_rl_type rl_type, u32 bw);
168 enum ice_status
169 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
170 			    enum ice_rl_type rl_type);
171 enum ice_status
172 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
173 			  enum ice_rl_type rl_type, u32 bw);
174 enum ice_status
175 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
176 			       enum ice_rl_type rl_type);
177 enum ice_status
178 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
179 			  enum ice_rl_type rl_type, u32 bw);
180 enum ice_status
181 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
182 			       enum ice_rl_type rl_type);
183 enum ice_status
184 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw);
185 enum ice_status
186 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle);
187 enum ice_status
188 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);
189 enum ice_status
190 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id);
191 enum ice_status
192 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
193 		       u8 *q_prio);
194 enum ice_status
195 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
196 		     enum ice_rl_type rl_type, u8 *bw_alloc);
197 enum ice_status
198 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
199 				u16 num_vsis, u16 *vsi_handle_arr,
200 				u8 *node_prio, u8 tc);
201 enum ice_status
202 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
203 		     enum ice_rl_type rl_type, u8 *bw_alloc);
204 bool
205 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
206 			       struct ice_sched_node *node);
207 enum ice_status
208 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
209 enum ice_status
210 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
211 				 enum ice_agg_type agg_type, u8 tc,
212 				 enum ice_rl_type rl_type, u32 bw);
213 enum ice_status
214 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
215 				u32 bw);
216 enum ice_status
217 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw);
218 enum ice_status
219 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
220 			     struct ice_sched_node *node, u8 priority);
221 enum ice_status
222 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
223 			 enum ice_rl_type rl_type, u8 bw_alloc);
224 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
225 #endif /* _ICE_SCHED_H_ */
226