1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2023, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _ICE_SCHED_H_ 33 #define _ICE_SCHED_H_ 34 35 #include "ice_common.h" 36 37 #define SCHED_NODE_NAME_MAX_LEN 32 38 39 #define ICE_SCHED_5_LAYERS 5 40 #define ICE_SCHED_9_LAYERS 9 41 42 #define ICE_QGRP_LAYER_OFFSET 2 43 #define ICE_VSI_LAYER_OFFSET 4 44 #define ICE_AGG_LAYER_OFFSET 6 45 #define ICE_SCHED_INVAL_LAYER_NUM 0xFF 46 /* Burst size is a 12 bits register that is configured while creating the RL 47 * profile(s). MSB is a granularity bit and tells the granularity type 48 * 0 - LSB bits are in 64 bytes granularity 49 * 1 - LSB bits are in 1K bytes granularity 50 */ 51 #define ICE_64_BYTE_GRANULARITY 0 52 #define ICE_KBYTE_GRANULARITY BIT(11) 53 #define ICE_MIN_BURST_SIZE_ALLOWED 64 /* In Bytes */ 54 #define ICE_MAX_BURST_SIZE_ALLOWED \ 55 ((BIT(11) - 1) * 1024) /* In Bytes */ 56 #define ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY \ 57 ((BIT(11) - 1) * 64) /* In Bytes */ 58 #define ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY ICE_MAX_BURST_SIZE_ALLOWED 59 60 #define ICE_RL_PROF_ACCURACY_BYTES 128 61 #define ICE_RL_PROF_MULTIPLIER 10000 62 #define ICE_RL_PROF_TS_MULTIPLIER 32 63 #define ICE_RL_PROF_FRACTION 512 64 65 #define ICE_PSM_CLK_367MHZ_IN_HZ 367647059 66 #define ICE_PSM_CLK_416MHZ_IN_HZ 416666667 67 #define ICE_PSM_CLK_446MHZ_IN_HZ 446428571 68 #define ICE_PSM_CLK_390MHZ_IN_HZ 390625000 69 70 #define PSM_CLK_SRC_367_MHZ 0x0 71 #define PSM_CLK_SRC_416_MHZ 0x1 72 #define PSM_CLK_SRC_446_MHZ 0x2 73 #define PSM_CLK_SRC_390_MHZ 0x3 74 75 struct rl_profile_params { 76 u32 bw; /* in Kbps */ 77 u16 rl_multiplier; 78 u16 wake_up_calc; 79 u16 rl_encode; 80 }; 81 82 /* BW rate limit profile parameters list entry along 83 * with bandwidth maintained per layer in port info 84 */ 85 struct ice_aqc_rl_profile_info { 86 struct ice_aqc_rl_profile_elem profile; 87 struct LIST_ENTRY_TYPE list_entry; 88 u32 bw; /* requested */ 89 u16 prof_id_ref; /* profile ID to node association ref count */ 90 }; 91 92 struct ice_sched_agg_vsi_info { 93 struct LIST_ENTRY_TYPE list_entry; 94 ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 95 u16 vsi_handle; 96 /* save aggregator VSI TC bitmap */ 97 ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 98 }; 99 100 struct ice_sched_agg_info { 101 struct LIST_HEAD_TYPE agg_vsi_list; 102 struct LIST_ENTRY_TYPE list_entry; 103 ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 104 u32 agg_id; 105 enum ice_agg_type agg_type; 106 /* bw_t_info saves aggregator BW information */ 107 struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS]; 108 /* save aggregator TC bitmap */ 109 ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 110 }; 111 112 /* FW AQ command calls */ 113 enum ice_status 114 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles, 115 struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 116 struct ice_sq_cd *cd); 117 enum ice_status 118 ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes, 119 struct ice_aqc_node_attr_elem *buf, u16 buf_size, 120 struct ice_sq_cd *cd); 121 enum ice_status 122 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes, 123 struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size, 124 struct ice_sq_cd *cd); 125 enum ice_status 126 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req, 127 struct ice_aqc_move_elem *buf, u16 buf_size, 128 u16 *grps_movd, struct ice_sq_cd *cd); 129 enum ice_status 130 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, 131 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 132 u16 *elems_ret, struct ice_sq_cd *cd); 133 134 enum ice_status 135 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, 136 enum ice_rl_type rl_type, u32 bw); 137 138 enum ice_status 139 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node, 140 enum ice_rl_type rl_type, u32 bw, u8 layer_num); 141 142 enum ice_status 143 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node, 144 struct ice_sched_node *parent, u8 layer, u16 num_nodes, 145 u16 *num_nodes_added, u32 *first_node_teid, 146 struct ice_sched_node **prealloc_node); 147 148 enum ice_status 149 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent, 150 u16 num_items, u32 *list); 151 152 enum ice_status 153 ice_sched_set_node_priority(struct ice_port_info *pi, struct ice_sched_node *node, 154 u16 priority); 155 enum ice_status 156 ice_sched_set_node_weight(struct ice_port_info *pi, struct ice_sched_node *node, 157 u16 weight); 158 159 enum ice_status ice_sched_init_port(struct ice_port_info *pi); 160 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw); 161 void ice_sched_get_psm_clk_freq(struct ice_hw *hw); 162 163 /* Functions to cleanup scheduler SW DB */ 164 void ice_sched_clear_port(struct ice_port_info *pi); 165 void ice_sched_cleanup_all(struct ice_hw *hw); 166 void ice_sched_clear_agg(struct ice_hw *hw); 167 168 /* Get a scheduling node from SW DB for given TEID */ 169 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid); 170 struct ice_sched_node * 171 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid); 172 /* Add a scheduling node into SW DB for given info */ 173 enum ice_status 174 ice_sched_add_node(struct ice_port_info *pi, u8 layer, 175 struct ice_aqc_txsched_elem_data *info, 176 struct ice_sched_node *prealloc_node); 177 void 178 ice_sched_update_parent(struct ice_sched_node *new_parent, 179 struct ice_sched_node *node); 180 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node); 181 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc); 182 struct ice_sched_node * 183 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 184 u8 owner); 185 enum ice_status 186 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, 187 u8 owner, bool enable); 188 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle); 189 enum ice_status ice_rm_vsi_rdma_cfg(struct ice_port_info *pi, u16 vsi_handle); 190 struct ice_sched_node * 191 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node, 192 u16 vsi_handle); 193 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node); 194 enum ice_status 195 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid, 196 struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 197 struct ice_sq_cd *cd); 198 199 /* Tx scheduler rate limiter functions */ 200 enum ice_status 201 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, 202 enum ice_agg_type agg_type, u8 tc_bitmap); 203 enum ice_status 204 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle, 205 u8 tc_bitmap); 206 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id); 207 enum ice_status 208 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 209 u16 q_handle, enum ice_rl_type rl_type, u32 bw); 210 enum ice_status 211 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 212 u16 q_handle, enum ice_rl_type rl_type); 213 enum ice_status 214 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc, 215 enum ice_rl_type rl_type, u32 bw); 216 enum ice_status 217 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc, 218 enum ice_rl_type rl_type); 219 enum ice_status 220 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 221 enum ice_rl_type rl_type, u32 bw); 222 enum ice_status 223 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 224 enum ice_rl_type rl_type); 225 enum ice_status 226 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 227 enum ice_rl_type rl_type, u32 bw); 228 enum ice_status 229 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 230 enum ice_rl_type rl_type); 231 enum ice_status 232 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw, 233 u32 max_bw, u32 shared_bw); 234 enum ice_status 235 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle); 236 enum ice_status 237 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw, 238 u32 max_bw, u32 shared_bw); 239 enum ice_status 240 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id); 241 enum ice_status 242 ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 243 u32 min_bw, u32 max_bw, u32 shared_bw); 244 enum ice_status 245 ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, 246 u8 tc); 247 enum ice_status 248 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids, 249 u8 *q_prio); 250 enum ice_status 251 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap, 252 enum ice_rl_type rl_type, u8 *bw_alloc); 253 enum ice_status 254 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id, 255 u16 num_vsis, u16 *vsi_handle_arr, 256 u8 *node_prio, u8 tc); 257 enum ice_status 258 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap, 259 enum ice_rl_type rl_type, u8 *bw_alloc); 260 bool 261 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base, 262 struct ice_sched_node *node); 263 enum ice_status 264 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle); 265 enum ice_status 266 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id, 267 enum ice_agg_type agg_type, u8 tc, 268 enum ice_rl_type rl_type, u32 bw); 269 enum ice_status 270 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, 271 u32 min_bw, u32 max_bw, u32 shared_bw); 272 enum ice_status 273 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw, 274 u32 max_bw, u32 shared_bw); 275 enum ice_status 276 ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, 277 u8 tc, u32 min_bw, u32 max_bw, 278 u32 shared_bw); 279 enum ice_status 280 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi, 281 struct ice_sched_node *node, u8 priority); 282 enum ice_status 283 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc, 284 enum ice_rl_type rl_type, u8 bw_alloc); 285 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes); 286 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw); 287 void ice_sched_replay_agg(struct ice_hw *hw); 288 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi); 289 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle); 290 enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi); 291 enum ice_status ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx); 292 293 #endif /* _ICE_SCHED_H_ */ 294