171d10453SEric Joyner /* SPDX-License-Identifier: BSD-3-Clause */ 271d10453SEric Joyner /* Copyright (c) 2020, Intel Corporation 371d10453SEric Joyner * All rights reserved. 471d10453SEric Joyner * 571d10453SEric Joyner * Redistribution and use in source and binary forms, with or without 671d10453SEric Joyner * modification, are permitted provided that the following conditions are met: 771d10453SEric Joyner * 871d10453SEric Joyner * 1. Redistributions of source code must retain the above copyright notice, 971d10453SEric Joyner * this list of conditions and the following disclaimer. 1071d10453SEric Joyner * 1171d10453SEric Joyner * 2. Redistributions in binary form must reproduce the above copyright 1271d10453SEric Joyner * notice, this list of conditions and the following disclaimer in the 1371d10453SEric Joyner * documentation and/or other materials provided with the distribution. 1471d10453SEric Joyner * 1571d10453SEric Joyner * 3. Neither the name of the Intel Corporation nor the names of its 1671d10453SEric Joyner * contributors may be used to endorse or promote products derived from 1771d10453SEric Joyner * this software without specific prior written permission. 1871d10453SEric Joyner * 1971d10453SEric Joyner * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 2071d10453SEric Joyner * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2171d10453SEric Joyner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2271d10453SEric Joyner * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 2371d10453SEric Joyner * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2471d10453SEric Joyner * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2571d10453SEric Joyner * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2671d10453SEric Joyner * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2771d10453SEric Joyner * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2871d10453SEric Joyner * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2971d10453SEric Joyner * POSSIBILITY OF SUCH DAMAGE. 3071d10453SEric Joyner */ 3171d10453SEric Joyner /*$FreeBSD$*/ 3271d10453SEric Joyner 3371d10453SEric Joyner #ifndef _ICE_SCHED_H_ 3471d10453SEric Joyner #define _ICE_SCHED_H_ 3571d10453SEric Joyner 3671d10453SEric Joyner #include "ice_common.h" 3771d10453SEric Joyner 3871d10453SEric Joyner #define ICE_QGRP_LAYER_OFFSET 2 3971d10453SEric Joyner #define ICE_VSI_LAYER_OFFSET 4 4071d10453SEric Joyner #define ICE_AGG_LAYER_OFFSET 6 4171d10453SEric Joyner #define ICE_SCHED_INVAL_LAYER_NUM 0xFF 4271d10453SEric Joyner /* Burst size is a 12 bits register that is configured while creating the RL 4371d10453SEric Joyner * profile(s). MSB is a granularity bit and tells the granularity type 4471d10453SEric Joyner * 0 - LSB bits are in 64 bytes granularity 4571d10453SEric Joyner * 1 - LSB bits are in 1K bytes granularity 4671d10453SEric Joyner */ 4771d10453SEric Joyner #define ICE_64_BYTE_GRANULARITY 0 4871d10453SEric Joyner #define ICE_KBYTE_GRANULARITY BIT(11) 4971d10453SEric Joyner #define ICE_MIN_BURST_SIZE_ALLOWED 64 /* In Bytes */ 5071d10453SEric Joyner #define ICE_MAX_BURST_SIZE_ALLOWED \ 5171d10453SEric Joyner ((BIT(11) - 1) * 1024) /* In Bytes */ 5271d10453SEric Joyner #define ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY \ 5371d10453SEric Joyner ((BIT(11) - 1) * 64) /* In Bytes */ 5471d10453SEric Joyner #define ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY ICE_MAX_BURST_SIZE_ALLOWED 5571d10453SEric Joyner 5671d10453SEric Joyner #define ICE_RL_PROF_ACCURACY_BYTES 128 5771d10453SEric Joyner #define ICE_RL_PROF_MULTIPLIER 10000 5871d10453SEric Joyner #define ICE_RL_PROF_TS_MULTIPLIER 32 5971d10453SEric Joyner #define ICE_RL_PROF_FRACTION 512 6071d10453SEric Joyner 6171d10453SEric Joyner #define ICE_PSM_CLK_367MHZ_IN_HZ 367647059 6271d10453SEric Joyner #define ICE_PSM_CLK_416MHZ_IN_HZ 416666667 6371d10453SEric Joyner #define ICE_PSM_CLK_446MHZ_IN_HZ 446428571 6471d10453SEric Joyner #define ICE_PSM_CLK_390MHZ_IN_HZ 390625000 6571d10453SEric Joyner 6671d10453SEric Joyner struct rl_profile_params { 6771d10453SEric Joyner u32 bw; /* in Kbps */ 6871d10453SEric Joyner u16 rl_multiplier; 6971d10453SEric Joyner u16 wake_up_calc; 7071d10453SEric Joyner u16 rl_encode; 7171d10453SEric Joyner }; 7271d10453SEric Joyner 7371d10453SEric Joyner /* BW rate limit profile parameters list entry along 7471d10453SEric Joyner * with bandwidth maintained per layer in port info 7571d10453SEric Joyner */ 7671d10453SEric Joyner struct ice_aqc_rl_profile_info { 7771d10453SEric Joyner struct ice_aqc_rl_profile_elem profile; 7871d10453SEric Joyner struct LIST_ENTRY_TYPE list_entry; 7971d10453SEric Joyner u32 bw; /* requested */ 8071d10453SEric Joyner u16 prof_id_ref; /* profile ID to node association ref count */ 8171d10453SEric Joyner }; 8271d10453SEric Joyner 8371d10453SEric Joyner struct ice_sched_agg_vsi_info { 8471d10453SEric Joyner struct LIST_ENTRY_TYPE list_entry; 8571d10453SEric Joyner ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 8671d10453SEric Joyner u16 vsi_handle; 8771d10453SEric Joyner /* save aggregator VSI TC bitmap */ 8871d10453SEric Joyner ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 8971d10453SEric Joyner }; 9071d10453SEric Joyner 9171d10453SEric Joyner struct ice_sched_agg_info { 9271d10453SEric Joyner struct LIST_HEAD_TYPE agg_vsi_list; 9371d10453SEric Joyner struct LIST_ENTRY_TYPE list_entry; 9471d10453SEric Joyner ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 9571d10453SEric Joyner u32 agg_id; 9671d10453SEric Joyner enum ice_agg_type agg_type; 9771d10453SEric Joyner /* bw_t_info saves aggregator BW information */ 9871d10453SEric Joyner struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS]; 9971d10453SEric Joyner /* save aggregator TC bitmap */ 10071d10453SEric Joyner ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 10171d10453SEric Joyner }; 10271d10453SEric Joyner 10371d10453SEric Joyner /* FW AQ command calls */ 10471d10453SEric Joyner enum ice_status 10571d10453SEric Joyner ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles, 106*7d7af7f8SEric Joyner struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 107*7d7af7f8SEric Joyner struct ice_sq_cd *cd); 10871d10453SEric Joyner enum ice_status 10971d10453SEric Joyner ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes, 110*7d7af7f8SEric Joyner struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size, 11171d10453SEric Joyner struct ice_sq_cd *cd); 11271d10453SEric Joyner enum ice_status 11371d10453SEric Joyner ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, 114*7d7af7f8SEric Joyner struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 11571d10453SEric Joyner u16 *elems_ret, struct ice_sq_cd *cd); 11671d10453SEric Joyner enum ice_status ice_sched_init_port(struct ice_port_info *pi); 11771d10453SEric Joyner enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw); 11871d10453SEric Joyner void ice_sched_get_psm_clk_freq(struct ice_hw *hw); 11971d10453SEric Joyner 12071d10453SEric Joyner /* Functions to cleanup scheduler SW DB */ 12171d10453SEric Joyner void ice_sched_clear_port(struct ice_port_info *pi); 12271d10453SEric Joyner void ice_sched_cleanup_all(struct ice_hw *hw); 12371d10453SEric Joyner void ice_sched_clear_agg(struct ice_hw *hw); 12471d10453SEric Joyner 12571d10453SEric Joyner /* Get a scheduling node from SW DB for given TEID */ 12671d10453SEric Joyner struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid); 12771d10453SEric Joyner struct ice_sched_node * 12871d10453SEric Joyner ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid); 12971d10453SEric Joyner /* Add a scheduling node into SW DB for given info */ 13071d10453SEric Joyner enum ice_status 13171d10453SEric Joyner ice_sched_add_node(struct ice_port_info *pi, u8 layer, 13271d10453SEric Joyner struct ice_aqc_txsched_elem_data *info); 13371d10453SEric Joyner void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node); 13471d10453SEric Joyner struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc); 13571d10453SEric Joyner struct ice_sched_node * 13671d10453SEric Joyner ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 13771d10453SEric Joyner u8 owner); 13871d10453SEric Joyner enum ice_status 13971d10453SEric Joyner ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, 14071d10453SEric Joyner u8 owner, bool enable); 14171d10453SEric Joyner enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle); 14271d10453SEric Joyner struct ice_sched_node * 14371d10453SEric Joyner ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node, 14471d10453SEric Joyner u16 vsi_handle); 14571d10453SEric Joyner bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node); 14671d10453SEric Joyner enum ice_status 14771d10453SEric Joyner ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid, 148*7d7af7f8SEric Joyner struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 14971d10453SEric Joyner struct ice_sq_cd *cd); 15071d10453SEric Joyner 15171d10453SEric Joyner /* Tx scheduler rate limiter functions */ 15271d10453SEric Joyner enum ice_status 15371d10453SEric Joyner ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, 15471d10453SEric Joyner enum ice_agg_type agg_type, u8 tc_bitmap); 15571d10453SEric Joyner enum ice_status 15671d10453SEric Joyner ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle, 15771d10453SEric Joyner u8 tc_bitmap); 15871d10453SEric Joyner enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id); 15971d10453SEric Joyner enum ice_status 16071d10453SEric Joyner ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 16171d10453SEric Joyner u16 q_handle, enum ice_rl_type rl_type, u32 bw); 16271d10453SEric Joyner enum ice_status 16371d10453SEric Joyner ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 16471d10453SEric Joyner u16 q_handle, enum ice_rl_type rl_type); 16571d10453SEric Joyner enum ice_status 16671d10453SEric Joyner ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc, 16771d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 16871d10453SEric Joyner enum ice_status 16971d10453SEric Joyner ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc, 17071d10453SEric Joyner enum ice_rl_type rl_type); 17171d10453SEric Joyner enum ice_status 17271d10453SEric Joyner ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 17371d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 17471d10453SEric Joyner enum ice_status 17571d10453SEric Joyner ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 17671d10453SEric Joyner enum ice_rl_type rl_type); 17771d10453SEric Joyner enum ice_status 17871d10453SEric Joyner ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 17971d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 18071d10453SEric Joyner enum ice_status 18171d10453SEric Joyner ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 18271d10453SEric Joyner enum ice_rl_type rl_type); 18371d10453SEric Joyner enum ice_status 18471d10453SEric Joyner ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw); 18571d10453SEric Joyner enum ice_status 18671d10453SEric Joyner ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle); 18771d10453SEric Joyner enum ice_status 18871d10453SEric Joyner ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw); 18971d10453SEric Joyner enum ice_status 19071d10453SEric Joyner ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id); 19171d10453SEric Joyner enum ice_status 19271d10453SEric Joyner ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids, 19371d10453SEric Joyner u8 *q_prio); 19471d10453SEric Joyner enum ice_status 19571d10453SEric Joyner ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap, 19671d10453SEric Joyner enum ice_rl_type rl_type, u8 *bw_alloc); 19771d10453SEric Joyner enum ice_status 19871d10453SEric Joyner ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id, 19971d10453SEric Joyner u16 num_vsis, u16 *vsi_handle_arr, 20071d10453SEric Joyner u8 *node_prio, u8 tc); 20171d10453SEric Joyner enum ice_status 20271d10453SEric Joyner ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap, 20371d10453SEric Joyner enum ice_rl_type rl_type, u8 *bw_alloc); 20471d10453SEric Joyner bool 20571d10453SEric Joyner ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base, 20671d10453SEric Joyner struct ice_sched_node *node); 20771d10453SEric Joyner enum ice_status 20871d10453SEric Joyner ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle); 20971d10453SEric Joyner enum ice_status 21071d10453SEric Joyner ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id, 21171d10453SEric Joyner enum ice_agg_type agg_type, u8 tc, 21271d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 21371d10453SEric Joyner enum ice_status 21471d10453SEric Joyner ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, 21571d10453SEric Joyner u32 bw); 21671d10453SEric Joyner enum ice_status 21771d10453SEric Joyner ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw); 21871d10453SEric Joyner enum ice_status 21971d10453SEric Joyner ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi, 22071d10453SEric Joyner struct ice_sched_node *node, u8 priority); 22171d10453SEric Joyner enum ice_status 22271d10453SEric Joyner ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc, 22371d10453SEric Joyner enum ice_rl_type rl_type, u8 bw_alloc); 22471d10453SEric Joyner enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes); 22571d10453SEric Joyner #endif /* _ICE_SCHED_H_ */ 226