171d10453SEric Joyner /* SPDX-License-Identifier: BSD-3-Clause */ 2015f8cc5SEric Joyner /* Copyright (c) 2024, Intel Corporation 371d10453SEric Joyner * All rights reserved. 471d10453SEric Joyner * 571d10453SEric Joyner * Redistribution and use in source and binary forms, with or without 671d10453SEric Joyner * modification, are permitted provided that the following conditions are met: 771d10453SEric Joyner * 871d10453SEric Joyner * 1. Redistributions of source code must retain the above copyright notice, 971d10453SEric Joyner * this list of conditions and the following disclaimer. 1071d10453SEric Joyner * 1171d10453SEric Joyner * 2. Redistributions in binary form must reproduce the above copyright 1271d10453SEric Joyner * notice, this list of conditions and the following disclaimer in the 1371d10453SEric Joyner * documentation and/or other materials provided with the distribution. 1471d10453SEric Joyner * 1571d10453SEric Joyner * 3. Neither the name of the Intel Corporation nor the names of its 1671d10453SEric Joyner * contributors may be used to endorse or promote products derived from 1771d10453SEric Joyner * this software without specific prior written permission. 1871d10453SEric Joyner * 1971d10453SEric Joyner * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 2071d10453SEric Joyner * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2171d10453SEric Joyner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2271d10453SEric Joyner * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 2371d10453SEric Joyner * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2471d10453SEric Joyner * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2571d10453SEric Joyner * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2671d10453SEric Joyner * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2771d10453SEric Joyner * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2871d10453SEric Joyner * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2971d10453SEric Joyner * POSSIBILITY OF SUCH DAMAGE. 3071d10453SEric Joyner */ 3171d10453SEric Joyner 3271d10453SEric Joyner #ifndef _ICE_SCHED_H_ 3371d10453SEric Joyner #define _ICE_SCHED_H_ 3471d10453SEric Joyner 3571d10453SEric Joyner #include "ice_common.h" 3671d10453SEric Joyner 379c30461dSEric Joyner #define SCHED_NODE_NAME_MAX_LEN 32 389c30461dSEric Joyner 398923de59SPiotr Kubaj #define ICE_SCHED_5_LAYERS 5 408923de59SPiotr Kubaj #define ICE_SCHED_9_LAYERS 9 418923de59SPiotr Kubaj 4271d10453SEric Joyner #define ICE_QGRP_LAYER_OFFSET 2 4371d10453SEric Joyner #define ICE_VSI_LAYER_OFFSET 4 4471d10453SEric Joyner #define ICE_AGG_LAYER_OFFSET 6 4571d10453SEric Joyner #define ICE_SCHED_INVAL_LAYER_NUM 0xFF 4671d10453SEric Joyner /* Burst size is a 12 bits register that is configured while creating the RL 4771d10453SEric Joyner * profile(s). MSB is a granularity bit and tells the granularity type 4871d10453SEric Joyner * 0 - LSB bits are in 64 bytes granularity 4971d10453SEric Joyner * 1 - LSB bits are in 1K bytes granularity 5071d10453SEric Joyner */ 5171d10453SEric Joyner #define ICE_64_BYTE_GRANULARITY 0 5271d10453SEric Joyner #define ICE_KBYTE_GRANULARITY BIT(11) 5371d10453SEric Joyner #define ICE_MIN_BURST_SIZE_ALLOWED 64 /* In Bytes */ 5471d10453SEric Joyner #define ICE_MAX_BURST_SIZE_ALLOWED \ 5571d10453SEric Joyner ((BIT(11) - 1) * 1024) /* In Bytes */ 5671d10453SEric Joyner #define ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY \ 5771d10453SEric Joyner ((BIT(11) - 1) * 64) /* In Bytes */ 5871d10453SEric Joyner #define ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY ICE_MAX_BURST_SIZE_ALLOWED 5971d10453SEric Joyner 6071d10453SEric Joyner #define ICE_RL_PROF_ACCURACY_BYTES 128 6171d10453SEric Joyner #define ICE_RL_PROF_MULTIPLIER 10000 6271d10453SEric Joyner #define ICE_RL_PROF_TS_MULTIPLIER 32 6371d10453SEric Joyner #define ICE_RL_PROF_FRACTION 512 6471d10453SEric Joyner 6571d10453SEric Joyner #define ICE_PSM_CLK_367MHZ_IN_HZ 367647059 6671d10453SEric Joyner #define ICE_PSM_CLK_416MHZ_IN_HZ 416666667 6771d10453SEric Joyner #define ICE_PSM_CLK_446MHZ_IN_HZ 446428571 6871d10453SEric Joyner #define ICE_PSM_CLK_390MHZ_IN_HZ 390625000 6971d10453SEric Joyner 709c30461dSEric Joyner #define PSM_CLK_SRC_367_MHZ 0x0 719c30461dSEric Joyner #define PSM_CLK_SRC_416_MHZ 0x1 729c30461dSEric Joyner #define PSM_CLK_SRC_446_MHZ 0x2 739c30461dSEric Joyner #define PSM_CLK_SRC_390_MHZ 0x3 749c30461dSEric Joyner 7571d10453SEric Joyner struct rl_profile_params { 7671d10453SEric Joyner u32 bw; /* in Kbps */ 7771d10453SEric Joyner u16 rl_multiplier; 7871d10453SEric Joyner u16 wake_up_calc; 7971d10453SEric Joyner u16 rl_encode; 8071d10453SEric Joyner }; 8171d10453SEric Joyner 8271d10453SEric Joyner /* BW rate limit profile parameters list entry along 8371d10453SEric Joyner * with bandwidth maintained per layer in port info 8471d10453SEric Joyner */ 8571d10453SEric Joyner struct ice_aqc_rl_profile_info { 8671d10453SEric Joyner struct ice_aqc_rl_profile_elem profile; 8771d10453SEric Joyner struct LIST_ENTRY_TYPE list_entry; 8871d10453SEric Joyner u32 bw; /* requested */ 8971d10453SEric Joyner u16 prof_id_ref; /* profile ID to node association ref count */ 9071d10453SEric Joyner }; 9171d10453SEric Joyner 9271d10453SEric Joyner struct ice_sched_agg_vsi_info { 9371d10453SEric Joyner struct LIST_ENTRY_TYPE list_entry; 9471d10453SEric Joyner ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 9571d10453SEric Joyner u16 vsi_handle; 9671d10453SEric Joyner /* save aggregator VSI TC bitmap */ 9771d10453SEric Joyner ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 9871d10453SEric Joyner }; 9971d10453SEric Joyner 10071d10453SEric Joyner struct ice_sched_agg_info { 10171d10453SEric Joyner struct LIST_HEAD_TYPE agg_vsi_list; 10271d10453SEric Joyner struct LIST_ENTRY_TYPE list_entry; 10371d10453SEric Joyner ice_declare_bitmap(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 10471d10453SEric Joyner u32 agg_id; 10571d10453SEric Joyner enum ice_agg_type agg_type; 10671d10453SEric Joyner /* bw_t_info saves aggregator BW information */ 10771d10453SEric Joyner struct ice_bw_type_info bw_t_info[ICE_MAX_TRAFFIC_CLASS]; 10871d10453SEric Joyner /* save aggregator TC bitmap */ 10971d10453SEric Joyner ice_declare_bitmap(replay_tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 11071d10453SEric Joyner }; 11171d10453SEric Joyner 11271d10453SEric Joyner /* FW AQ command calls */ 113*f2635e84SEric Joyner int 11471d10453SEric Joyner ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles, 1157d7af7f8SEric Joyner struct ice_aqc_rl_profile_elem *buf, u16 buf_size, 1167d7af7f8SEric Joyner struct ice_sq_cd *cd); 117*f2635e84SEric Joyner int 1188923de59SPiotr Kubaj ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes, 1198923de59SPiotr Kubaj struct ice_aqc_node_attr_elem *buf, u16 buf_size, 1208923de59SPiotr Kubaj struct ice_sq_cd *cd); 121*f2635e84SEric Joyner int 12271d10453SEric Joyner ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes, 1237d7af7f8SEric Joyner struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size, 12471d10453SEric Joyner struct ice_sq_cd *cd); 125*f2635e84SEric Joyner int 1268923de59SPiotr Kubaj ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req, 1278923de59SPiotr Kubaj struct ice_aqc_move_elem *buf, u16 buf_size, 1288923de59SPiotr Kubaj u16 *grps_movd, struct ice_sq_cd *cd); 129*f2635e84SEric Joyner int 13071d10453SEric Joyner ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, 1317d7af7f8SEric Joyner struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 13271d10453SEric Joyner u16 *elems_ret, struct ice_sq_cd *cd); 1339c30461dSEric Joyner 134*f2635e84SEric Joyner int 1359c30461dSEric Joyner ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node, 1369c30461dSEric Joyner enum ice_rl_type rl_type, u32 bw); 1379c30461dSEric Joyner 138*f2635e84SEric Joyner int 1399c30461dSEric Joyner ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node, 1409c30461dSEric Joyner enum ice_rl_type rl_type, u32 bw, u8 layer_num); 1419c30461dSEric Joyner 142*f2635e84SEric Joyner int 1439c30461dSEric Joyner ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node, 1449c30461dSEric Joyner struct ice_sched_node *parent, u8 layer, u16 num_nodes, 1459c30461dSEric Joyner u16 *num_nodes_added, u32 *first_node_teid, 1469c30461dSEric Joyner struct ice_sched_node **prealloc_node); 1479c30461dSEric Joyner 148*f2635e84SEric Joyner int 1499c30461dSEric Joyner ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent, 1509c30461dSEric Joyner u16 num_items, u32 *list); 1519c30461dSEric Joyner 152*f2635e84SEric Joyner int 1539c30461dSEric Joyner ice_sched_set_node_priority(struct ice_port_info *pi, struct ice_sched_node *node, 1549c30461dSEric Joyner u16 priority); 155*f2635e84SEric Joyner int 1569c30461dSEric Joyner ice_sched_set_node_weight(struct ice_port_info *pi, struct ice_sched_node *node, 1579c30461dSEric Joyner u16 weight); 1589c30461dSEric Joyner 159*f2635e84SEric Joyner int ice_sched_init_port(struct ice_port_info *pi); 160*f2635e84SEric Joyner int ice_sched_query_res_alloc(struct ice_hw *hw); 16171d10453SEric Joyner void ice_sched_get_psm_clk_freq(struct ice_hw *hw); 16271d10453SEric Joyner 16371d10453SEric Joyner /* Functions to cleanup scheduler SW DB */ 16471d10453SEric Joyner void ice_sched_clear_port(struct ice_port_info *pi); 16571d10453SEric Joyner void ice_sched_cleanup_all(struct ice_hw *hw); 16671d10453SEric Joyner void ice_sched_clear_agg(struct ice_hw *hw); 16771d10453SEric Joyner 16871d10453SEric Joyner /* Get a scheduling node from SW DB for given TEID */ 16971d10453SEric Joyner struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid); 17071d10453SEric Joyner struct ice_sched_node * 17171d10453SEric Joyner ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid); 17271d10453SEric Joyner /* Add a scheduling node into SW DB for given info */ 173*f2635e84SEric Joyner int 17471d10453SEric Joyner ice_sched_add_node(struct ice_port_info *pi, u8 layer, 1759c30461dSEric Joyner struct ice_aqc_txsched_elem_data *info, 1769c30461dSEric Joyner struct ice_sched_node *prealloc_node); 1779c30461dSEric Joyner void 1789c30461dSEric Joyner ice_sched_update_parent(struct ice_sched_node *new_parent, 1799c30461dSEric Joyner struct ice_sched_node *node); 18071d10453SEric Joyner void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node); 18171d10453SEric Joyner struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc); 18271d10453SEric Joyner struct ice_sched_node * 18371d10453SEric Joyner ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 18471d10453SEric Joyner u8 owner); 185*f2635e84SEric Joyner int 18671d10453SEric Joyner ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, 18771d10453SEric Joyner u8 owner, bool enable); 188*f2635e84SEric Joyner int ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle); 189*f2635e84SEric Joyner int ice_rm_vsi_rdma_cfg(struct ice_port_info *pi, u16 vsi_handle); 19071d10453SEric Joyner struct ice_sched_node * 19171d10453SEric Joyner ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node, 19271d10453SEric Joyner u16 vsi_handle); 19371d10453SEric Joyner bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node); 194*f2635e84SEric Joyner int 19571d10453SEric Joyner ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid, 1967d7af7f8SEric Joyner struct ice_aqc_txsched_elem_data *buf, u16 buf_size, 19771d10453SEric Joyner struct ice_sq_cd *cd); 19871d10453SEric Joyner 19971d10453SEric Joyner /* Tx scheduler rate limiter functions */ 200*f2635e84SEric Joyner int 20171d10453SEric Joyner ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, 20271d10453SEric Joyner enum ice_agg_type agg_type, u8 tc_bitmap); 203*f2635e84SEric Joyner int 20471d10453SEric Joyner ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle, 20571d10453SEric Joyner u8 tc_bitmap); 206*f2635e84SEric Joyner int ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id); 207*f2635e84SEric Joyner int 20871d10453SEric Joyner ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 20971d10453SEric Joyner u16 q_handle, enum ice_rl_type rl_type, u32 bw); 210*f2635e84SEric Joyner int 21171d10453SEric Joyner ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 21271d10453SEric Joyner u16 q_handle, enum ice_rl_type rl_type); 213*f2635e84SEric Joyner int 21471d10453SEric Joyner ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc, 21571d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 216*f2635e84SEric Joyner int 21771d10453SEric Joyner ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc, 21871d10453SEric Joyner enum ice_rl_type rl_type); 219*f2635e84SEric Joyner int 22071d10453SEric Joyner ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 22171d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 222*f2635e84SEric Joyner int 22371d10453SEric Joyner ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 22471d10453SEric Joyner enum ice_rl_type rl_type); 225*f2635e84SEric Joyner int 22671d10453SEric Joyner ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 22771d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 228*f2635e84SEric Joyner int 22971d10453SEric Joyner ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 23071d10453SEric Joyner enum ice_rl_type rl_type); 231*f2635e84SEric Joyner int 232d08b8680SEric Joyner ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw, 233d08b8680SEric Joyner u32 max_bw, u32 shared_bw); 234*f2635e84SEric Joyner int 23571d10453SEric Joyner ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle); 236*f2635e84SEric Joyner int 237d08b8680SEric Joyner ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw, 238d08b8680SEric Joyner u32 max_bw, u32 shared_bw); 239*f2635e84SEric Joyner int 24071d10453SEric Joyner ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id); 241*f2635e84SEric Joyner int 242d08b8680SEric Joyner ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc, 243d08b8680SEric Joyner u32 min_bw, u32 max_bw, u32 shared_bw); 244*f2635e84SEric Joyner int 245d08b8680SEric Joyner ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, 246d08b8680SEric Joyner u8 tc); 247*f2635e84SEric Joyner int 24871d10453SEric Joyner ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids, 24971d10453SEric Joyner u8 *q_prio); 250*f2635e84SEric Joyner int 25171d10453SEric Joyner ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap, 25271d10453SEric Joyner enum ice_rl_type rl_type, u8 *bw_alloc); 253*f2635e84SEric Joyner int 25471d10453SEric Joyner ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id, 25571d10453SEric Joyner u16 num_vsis, u16 *vsi_handle_arr, 25671d10453SEric Joyner u8 *node_prio, u8 tc); 257*f2635e84SEric Joyner int 25871d10453SEric Joyner ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap, 25971d10453SEric Joyner enum ice_rl_type rl_type, u8 *bw_alloc); 26071d10453SEric Joyner bool 26171d10453SEric Joyner ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base, 26271d10453SEric Joyner struct ice_sched_node *node); 263*f2635e84SEric Joyner int 26471d10453SEric Joyner ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle); 265*f2635e84SEric Joyner int 26671d10453SEric Joyner ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id, 26771d10453SEric Joyner enum ice_agg_type agg_type, u8 tc, 26871d10453SEric Joyner enum ice_rl_type rl_type, u32 bw); 269*f2635e84SEric Joyner int 27071d10453SEric Joyner ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, 271d08b8680SEric Joyner u32 min_bw, u32 max_bw, u32 shared_bw); 272*f2635e84SEric Joyner int 273d08b8680SEric Joyner ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw, 274d08b8680SEric Joyner u32 max_bw, u32 shared_bw); 275*f2635e84SEric Joyner int 276d08b8680SEric Joyner ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, 277d08b8680SEric Joyner u8 tc, u32 min_bw, u32 max_bw, 278d08b8680SEric Joyner u32 shared_bw); 279*f2635e84SEric Joyner int 28071d10453SEric Joyner ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi, 28171d10453SEric Joyner struct ice_sched_node *node, u8 priority); 282*f2635e84SEric Joyner int 28371d10453SEric Joyner ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc, 28471d10453SEric Joyner enum ice_rl_type rl_type, u8 bw_alloc); 285*f2635e84SEric Joyner int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes); 286d08b8680SEric Joyner void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw); 287d08b8680SEric Joyner void ice_sched_replay_agg(struct ice_hw *hw); 288*f2635e84SEric Joyner int ice_sched_replay_tc_node_bw(struct ice_port_info *pi); 289*f2635e84SEric Joyner int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle); 290*f2635e84SEric Joyner int ice_sched_replay_root_node_bw(struct ice_port_info *pi); 291*f2635e84SEric Joyner int ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx); 292d08b8680SEric Joyner 29371d10453SEric Joyner #endif /* _ICE_SCHED_H_ */ 294