xref: /freebsd/sys/dev/ice/ice_lib.h (revision a6fb86917362e3f6d24e95e940e80845c2cfde8a)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*  Copyright (c) 2021, Intel Corporation
3  *  All rights reserved.
4  *
5  *  Redistribution and use in source and binary forms, with or without
6  *  modification, are permitted provided that the following conditions are met:
7  *
8  *   1. Redistributions of source code must retain the above copyright notice,
9  *      this list of conditions and the following disclaimer.
10  *
11  *   2. Redistributions in binary form must reproduce the above copyright
12  *      notice, this list of conditions and the following disclaimer in the
13  *      documentation and/or other materials provided with the distribution.
14  *
15  *   3. Neither the name of the Intel Corporation nor the names of its
16  *      contributors may be used to endorse or promote products derived from
17  *      this software without specific prior written permission.
18  *
19  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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26  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  *  POSSIBILITY OF SUCH DAMAGE.
30  */
31 /*$FreeBSD$*/
32 
33 /**
34  * @file ice_lib.h
35  * @brief header for generic device and sysctl functions
36  *
37  * Contains definitions and function declarations for the ice_lib.c file. It
38  * does not depend on the iflib networking stack.
39  */
40 
41 #ifndef _ICE_LIB_H_
42 #define _ICE_LIB_H_
43 
44 #include <sys/types.h>
45 #include <sys/bus.h>
46 #include <sys/rman.h>
47 #include <sys/socket.h>
48 #include <sys/sbuf.h>
49 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
51 #include <sys/module.h>
52 #include <sys/proc.h>
53 
54 #include <net/if.h>
55 #include <net/if_var.h>
56 #include <net/if_media.h>
57 #include <net/ethernet.h>
58 
59 #include <sys/bitstring.h>
60 
61 #include "ice_dcb.h"
62 #include "ice_type.h"
63 #include "ice_common.h"
64 #include "ice_flow.h"
65 #include "ice_sched.h"
66 #include "ice_resmgr.h"
67 
68 #include "ice_rss.h"
69 
70 /* Hide debug sysctls unless INVARIANTS is enabled */
71 #ifdef INVARIANTS
72 #define ICE_CTLFLAG_DEBUG 0
73 #else
74 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP
75 #endif
76 
77 /**
78  * for_each_set_bit - For loop over each set bit in a bit string
79  * @bit: storage for the bit index
80  * @data: address of data block to loop over
81  * @nbits: maximum number of bits to loop over
82  *
83  * macro to create a for loop over a bit string, which runs the body once for
84  * each bit that is set in the string. The bit variable will be set to the
85  * index of each set bit in the string, with zero representing the first bit.
86  */
87 #define for_each_set_bit(bit, data, nbits) \
88 	for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \
89 	     (bit) != -1; \
90 	     bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit)))
91 
92 /**
93  * @var broadcastaddr
94  * @brief broadcast MAC address
95  *
96  * constant defining the broadcast MAC address, used for programming the
97  * broadcast address as a MAC filter for the PF VSI.
98  */
99 static const u8 broadcastaddr[ETHER_ADDR_LEN] = {
100 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff
101 };
102 
103 MALLOC_DECLARE(M_ICE);
104 
105 extern const char ice_driver_version[];
106 extern const uint8_t ice_major_version;
107 extern const uint8_t ice_minor_version;
108 extern const uint8_t ice_patch_version;
109 extern const uint8_t ice_rc_version;
110 
111 /* global sysctl indicating whether the Tx FC filter should be enabled */
112 extern bool ice_enable_tx_fc_filter;
113 
114 /* global sysctl indicating whether the Tx LLDP filter should be enabled */
115 extern bool ice_enable_tx_lldp_filter;
116 
117 /* global sysctl indicating whether FW health status events should be enabled */
118 extern bool ice_enable_health_events;
119 
120 /**
121  * @struct ice_bar_info
122  * @brief PCI BAR mapping information
123  *
124  * Contains data about a PCI BAR that the driver has mapped for use.
125  */
126 struct ice_bar_info {
127 	struct resource		*res;
128 	bus_space_tag_t		tag;
129 	bus_space_handle_t	handle;
130 	bus_size_t		size;
131 	int			rid;
132 };
133 
134 /* Alignment for queues */
135 #define DBA_ALIGN		128
136 
137 /* Maximum TSO size is (256K)-1 */
138 #define ICE_TSO_SIZE		((256*1024) - 1)
139 
140 /* Minimum size for TSO MSS */
141 #define ICE_MIN_TSO_MSS		64
142 
143 #define ICE_MAX_TX_SEGS		8
144 #define ICE_MAX_TSO_SEGS	128
145 
146 #define ICE_MAX_DMA_SEG_SIZE	((16*1024) - 1)
147 
148 #define ICE_MAX_RX_SEGS		5
149 
150 #define ICE_MAX_TSO_HDR_SEGS	3
151 
152 #define ICE_MSIX_BAR		3
153 
154 #define ICE_MAX_DCB_TCS		8
155 
156 #define ICE_DEFAULT_DESC_COUNT	1024
157 #define ICE_MAX_DESC_COUNT	8160
158 #define ICE_MIN_DESC_COUNT	64
159 #define ICE_DESC_COUNT_INCR	32
160 
161 /* List of hardware offloads we support */
162 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP |	\
163 			  CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP |		\
164 			  CSUM_IP_TSO | CSUM_IP6_TSO)
165 
166 /* Macros to decide what kind of hardware offload to enable */
167 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP)
168 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP)
169 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP)
170 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO)
171 
172 /* List of known RX CSUM offload flags */
173 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \
174 			   CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \
175 			   CSUM_COALESCED)
176 
177 /* List of interface capabilities supported by ice hardware */
178 #define ICE_FULL_CAPS \
179 	(IFCAP_TSO4 | IFCAP_TSO6 | \
180 	 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \
181 	 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \
182 	 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \
183 	 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \
184 	 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO)
185 
186 /* Safe mode disables support for hardware checksums and TSO */
187 #define ICE_SAFE_CAPS \
188 	(ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \
189 			   IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM))
190 
191 #define ICE_CAPS(sc) \
192 	(ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS)
193 
194 /**
195  * ICE_NVM_ACCESS
196  * @brief Private ioctl command number for NVM access ioctls
197  *
198  * The ioctl command number used by NVM update for accessing the driver for
199  * NVM access commands.
200  */
201 #define ICE_NVM_ACCESS \
202 	(((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5)
203 
204 #define ICE_AQ_LEN		1023
205 #define ICE_MBXQ_LEN		512
206 #define ICE_SBQ_LEN		512
207 
208 #define ICE_CTRLQ_WORK_LIMIT 256
209 
210 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
211 
212 /* wait up to 50 microseconds for queue state change */
213 #define ICE_Q_WAIT_RETRY_LIMIT	5
214 
215 #define ICE_UP_TABLE_TRANSLATE(val, i) \
216 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
217 		ICE_AQ_VSI_UP_TABLE_UP##i##_M)
218 
219 /*
220  * For now, set this to the hardware maximum. Each function gets a smaller
221  * number assigned to it in hw->func_caps.guar_num_vsi, though there
222  * appears to be no guarantee that is the maximum number that a function
223  * can use.
224  */
225 #define ICE_MAX_VSI_AVAILABLE	768
226 
227 /* Maximum size of a single frame (for Tx and Rx) */
228 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX
229 
230 /* Maximum MTU size */
231 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \
232 		     ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN)
233 
234 /*
235  * Hardware requires that TSO packets have an segment size of at least 64
236  * bytes. To avoid sending bad frames to the hardware, the driver forces the
237  * MSS for all TSO packets to have a segment size of at least 64 bytes.
238  *
239  * However, if the MTU is reduced below a certain size, then the resulting
240  * larger MSS can result in transmitting segmented frames with a packet size
241  * larger than the MTU.
242  *
243  * Avoid this by preventing the MTU from being lowered below this limit.
244  * Alternative solutions require changing the TCP stack to disable offloading
245  * the segmentation when the requested segment size goes below 64 bytes.
246  */
247 #define ICE_MIN_MTU 112
248 
249 #define ICE_DEFAULT_VF_QUEUES	4
250 
251 /*
252  * The maximum number of RX queues allowed per TC in a VSI.
253  */
254 #define ICE_MAX_RXQS_PER_TC	256
255 
256 /*
257  * There are three settings that can be updated independently or
258  * altogether: Link speed, FEC, and Flow Control.  These macros allow
259  * the caller to specify which setting(s) to update.
260  */
261 #define ICE_APPLY_LS        BIT(0)
262 #define ICE_APPLY_FEC       BIT(1)
263 #define ICE_APPLY_FC        BIT(2)
264 #define ICE_APPLY_LS_FEC    (ICE_APPLY_LS | ICE_APPLY_FEC)
265 #define ICE_APPLY_LS_FC     (ICE_APPLY_LS | ICE_APPLY_FC)
266 #define ICE_APPLY_FEC_FC    (ICE_APPLY_FEC | ICE_APPLY_FC)
267 #define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC)
268 
269 /**
270  * @enum ice_dyn_idx_t
271  * @brief Dynamic Control ITR indexes
272  *
273  * This enum matches hardware bits and is meant to be used by DYN_CTLN
274  * registers and QINT registers or more generally anywhere in the manual
275  * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any
276  * register but instead is a special value meaning "don't update" ITR0/1/2.
277  */
278 enum ice_dyn_idx_t {
279 	ICE_IDX_ITR0 = 0,
280 	ICE_IDX_ITR1 = 1,
281 	ICE_IDX_ITR2 = 2,
282 	ICE_ITR_NONE = 3	/* ITR_NONE must not be used as an index */
283 };
284 
285 /* By convenction ITR0 is used for RX, and ITR1 is used for TX */
286 #define ICE_RX_ITR ICE_IDX_ITR0
287 #define ICE_TX_ITR ICE_IDX_ITR1
288 
289 #define ICE_ITR_MAX		8160
290 
291 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */
292 #define ICE_DFLT_TX_ITR		50
293 #define ICE_DFLT_RX_ITR		50
294 
295 /**
296  * ice_itr_to_reg - Convert an ITR setting into its register equivalent
297  * @hw: The device HW structure
298  * @itr_setting: the ITR setting to convert
299  *
300  * Based on the hardware ITR granularity, convert an ITR setting into the
301  * correct value to prepare programming to the HW.
302  */
303 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting)
304 {
305 	return itr_setting / hw->itr_gran;
306 }
307 
308 /**
309  * @enum ice_rx_dtype
310  * @brief DTYPE header split options
311  *
312  * This enum matches the Rx context bits to define whether header split is
313  * enabled or not.
314  */
315 enum ice_rx_dtype {
316 	ICE_RX_DTYPE_NO_SPLIT		= 0,
317 	ICE_RX_DTYPE_HEADER_SPLIT	= 1,
318 	ICE_RX_DTYPE_SPLIT_ALWAYS	= 2,
319 };
320 
321 /* Strings used for displaying FEC mode
322  *
323  * Use ice_fec_str() to get these unless these need to be embedded in a
324  * string constant.
325  */
326 #define ICE_FEC_STRING_AUTO	"Auto"
327 #define ICE_FEC_STRING_RS	"RS-FEC"
328 #define ICE_FEC_STRING_BASER	"FC-FEC/BASE-R"
329 #define ICE_FEC_STRING_NONE	"None"
330 
331 /* Strings used for displaying Flow Control mode
332  *
333  * Use ice_fc_str() to get these unless these need to be embedded in a
334  * string constant.
335  */
336 #define ICE_FC_STRING_FULL	"Full"
337 #define ICE_FC_STRING_TX	"Tx"
338 #define ICE_FC_STRING_RX	"Rx"
339 #define ICE_FC_STRING_NONE	"None"
340 
341 /*
342  * The number of times the ice_handle_i2c_req function will retry reading
343  * I2C data via the Admin Queue before returning EBUSY.
344  */
345 #define ICE_I2C_MAX_RETRIES		10
346 
347 /*
348  * The Start LLDP Agent AQ command will fail if it's sent too soon after
349  * the LLDP agent is stopped. The period between the stop and start
350  * commands must currently be at least 2 seconds.
351  */
352 #define ICE_START_LLDP_RETRY_WAIT	(2 * hz)
353 
354 /*
355  * The ice_(set|clear)_vsi_promisc() function expects a mask of promiscuous
356  * modes to operate on. This mask is the default one for the driver, where
357  * promiscuous is enabled/disabled for all types of non-VLAN-tagged/VLAN 0
358  * traffic.
359  */
360 #define ICE_VSI_PROMISC_MASK		(ICE_PROMISC_UCAST_TX | \
361 					 ICE_PROMISC_UCAST_RX | \
362 					 ICE_PROMISC_MCAST_TX | \
363 					 ICE_PROMISC_MCAST_RX)
364 
365 struct ice_softc;
366 
367 /**
368  * @enum ice_rx_cso_stat
369  * @brief software checksum offload statistics
370  *
371  * Enumeration of possible checksum offload statistics captured by software
372  * during the Rx path.
373  */
374 enum ice_rx_cso_stat {
375 	ICE_CSO_STAT_RX_IP4_ERR,
376 	ICE_CSO_STAT_RX_IP6_ERR,
377 	ICE_CSO_STAT_RX_L3_ERR,
378 	ICE_CSO_STAT_RX_TCP_ERR,
379 	ICE_CSO_STAT_RX_UDP_ERR,
380 	ICE_CSO_STAT_RX_SCTP_ERR,
381 	ICE_CSO_STAT_RX_L4_ERR,
382 	ICE_CSO_STAT_RX_COUNT
383 };
384 
385 /**
386  * @enum ice_tx_cso_stat
387  * @brief software checksum offload statistics
388  *
389  * Enumeration of possible checksum offload statistics captured by software
390  * during the Tx path.
391  */
392 enum ice_tx_cso_stat {
393 	ICE_CSO_STAT_TX_TCP,
394 	ICE_CSO_STAT_TX_UDP,
395 	ICE_CSO_STAT_TX_SCTP,
396 	ICE_CSO_STAT_TX_IP4,
397 	ICE_CSO_STAT_TX_IP6,
398 	ICE_CSO_STAT_TX_L3_ERR,
399 	ICE_CSO_STAT_TX_L4_ERR,
400 	ICE_CSO_STAT_TX_COUNT
401 };
402 
403 /**
404  * @struct tx_stats
405  * @brief software Tx statistics
406  *
407  * Contains software counted Tx statistics for a single queue
408  */
409 struct tx_stats {
410 	/* Soft Stats */
411 	u64			tx_bytes;
412 	u64			tx_packets;
413 	u64			mss_too_small;
414 	u64			cso[ICE_CSO_STAT_TX_COUNT];
415 };
416 
417 /**
418  * @struct rx_stats
419  * @brief software Rx statistics
420  *
421  * Contains software counted Rx statistics for a single queue
422  */
423 struct rx_stats {
424 	/* Soft Stats */
425 	u64			rx_packets;
426 	u64			rx_bytes;
427 	u64			desc_errs;
428 	u64			cso[ICE_CSO_STAT_RX_COUNT];
429 };
430 
431 /**
432  * @struct ice_vsi_hw_stats
433  * @brief hardware statistics for a VSI
434  *
435  * Stores statistics that are generated by hardware for a VSI.
436  */
437 struct ice_vsi_hw_stats {
438 	struct ice_eth_stats prev;
439 	struct ice_eth_stats cur;
440 	bool offsets_loaded;
441 };
442 
443 /**
444  * @struct ice_pf_hw_stats
445  * @brief hardware statistics for a PF
446  *
447  * Stores statistics that are generated by hardware for each PF.
448  */
449 struct ice_pf_hw_stats {
450 	struct ice_hw_port_stats prev;
451 	struct ice_hw_port_stats cur;
452 	bool offsets_loaded;
453 };
454 
455 /**
456  * @struct ice_pf_sw_stats
457  * @brief software statistics for a PF
458  *
459  * Contains software generated statistics relevant to a PF.
460  */
461 struct ice_pf_sw_stats {
462 	/* # of reset events handled, by type */
463 	u32 corer_count;
464 	u32 globr_count;
465 	u32 empr_count;
466 	u32 pfr_count;
467 
468 	/* # of detected MDD events for Tx and Rx */
469 	u32 tx_mdd_count;
470 	u32 rx_mdd_count;
471 };
472 
473 /**
474  * @struct ice_tc_info
475  * @brief Traffic class information for a VSI
476  *
477  * Stores traffic class information used in configuring
478  * a VSI.
479  */
480 struct ice_tc_info {
481 	u16 qoffset;	/* Offset in VSI queue space */
482 	u16 qcount_tx;	/* TX queues for this Traffic Class */
483 	u16 qcount_rx;	/* RX queues */
484 };
485 
486 /**
487  * @struct ice_vsi
488  * @brief VSI structure
489  *
490  * Contains data relevant to a single VSI
491  */
492 struct ice_vsi {
493 	/* back pointer to the softc */
494 	struct ice_softc	*sc;
495 
496 	bool dynamic;		/* if true, dynamically allocated */
497 
498 	enum ice_vsi_type type;	/* type of this VSI */
499 	u16 idx;		/* software index to sc->all_vsi[] */
500 
501 	u16 *tx_qmap; /* Tx VSI to PF queue mapping */
502 	u16 *rx_qmap; /* Rx VSI to PF queue mapping */
503 
504 	bitstr_t *vmap; /* Vector(s) assigned to VSI */
505 
506 	enum ice_resmgr_alloc_type qmap_type;
507 
508 	struct ice_tx_queue *tx_queues;	/* Tx queue array */
509 	struct ice_rx_queue *rx_queues;	/* Rx queue array */
510 
511 	int num_tx_queues;
512 	int num_rx_queues;
513 	int num_vectors;
514 
515 	int16_t rx_itr;
516 	int16_t tx_itr;
517 
518 	/* RSS configuration */
519 	u16 rss_table_size; /* HW RSS table size */
520 	u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */
521 
522 	int max_frame_size;
523 	u16 mbuf_sz;
524 
525 	struct ice_aqc_vsi_props info;
526 
527 	/* DCB configuration */
528 	u8 num_tcs;	/* Total number of enabled TCs */
529 	u16 tc_map;	/* bitmap of enabled Traffic Classes */
530 	/* Information for each traffic class */
531 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
532 
533 	/* context for per-VSI sysctls */
534 	struct sysctl_ctx_list ctx;
535 	struct sysctl_oid *vsi_node;
536 
537 	/* context for per-txq sysctls */
538 	struct sysctl_ctx_list txqs_ctx;
539 	struct sysctl_oid *txqs_node;
540 
541 	/* context for per-rxq sysctls */
542 	struct sysctl_ctx_list rxqs_ctx;
543 	struct sysctl_oid *rxqs_node;
544 
545 	/* VSI-level stats */
546 	struct ice_vsi_hw_stats hw_stats;
547 };
548 
549 /**
550  * @enum ice_state
551  * @brief Driver state flags
552  *
553  * Used to indicate the status of various driver events. Intended to be
554  * modified only using atomic operations, so that we can use it even in places
555  * which aren't locked.
556  */
557 enum ice_state {
558 	ICE_STATE_CONTROLQ_EVENT_PENDING,
559 	ICE_STATE_VFLR_PENDING,
560 	ICE_STATE_MDD_PENDING,
561 	ICE_STATE_RESET_OICR_RECV,
562 	ICE_STATE_RESET_PFR_REQ,
563 	ICE_STATE_PREPARED_FOR_RESET,
564 	ICE_STATE_RESET_FAILED,
565 	ICE_STATE_DRIVER_INITIALIZED,
566 	ICE_STATE_NO_MEDIA,
567 	ICE_STATE_RECOVERY_MODE,
568 	ICE_STATE_ROLLBACK_MODE,
569 	ICE_STATE_LINK_STATUS_REPORTED,
570 	ICE_STATE_ATTACHING,
571 	ICE_STATE_DETACHING,
572 	ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING,
573 	ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER,
574 	ICE_STATE_MULTIPLE_TCS,
575 	/* This entry must be last */
576 	ICE_STATE_LAST,
577 };
578 
579 /* Functions for setting and checking driver state. Note the functions take
580  * bit positions, not bitmasks. The atomic_testandset_32 and
581  * atomic_testandclear_32 operations require bit positions, while the
582  * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to
583  * programming error, so we provide wrapper functions to avoid this.
584  */
585 
586 /**
587  * ice_set_state - Set the specified state
588  * @s: the state bitmap
589  * @bit: the state to set
590  *
591  * Atomically update the state bitmap with the specified bit set.
592  */
593 static inline void
594 ice_set_state(volatile u32 *s, enum ice_state bit)
595 {
596 	/* atomic_set_32 expects a bitmask */
597 	atomic_set_32(s, BIT(bit));
598 }
599 
600 /**
601  * ice_clear_state - Clear the specified state
602  * @s: the state bitmap
603  * @bit: the state to clear
604  *
605  * Atomically update the state bitmap with the specified bit cleared.
606  */
607 static inline void
608 ice_clear_state(volatile u32 *s, enum ice_state bit)
609 {
610 	/* atomic_clear_32 expects a bitmask */
611 	atomic_clear_32(s, BIT(bit));
612 }
613 
614 /**
615  * ice_testandset_state - Test and set the specified state
616  * @s: the state bitmap
617  * @bit: the bit to test
618  *
619  * Atomically update the state bitmap, setting the specified bit. Returns the
620  * previous value of the bit.
621  */
622 static inline u32
623 ice_testandset_state(volatile u32 *s, enum ice_state bit)
624 {
625 	/* atomic_testandset_32 expects a bit position */
626 	return atomic_testandset_32(s, bit);
627 }
628 
629 /**
630  * ice_testandclear_state - Test and clear the specified state
631  * @s: the state bitmap
632  * @bit: the bit to test
633  *
634  * Atomically update the state bitmap, clearing the specified bit. Returns the
635  * previous value of the bit.
636  */
637 static inline u32
638 ice_testandclear_state(volatile u32 *s, enum ice_state bit)
639 {
640 	/* atomic_testandclear_32 expects a bit position */
641 	return atomic_testandclear_32(s, bit);
642 }
643 
644 /**
645  * ice_test_state - Test the specified state
646  * @s: the state bitmap
647  * @bit: the bit to test
648  *
649  * Return true if the state is set, false otherwise. Use this only if the flow
650  * does not need to update the state. If you must update the state as well,
651  * prefer ice_testandset_state or ice_testandclear_state.
652  */
653 static inline u32
654 ice_test_state(volatile u32 *s, enum ice_state bit)
655 {
656 	return (*s & BIT(bit)) ? true : false;
657 }
658 
659 /**
660  * @struct ice_str_buf
661  * @brief static length buffer for string returning
662  *
663  * Structure containing a fixed size string buffer, used to implement
664  * numeric->string conversion functions that may want to return non-constant
665  * strings.
666  *
667  * This allows returning a fixed size string that is generated by a conversion
668  * function, and then copied to the used location without needing to use an
669  * explicit local variable passed by reference.
670  */
671 struct ice_str_buf {
672 	char str[ICE_STR_BUF_LEN];
673 };
674 
675 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err);
676 struct ice_str_buf _ice_status_str(enum ice_status status);
677 struct ice_str_buf _ice_err_str(int err);
678 struct ice_str_buf _ice_fltr_flag_str(u16 flag);
679 struct ice_str_buf _ice_log_sev_str(u8 log_level);
680 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event);
681 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event);
682 struct ice_str_buf _ice_mdd_rx_str(u8 event);
683 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status);
684 
685 #define ice_aq_str(err)		_ice_aq_str(err).str
686 #define ice_status_str(err)	_ice_status_str(err).str
687 #define ice_err_str(err)	_ice_err_str(err).str
688 #define ice_fltr_flag_str(flag)	_ice_fltr_flag_str(flag).str
689 
690 #define ice_mdd_tx_tclan_str(event)	_ice_mdd_tx_tclan_str(event).str
691 #define ice_mdd_tx_pqm_str(event)	_ice_mdd_tx_pqm_str(event).str
692 #define ice_mdd_rx_str(event)		_ice_mdd_rx_str(event).str
693 
694 #define ice_log_sev_str(log_level)	_ice_log_sev_str(log_level).str
695 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str
696 
697 /**
698  * ice_enable_intr - Enable interrupts for given vector
699  * @hw: the device private HW structure
700  * @vector: the interrupt index in PF space
701  *
702  * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index.
703  */
704 static inline void
705 ice_enable_intr(struct ice_hw *hw, int vector)
706 {
707 	u32 dyn_ctl;
708 
709 	/* Use ITR_NONE so that ITR configuration is not changed. */
710 	dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
711 		  (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S);
712 	wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);
713 }
714 
715 /**
716  * ice_disable_intr - Disable interrupts for given vector
717  * @hw: the device private HW structure
718  * @vector: the interrupt index in PF space
719  *
720  * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index.
721  */
722 static inline void
723 ice_disable_intr(struct ice_hw *hw, int vector)
724 {
725 	u32 dyn_ctl;
726 
727 	/* Use ITR_NONE so that ITR configuration is not changed. */
728 	dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S;
729 	wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);
730 }
731 
732 /**
733  * ice_is_tx_desc_done - determine if a Tx descriptor is done
734  * @txd: the Tx descriptor to check
735  *
736  * Returns true if hardware is done with a Tx descriptor and software is
737  * capable of re-using it.
738  */
739 static inline bool
740 ice_is_tx_desc_done(struct ice_tx_desc *txd)
741 {
742 	return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M)
743 		 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE);
744 }
745 
746 /**
747  * ice_get_pf_id - Get the PF id from the hardware registers
748  * @hw: the ice hardware structure
749  *
750  * Reads the PF_FUNC_RID register and extracts the function number from it.
751  * Intended to be used in cases where hw->pf_id hasn't yet been assigned by
752  * ice_init_hw.
753  *
754  * @pre this function should be called only after PCI register access has been
755  * setup, and prior to ice_init_hw. After hardware has been initialized, the
756  * cached hw->pf_id value can be used.
757  */
758 static inline u8
759 ice_get_pf_id(struct ice_hw *hw)
760 {
761 	return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >>
762 		    PF_FUNC_RID_FUNCTION_NUMBER_S);
763 }
764 
765 /* Details of how to re-initialize depend on the networking stack */
766 void ice_request_stack_reinit(struct ice_softc *sc);
767 
768 /* Details of how to check if the network stack is detaching us */
769 bool ice_driver_is_detaching(struct ice_softc *sc);
770 
771 const char * ice_fw_module_str(enum ice_aqc_fw_logging_mod module);
772 void ice_add_fw_logging_tunables(struct ice_softc *sc,
773 				 struct sysctl_oid *parent);
774 void ice_handle_fw_log_event(struct ice_softc *sc, struct ice_aq_desc *desc,
775 			     void *buf);
776 
777 int  ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending);
778 int  ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num);
779 void ice_free_bar(device_t dev, struct ice_bar_info *bar);
780 void ice_set_ctrlq_len(struct ice_hw *hw);
781 void ice_release_vsi(struct ice_vsi *vsi);
782 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type);
783 int  ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues,
784 		       const int max_rx_queues);
785 void ice_free_vsi_qmaps(struct ice_vsi *vsi);
786 int  ice_initialize_vsi(struct ice_vsi *vsi);
787 void ice_deinit_vsi(struct ice_vsi *vsi);
788 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi);
789 int  ice_get_phy_type_low(uint64_t phy_type_low);
790 int  ice_get_phy_type_high(uint64_t phy_type_high);
791 enum ice_status ice_add_media_types(struct ice_softc *sc, struct ifmedia *media);
792 void ice_configure_rxq_interrupts(struct ice_vsi *vsi);
793 void ice_configure_txq_interrupts(struct ice_vsi *vsi);
794 void ice_flush_rxq_interrupts(struct ice_vsi *vsi);
795 void ice_flush_txq_interrupts(struct ice_vsi *vsi);
796 int  ice_cfg_vsi_for_tx(struct ice_vsi *vsi);
797 int  ice_cfg_vsi_for_rx(struct ice_vsi *vsi);
798 int  ice_control_rx_queues(struct ice_vsi *vsi, bool enable);
799 int  ice_cfg_pf_default_mac_filters(struct ice_softc *sc);
800 int  ice_rm_pf_default_mac_filters(struct ice_softc *sc);
801 void ice_print_nvm_version(struct ice_softc *sc);
802 void ice_update_vsi_hw_stats(struct ice_vsi *vsi);
803 void ice_reset_vsi_stats(struct ice_vsi *vsi);
804 void ice_update_pf_stats(struct ice_softc *sc);
805 void ice_reset_pf_stats(struct ice_softc *sc);
806 void ice_add_device_sysctls(struct ice_softc *sc);
807 void ice_log_hmc_error(struct ice_hw *hw, device_t dev);
808 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx,
809 			       struct sysctl_oid *parent,
810 			       struct ice_eth_stats *stats);
811 void ice_add_vsi_sysctls(struct ice_vsi *vsi);
812 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx,
813 			       struct sysctl_oid *parent,
814 			       struct ice_hw_port_stats *stats);
815 void ice_configure_misc_interrupts(struct ice_softc *sc);
816 int  ice_sync_multicast_filters(struct ice_softc *sc);
817 enum ice_status ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
818 enum ice_status ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
819 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent);
820 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi);
821 void ice_add_device_tunables(struct ice_softc *sc);
822 int  ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr);
823 int  ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr);
824 int  ice_vsi_disable_tx(struct ice_vsi *vsi);
825 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi);
826 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi);
827 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi);
828 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi);
829 void ice_add_txq_sysctls(struct ice_tx_queue *txq);
830 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq);
831 int  ice_config_rss(struct ice_vsi *vsi);
832 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc);
833 void ice_load_pkg_file(struct ice_softc *sc);
834 void ice_log_pkg_init(struct ice_softc *sc, enum ice_status *pkg_status);
835 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter);
836 void ice_save_pci_info(struct ice_hw *hw, device_t dev);
837 int  ice_replay_all_vsi_cfg(struct ice_softc *sc);
838 void ice_link_up_msg(struct ice_softc *sc);
839 int  ice_update_laa_mac(struct ice_softc *sc);
840 void ice_get_and_print_bus_info(struct ice_softc *sc);
841 const char *ice_fec_str(enum ice_fec_mode mode);
842 const char *ice_fc_str(enum ice_fc_mode mode);
843 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action);
844 const char *ice_state_to_str(enum ice_state state);
845 int  ice_init_link_events(struct ice_softc *sc);
846 void ice_configure_rx_itr(struct ice_vsi *vsi);
847 void ice_configure_tx_itr(struct ice_vsi *vsi);
848 void ice_setup_pf_vsi(struct ice_softc *sc);
849 void ice_handle_mdd_event(struct ice_softc *sc);
850 void ice_init_dcb_setup(struct ice_softc *sc);
851 int  ice_send_version(struct ice_softc *sc);
852 int  ice_cfg_pf_ethertype_filters(struct ice_softc *sc);
853 void ice_init_link_configuration(struct ice_softc *sc);
854 void ice_init_saved_phy_cfg(struct ice_softc *sc);
855 int  ice_apply_saved_phy_cfg(struct ice_softc *sc, u8 settings);
856 void ice_set_link_management_mode(struct ice_softc *sc);
857 int  ice_module_event_handler(module_t mod, int what, void *arg);
858 int  ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd);
859 int  ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req);
860 int  ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length);
861 int  ice_alloc_intr_tracking(struct ice_softc *sc);
862 void ice_free_intr_tracking(struct ice_softc *sc);
863 void ice_set_default_local_lldp_mib(struct ice_softc *sc);
864 void ice_init_health_events(struct ice_softc *sc);
865 void ice_cfg_pba_num(struct ice_softc *sc);
866 
867 #endif /* _ICE_LIB_H_ */
868